TJ4320GDP-ADJ

@@ -0,0 +1,62 @@+# TJ4320GDP-ADJ++**HTC Korea TAEJIN Tech** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOP-8-EP++TJ4320GDP-ADJ from HTC Korea TAEJIN Tech, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | POK | output | Power OK indication. Open-drain output that becomes high impedance once VOUT reaches 92% of its rated value (VPOKTH typ 92%, ~7% hysteresis). Requires an external pull-up resistor. |+| 2 | EN | input | Chip enable. Pulling this pin below 0.4 V (VIL) turns the regulator off; VIH ≥ 2.0 V enables the device. Do not float. Enable input current ~0.1 µA (max 1 µA). |+| 3 | VIN | power_in | Input supply pin. Recommended operating range 2.5 V to 5.5 V (absolute max 6.5 V). Requires a low-ESR ceramic bypass capacitor (≥10 µF recommended) placed close to the pin. |+| 4 | N.C | unconnected | No internal connection. Leave floating or tie to a convenient net; not electrically bonded to the die. |+| 5 | SS | passive | Soft-start. Connect an external capacitor (CSS) between this pin and ground to set the soft-start time (e.g. 220 pF ≈ 0.23 ms, 10 nF ≈ 10.4 ms). Internal ~130 nA current source charges CSS against a ~450 kΩ / 0.6 V reference. Do not tie directly to ground. |+| 6 | VOUT | power_out | Regulated output voltage, up to 2 A continuous. Requires a low-ESR ceramic output capacitor (≥10 µF recommended). An auto-discharge path (~330 Ω) pulls VOUT down when EN goes low. |+| 7 | ADJ | input | Output adjust / feedback input for the adjustable version. Regulates to VADJ ≈ 0.6 V (min 0.582 V, max 0.618 V over temperature). Set VOUT with an external resistor divider using R2 = R1 × (VOUT/0.6 − 1); recommended R1 in the 1 kΩ to 100 kΩ range. A 2.2 nF to 1 µF feed-forward capacitor from VOUT to ADJ improves PSRR. |+| 8 | GND | power_in | Device ground / return. Ground pin quiescent current ~0.2 mA at 200 mA load and ~0.3 mA at 2 A load; standby current ~0.1 µA when disabled. |+| 9 | PAD | power_in | Exposed thermal pad on the underside of the SOP8-PP package. Must be soldered to a ground copper plane for thermal dissipation and connected to GND electrically. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | HTC Korea TAEJIN Tech |+| Package | SOP-8-EP |+| Category | PMIC |+| Pins | 9 |++## Ordering variants++- `TJ4320GDP-ADJ`+- `TJ4320GDP-ADJTJ4320GDP-1.0`+- `TJ4320GDP-ADJTJ4320GDP-1.2`+- `TJ4320GDP-ADJTJ4320GDP-1.5`+- `TJ4320GDP-ADJTJ4320GDP-1.8`+- `TJ4320GDP-ADJTJ4320GDP-2.5`+- `TJ4320GDP-ADJTJ4320GDP-3.3`+- `TJ4320GDP-ADJTJ4320GD-ADJ`+- `TJ4320GDP-ADJTJ4320GD-1.0`+- `TJ4320GDP-ADJTJ4320GD-1.2`+- `TJ4320GDP-ADJTJ4320GD-1.5`+- `TJ4320GDP-ADJTJ4320GD-1.8`+- `TJ4320GDP-ADJTJ4320GD-2.5`+- `TJ4320GDP-ADJTJ4320GD-3.3`+- `TJ4320GDP-ADJTJ4320GRS-ADJ-5L`++## CAD (KiCad official)++- Symbol: `TJ4320GDP-ADJ`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOP-8-EP (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [HTC Korea TAEJIN Tech datasheet](docs/tj4320gdp-adj-datasheet.pdf) (20 pp, sha256 `9daca42d90860e1b`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tj4320gdp-adj-datasheet.pdf)

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