← Commit history

tj4320gdp-adj: factory component page (tier=lcsc)

Ray ·47b41c7808 ·1mo ago ·parent baabe8e
1 file changed +122−8
page.json+122−8
@@ -1,13 +1,132 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "tj4320gdp-adj",+  "title": "TJ4320GDP-ADJ",+  "brief": "HTC Korea TAEJIN Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "HTC Korea TAEJIN Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "pmic",     "tj4320gdp-adj"   ],+  "component": {+    "mpn": "TJ4320GDP-ADJ",+    "manufacturer": "HTC Korea TAEJIN Tech",+    "package": "SOP-8-EP",+    "pin_count": 9,+    "category": "PMIC",+    "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/52d142c827ff4108a75b9f63245d189d.pdf",+    "parts": {+      "symbol": "tj4320gdp-adj.kicad_sym",+      "footprint": "tj4320gdp-adj.kicad_mod",+      "model_3d": "tj4320gdp-adj.glb",+      "model_3d_step": "tj4320gdp-adj.step",+      "lbr": "tj4320gdp-adj.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "POK",+        "type": "output",+        "description": "Power OK indication. Open-drain output that becomes high impedance once VOUT reaches 92% of its rated value (VPOKTH typ 92%, ~7% hysteresis). Requires an external pull-up resistor."+      },+      {+        "number": "2",+        "name": "EN",+        "type": "input",+        "description": "Chip enable. Pulling this pin below 0.4 V (VIL) turns the regulator off; VIH \u2265 2.0 V enables the device. Do not float. Enable input current ~0.1 \u00b5A (max 1 \u00b5A)."+      },+      {+        "number": "3",+        "name": "VIN",+        "type": "power_in",+        "description": "Input supply pin. Recommended operating range 2.5 V to 5.5 V (absolute max 6.5 V). Requires a low-ESR ceramic bypass capacitor (\u226510 \u00b5F recommended) placed close to the pin."+      },+      {+        "number": "4",+        "name": "N.C",+        "type": "unconnected",+        "description": "No internal connection. Leave floating or tie to a convenient net; not electrically bonded to the die."+      },+      {+        "number": "5",+        "name": "SS",+        "type": "passive",+        "description": "Soft-start. Connect an external capacitor (CSS) between this pin and ground to set the soft-start time (e.g. 220 pF \u2248 0.23 ms, 10 nF \u2248 10.4 ms). Internal ~130 nA current source charges CSS against a ~450 k\u03a9 / 0.6 V reference. Do not tie directly to ground."+      },+      {+        "number": "6",+        "name": "VOUT",+        "type": "power_out",+        "description": "Regulated output voltage, up to 2 A continuous. Requires a low-ESR ceramic output capacitor (\u226510 \u00b5F recommended). An auto-discharge path (~330 \u03a9) pulls VOUT down when EN goes low."+      },+      {+        "number": "7",+        "name": "ADJ",+        "type": "input",+        "description": "Output adjust / feedback input for the adjustable version. Regulates to VADJ \u2248 0.6 V (min 0.582 V, max 0.618 V over temperature). Set VOUT with an external resistor divider using R2 = R1 \u00d7 (VOUT/0.6 \u2212 1); recommended R1 in the 1 k\u03a9 to 100 k\u03a9 range. A 2.2 nF to 1 \u00b5F feed-forward capacitor from VOUT to ADJ improves PSRR."+      },+      {+        "number": "8",+        "name": "GND",+        "type": "power_in",+        "description": "Device ground / return. Ground pin quiescent current ~0.2 mA at 200 mA load and ~0.3 mA at 2 A load; standby current ~0.1 \u00b5A when disabled."+      },+      {+        "number": "9",+        "name": "PAD",+        "type": "power_in",+        "description": "Exposed thermal pad on the underside of the SOP8-PP package. Must be soldered to a ground copper plane for thermal dissipation and connected to GND electrically."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://datasheet.lcsc.com/datasheet/pdf/52d142c827ff4108a75b9f63245d189d.pdf",+        "pages": 20,+        "sha256": "9daca42d90860e1b",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 9,+        "described": 9,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "HTC Korea TAEJIN Tech",+      "Package": "SOP-8-EP",+      "Category": "PMIC",+      "Pins": "9"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "tj4320gdp-adj"+  ],+  "discovery_pitch": "TJ4320GDP-ADJ (HTC Korea TAEJIN Tech) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +144,5 @@     "docs/tj4320gdp-adj-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file