component
THS7376IPWR
Public Made by Adomby adom
Texas Instruments Video Amplifiers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+51@@ -0,0 +1,51 @@+# THS7376IPWR++**Texas Instruments** · Video Amplifiers · TSSOP-14++THS7376IPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CVBS IN | input | CVBS filter video input for the standard-definition (SD) channel. |+| 2 | HD CH1 IN | input | HD channel 1 video input. |+| 3 | HD CH2 IN | input | HD channel 2 video input. |+| 4 | HD CH3 IN | input | HD channel 3 video input. |+| 5 | GND | power_in | Ground pin for all internal circuitry. |+| 6 | DISABLE | input | Disable pin: logic high disables the device and logic low enables it; it defaults to logic low (enabled) if left floating. |+| 7 | NC | unconnected | No internal connection. |+| 8 | NC | unconnected | No internal connection. |+| 9 | HD BYPASS | input | Internal HD filter bypass: logic high bypasses the internal HD low-pass filters and logic low uses them; it defaults to logic 0 (filter mode) if left floating, and the SD filter is never bypassed. |+| 10 | VS+ | power_in | Positive power-supply pin; connect to +3 V to +5 V. |+| 11 | HD CH3 OUT | output | HD channel 3 video output. |+| 12 | HD CH2 OUT | output | HD channel 2 video output. |+| 13 | HD CH1 OUT | output | HD channel 1 video output. |+| 14 | CVBS OUT | output | CVBS filter video output for the standard-definition (SD) channel. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-14 |+| Category | Amplifiers/Comparators |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `THS7376IPWR`+- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`+- 3D model: TSSOP-14 (KiCad packages3D, STEP)+- 3D model files: `ths7376ipwr-etched.step` / `ths7376ipwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ths7376ipwr.step` / `ths7376ipwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ths7376) (60 pp, sha256 `4215f30aa80ff28a`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ths7376ipwr-datasheet.pdf)
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it defaults to logic low (enabled) if left floating."+ },+ {+ "number": "7",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection."+ },+ {+ "number": "8",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection."+ },+ {+ "number": "9",+ "name": "HD BYPASS",+ "type": "input",+ "description": "Internal HD filter bypass: logic high bypasses the internal HD low-pass filters and logic low uses them; it defaults to logic 0 (filter mode) if left floating, and the SD filter is never bypassed."+ },+ {+ "number": "10",+ "name": "VS+",+ "type": "power_in",+ "description": "Positive power-supply pin; connect to +3 V to +5 V."+ },+ {+ "number": "11",+ "name": "HD CH3 OUT",+ "type": "output",+ "description": "HD channel 3 video output."+ },+ {+ "number": "12",+ "name": "HD CH2 OUT",+ "type": "output",+ "description": "HD channel 2 video output."+ },+ {+ "number": "13",+ "name": "HD CH1 OUT",+ "type": "output",+ "description": "HD channel 1 video output."+ },+ {+ "number": "14",+ "name": "CVBS OUT",+ "type": "output",+ "description": "CVBS filter video output for the standard-definition (SD) channel."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet lists VS+ and GND as type 'I' in the terminal table; they are recorded here as power_i; Pins 7 and 8 are both NC (no internal connection) per the datasheet; they are listed individually as; The datasheet's PW (TSSOP-14) pin table is the only package pinout in the provided pages; the Packag"+ ],+ "pages_sent": 9,+ "cost_usd": 0.0622,+ "at": "2026-10-08T00:22:01"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/ths7376",+ "pages": 60,+ "sha256": "4215f30aa80ff28a",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 14,+ "described": 14,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "ths7376ipwr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "3ee5786aae56190997aa793ba3cfc003fd616782770e29719b4562f012982245",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ths7376ipwr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "8800abcb2a36276070a055873c98375a3bb1b22c9ba46d075e3af5f1c15ce804",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}