component
TFP401APZP
Public Made by Adomby adom
Texas Instruments Video Interface ICs, TQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+137@@ -0,0 +1,137 @@+# TFP401APZP++**Texas Instruments** · Video Interface ICs · TQFP-100(14x14)++TFP401APZP from Texas Instruments, in a TQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DFO | input | Output clock data format control: continuous for TFT mode (low) or gated by DE for DSTN mode (high) |+| 2 | PD | input | Active-low power-down control for all analog circuits and output buffers |+| 3 | ST | input | Output drive strength select: high-drive (high) or low-drive (low) |+| 4 | PIXS | input | Pixel select: 1-pixel/clock mode (low) or 2-pixels/clock mode (high) |+| 5 | DGND | power_in | Digital ground reference and current return for digital core |+| 6 | DVDD | power_out | Digital supply voltage nominally 3.3V for digital core |+| 7 | STAG | input | Active-low staggered pixel output select to reduce ground bounce in 2-pixel/clock mode |+| 8 | SCDT | output | Sync detect output: high for active link when DE switches, low for inactive link |+| 9 | PDO | input | Active-low output driver power-down control |+| 10 | QE0 | output | Even blue-pixel output LSB synchronized to ODCK |+| 11 | QE1 | output | Even blue-pixel output synchronized to ODCK |+| 12 | QE2 | output | Even blue-pixel output synchronized to ODCK |+| 13 | QE3 | output | Even blue-pixel output synchronized to ODCK |+| 14 | QE4 | output | Even blue-pixel output synchronized to ODCK |+| 15 | QE5 | output | Even blue-pixel output synchronized to ODCK |+| 16 | QE6 | output | Even blue-pixel output synchronized to ODCK |+| 17 | QE7 | output | Even blue-pixel output MSB synchronized to ODCK |+| 18 | OVDD | power_out | Output driver supply voltage nominally 3.3V |+| 19 | OGND | power_in | Output driver ground reference and current return |+| 20 | QE8 | output | Even green-pixel output LSB synchronized to ODCK |+| 21 | QE9 | output | Even green-pixel output synchronized to ODCK |+| 22 | QE10 | output | Even green-pixel output synchronized to ODCK |+| 23 | QE11 | output | Even green-pixel output synchronized to ODCK |+| 24 | QE12 | output | Even green-pixel output synchronized to ODCK |+| 25 | QE13 | output | Even green-pixel output synchronized to ODCK |+| 26 | QE14 | output | Even green-pixel output synchronized to ODCK |+| 27 | QE15 | output | Even green-pixel output MSB synchronized to ODCK |+| 28 | OGND | power_in | Output driver ground reference and current return |+| 29 | OVDD | power_out | Output driver supply voltage nominally 3.3V |+| 30 | QE16 | output | Even red-pixel output LSB synchronized to ODCK |+| 31 | QE17 | output | Even red-pixel output synchronized to ODCK |+| 32 | QE18 | output | Even red-pixel output synchronized to ODCK |+| 33 | QE19 | output | Even red-pixel output synchronized to ODCK |+| 34 | QE20 | output | Even red-pixel output synchronized to ODCK |+| 35 | QE21 | output | Even red-pixel output synchronized to ODCK |+| 36 | QE22 | output | Even red-pixel output synchronized to ODCK |+| 37 | QE23 | output | Even red-pixel output MSB synchronized to ODCK |+| 38 | DVDD | power_out | Digital supply voltage nominally 3.3V for digital core |+| 39 | DGND | power_in | Digital ground reference and current return for digital core |+| 40 | CTL1 | output | General-purpose control signal; not powered down via PDO |+| 41 | CTL2 | output | General-purpose control signal used for user-defined control |+| 42 | CTL3 | output | General-purpose control signal used for user-defined control |+| 43 | OVDD | power_out | Output driver supply voltage nominally 3.3V |+| 44 | ODCK | output | Output data clock (pixel clock) synchronizing all pixel outputs and control signals |+| 45 | OGND | power_in | Output driver ground reference and current return |+| 46 | DE | output | Output data enable: high during active video display, low during blank time |+| 47 | VSYNC | output | Vertical sync output signal |+| 48 | HSYNC | output | Horizontal sync output signal |+| 49 | QO0 | output | Odd blue-pixel output LSB for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 50 | QO1 | output | Odd blue-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 51 | QO2 | output | Odd blue-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 52 | QO3 | output | Odd blue-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 53 | QO4 | output | Odd blue-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 54 | QO5 | output | Odd blue-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 55 | QO6 | output | Odd blue-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 56 | QO7 | output | Odd blue-pixel output MSB for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 57 | OVDD | power_out | Output driver supply voltage nominally 3.3V |+| 58 | OGND | power_in | Output driver ground reference and current return |+| 59 | QO8 | output | Odd green-pixel output LSB for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 60 | QO9 | output | Odd green-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 61 | QO10 | output | Odd green-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 62 | QO11 | output | Odd green-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 63 | QO12 | output | Odd green-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 64 | QO13 | output | Odd green-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 65 | QO14 | output | Odd green-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 66 | QO15 | output | Odd green-pixel output MSB for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 67 | DVDD | power_out | Digital supply voltage nominally 3.3V for digital core |+| 68 | DGND | power_in | Digital ground reference and current return for digital core |+| 69 | QO16 | output | Odd red-pixel output LSB for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 70 | QO17 | output | Odd red-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 71 | QO18 | output | Odd red-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 72 | QO19 | output | Odd red-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 73 | QO20 | output | Odd red-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 74 | QO21 | output | Odd red-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 75 | QO22 | output | Odd red-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 76 | OGND | power_in | Output driver ground reference and current return |+| 77 | QO23 | output | Odd red-pixel output MSB for 2-pixel/clock mode, held low in 1-pixel/clock mode |+| 78 | OVDD | power_out | Output driver supply voltage nominally 3.3V |+| 79 | AGND | power_in | Analog ground reference and current return for analog circuitry |+| 80 | Rx2+ | input | Channel-2 positive receiver input (red pixel data), TMDS low-voltage signal differential input |+| 81 | Rx2- | input | Channel-2 negative receiver input (red pixel data), TMDS low-voltage signal differential input |+| 82 | AVDD | power_out | Analog supply voltage nominally 3.3V for analog circuitry |+| 83 | AGND | power_in | Analog ground reference and current return for analog circuitry |+| 84 | AVDD | power_out | Analog supply voltage nominally 3.3V for analog circuitry |+| 85 | Rx1+ | input | Channel-1 positive receiver input (green pixel data), TMDS low-voltage signal differential input |+| 86 | Rx1- | input | Channel-1 negative receiver input (green pixel data), TMDS low-voltage signal differential input |+| 87 | AGND | power_in | Analog ground reference and current return for analog circuitry |+| 88 | AVDD | power_out | Analog supply voltage nominally 3.3V for analog circuitry |+| 89 | AGND | power_in | Analog ground reference and current return for analog circuitry |+| 90 | Rx0+ | input | Channel-0 positive receiver input (blue pixel data), TMDS low-voltage signal differential input |+| 91 | Rx0- | input | Channel-0 negative receiver input (blue pixel data), TMDS low-voltage signal differential input |+| 92 | AGND | power_in | Analog ground reference and current return for analog circuitry |+| 93 | RxC+ | input | Clock positive receiver input, TMDS low-voltage signal differential input pair |+| 94 | RxC- | input | Clock negative receiver input, TMDS low-voltage signal differential input pair |+| 95 | AVDD | power_out | Analog supply voltage nominally 3.3V for analog circuitry |+| 96 | EXT_RES | input | Internal impedance matching reference; device internally optimized for 50Ω impedance |+| 97 | PVDD | power_out | PLL supply voltage for internal PLL |+| 98 | PGND | power_in | PLL ground reference and current return for internal PLL |+| 99 | RSVD | input | Reserved pin; must be tied high for normal operation |+| 100 | OCK_INV | input | ODCK polarity select: latches data on rising edge (high) or falling edge (low) of ODCK |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TQFP-100(14x14) |+| Category | Interface |+| Pins | 100 |++## CAD (KiCad official)++- Symbol: `TFP401APZP`+- Footprint: `Package_QFP:TQFP-100_14x14mm_P0.5mm`+- 3D model: TQFP-100(14x14) (KiCad packages3D, STEP)+- 3D model files: `tfp401apzp-etched.step` / `tfp401apzp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tfp401apzp.step` / `tfp401apzp.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tfp401a) (37 pp, sha256 `4faebec02402e979`, retrieved 2026-10-05, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tfp401apzp-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "interface",+ "tfp401apzp",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tfp401apzp.kicad_sym",+ "tfp401apzp.kicad_mod",+ "tfp401apzp.glb",+ "tfp401apzp.step",+ "tfp401apzp.lbr",+ "docs/hero.png",+ "docs/tfp401apzp-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tfp401apzp-hero.glb",+ "tfp401apzp-hero.overlay.json"+ ],+ "component": {+ "mpn": "TFP401APZP",+ "manufacturer": "Texas Instruments",+ "package": "TQFP-100(14x14)",+ "pin_count": 100,+ "category": "Interface",+ "subcategory": "Video Interface ICs",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tfp401a",+ "parts": {+ "symbol": "tfp401apzp.kicad_sym",+ "footprint": "tfp401apzp.kicad_mod",+ "model_3d": "tfp401apzp-hero.glb",+ "model_3d_plain": "tfp401apzp.glb",+ "model_3d_step": "tfp401apzp-etched.step",+ "model_3d_step_plain": "tfp401apzp.step",+ "lbr": "tfp401apzp.lbr"+ },+ "distributor_links": {+ "lcsc": 38860,+ "digikey": "296-9991-ND",+ "mouser": "595-TFP401APZP"+ },+ "distributor_check": {+ "checked_at": "2026-10-05T19:02:06Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-9991-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TFP401APZP",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "DFO",+ "type": "input",+ "description": "Output clock data format control: continuous for TFT mode (low) or gated by DE for DSTN mode (high)"+ },+ {+ "number": "2",+ "name": "PD",+ "type": "input",+ "description": "Active-low power-down control for all analog circuits and output buffers"+ },+ {+ "number": "3",+ "name": "ST",+ "type": "input",+ "description": "Output drive strength select: high-drive (high) or low-drive (low)"+ },+ {+ "number": "4",+ "name": "PIXS",+ "type": "input",+ "description": "Pixel select: 1-pixel/clock mode (low) or 2-pixels/clock mode (high)"+ },+ {+ "number": "5",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground reference and current return for digital core"+ },+ {+ "number": "6",+ "name": "DVDD",+ "type": "power_out",+ "description": "Digital supply voltage nominally 3.3V for digital core"+ },+ {+ "number": "7",+ "name": "STAG",+ "type": "input",+ "description": "Active-low staggered pixel output select to reduce ground bounce in 2-pixel/clock mode"+ },+ {+ "number": "8",+ "name": "SCDT",+ "type": "output",+ "description": "Sync detect output: high for active link when DE switches, low for inactive link"+ },+ {+ "number": "9",+ "name": "PDO",+ "type": "input",+ "description": "Active-low output driver power-down control"+ },+ {+ "number": "10",+ "name": "QE0",+ "type": "output",+ "description": "Even blue-pixel output LSB synchronized to ODCK"+ },+ {+ "number": "11",+ "name": "QE1",+ "type": "output",+ "description": "Even blue-pixel output synchronized to ODCK"+ },+ {+ "number": "12",+ "name": "QE2",+ "type": "output",+ "description": "Even blue-pixel output synchronized to ODCK"+ },+ {+ "number": "13",+ "name": "QE3",+ "type": "output",+ "description": "Even blue-pixel output synchronized to ODCK"+ },+ {+ "number": "14",+ "name": "QE4",+ "type": "output",+ "description": "Even blue-pixel output synchronized to ODCK"+ },+ {+ "number": "15",+ "name": "QE5",+ "type": "output",+ "description": "Even blue-pixel output synchronized to ODCK"+ },+ {+ "number": "16",+ "name": "QE6",+ "type": "output",+ "description": "Even blue-pixel output synchronized to ODCK"+ },+ {+ "number": "17",+ "name": "QE7",+ "type": "output",+ "description": "Even blue-pixel output MSB synchronized to ODCK"+ },+ {+ "number": "18",+ "name": "OVDD",+ "type": "power_out",+ "description": "Output driver supply voltage nominally 3.3V"+ },+ {+ "number": "19",+ "name": "OGND",+ "type": "power_in",+ "description": "Output driver ground reference and current return"+ },+ {+ "number": "20",+ "name": "QE8",+ "type": "output",+ "description": "Even green-pixel output LSB synchronized to ODCK"+ },+ {+ "number": "21",+ "name": "QE9",+ "type": "output",+ "description": "Even green-pixel output synchronized to ODCK"+ },+ {+ "number": "22",+ "name": "QE10",+ "type": "output",+ "description": "Even green-pixel output synchronized to ODCK"+ },+ {+ "number": "23",+ "name": "QE11",+ "type": "output",+ "description": "Even green-pixel output synchronized to ODCK"+ },+ {+ "number": "24",+ "name": "QE12",+ "type": "output",+ "description": "Even green-pixel output synchronized to ODCK"+ },+ {+ "number": "25",+ "name": "QE13",+ "type": "output",+ "description": "Even green-pixel output synchronized to ODCK"+ },+ {+ "number": "26",+ "name": "QE14",+ "type": "output",+ "description": "Even green-pixel output synchronized to ODCK"+ },+ {+ "number": "27",+ "name": "QE15",+ "type": "output",+ "description": "Even green-pixel output MSB synchronized to ODCK"+ },+ {+ "number": "28",+ "name": "OGND",+ "type": "power_in",+ "description": "Output driver ground reference and current return"+ },+ {+ "number": "29",+ "name": "OVDD",+ "type": "power_out",+ "description": "Output driver supply voltage nominally 3.3V"+ },+ {+ "number": "30",+ "name": "QE16",+ "type": "output",+ "description": "Even red-pixel output LSB synchronized to ODCK"+ },+ {+ "number": "31",+ "name": "QE17",+ "type": "output",+ "description": "Even red-pixel output synchronized to ODCK"+ },+ {+ "number": "32",+ "name": "QE18",+ "type": "output",+ "description": "Even red-pixel output synchronized to ODCK"+ },+ {+ "number": "33",+ "name": "QE19",+ "type": "output",+ "description": "Even red-pixel output synchronized to ODCK"+ },+ {+ "number": "34",+ "name": "QE20",+ "type": "output",+ "description": "Even red-pixel output synchronized to ODCK"+ },+ {+ "number": "35",+ "name": "QE21",+ "type": "output",+ "description": "Even red-pixel output synchronized to ODCK"+ },+ {+ "number": "36",+ "name": "QE22",+ "type": "output",+ "description": "Even red-pixel output synchronized to ODCK"+ },+ {+ "number": "37",+ "name": "QE23",+ "type": "output",+ "description": "Even red-pixel output MSB synchronized to ODCK"+ },+ {+ "number": "38",+ "name": "DVDD",+ "type": "power_out",+ "description": "Digital supply voltage nominally 3.3V for digital core"+ },+ {+ "number": "39",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground reference and current return for digital core"+ },+ {+ "number": "40",+ "name": "CTL1",+ "type": "output",+ "description": "General-purpose control signal; not powered down via PDO"+ },+ {+ "number": "41",+ "name": "CTL2",+ "type": "output",+ "description": "General-purpose control signal used for user-defined control"+ },+ {+ "number": "42",+ "name": "CTL3",+ "type": "output",+ "description": "General-purpose control signal used for user-defined control"+ },+ {+ "number": "43",+ "name": "OVDD",+ "type": "power_out",+ "description": "Output driver supply voltage nominally 3.3V"+ },+ {+ "number": "44",+ "name": "ODCK",+ "type": "output",+ "description": "Output data clock (pixel clock) synchronizing all pixel outputs and control signals"+ },+ {+ "number": "45",+ "name": "OGND",+ "type": "power_in",+ "description": "Output driver ground reference and current return"+ },+ {+ "number": "46",+ "name": "DE",+ "type": "output",+ "description": "Output data enable: high during active video display, low during blank time"+ },+ {+ "number": "47",+ "name": "VSYNC",+ "type": "output",+ "description": "Vertical sync output signal"+ },+ {+ "number": "48",+ "name": "HSYNC",+ "type": "output",+ "description": "Horizontal sync output signal"+ },+ {+ "number": "49",+ "name": "QO0",+ "type": "output",+ "description": "Odd blue-pixel output LSB for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "50",+ "name": "QO1",+ "type": "output",+ "description": "Odd blue-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "51",+ "name": "QO2",+ "type": "output",+ "description": "Odd blue-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "52",+ "name": "QO3",+ "type": "output",+ "description": "Odd blue-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "53",+ "name": "QO4",+ "type": "output",+ "description": "Odd blue-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "54",+ "name": "QO5",+ "type": "output",+ "description": "Odd blue-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "55",+ "name": "QO6",+ "type": "output",+ "description": "Odd blue-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "56",+ "name": "QO7",+ "type": "output",+ "description": "Odd blue-pixel output MSB for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "57",+ "name": "OVDD",+ "type": "power_out",+ "description": "Output driver supply voltage nominally 3.3V"+ },+ {+ "number": "58",+ "name": "OGND",+ "type": "power_in",+ "description": "Output driver ground reference and current return"+ },+ {+ "number": "59",+ "name": "QO8",+ "type": "output",+ "description": "Odd green-pixel output LSB for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "60",+ "name": "QO9",+ "type": "output",+ "description": "Odd green-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "61",+ "name": "QO10",+ "type": "output",+ "description": "Odd green-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "62",+ "name": "QO11",+ "type": "output",+ "description": "Odd green-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "63",+ "name": "QO12",+ "type": "output",+ "description": "Odd green-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "64",+ "name": "QO13",+ "type": "output",+ "description": "Odd green-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "65",+ "name": "QO14",+ "type": "output",+ "description": "Odd green-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "66",+ "name": "QO15",+ "type": "output",+ "description": "Odd green-pixel output MSB for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "67",+ "name": "DVDD",+ "type": "power_out",+ "description": "Digital supply voltage nominally 3.3V for digital core"+ },+ {+ "number": "68",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground reference and current return for digital core"+ },+ {+ "number": "69",+ "name": "QO16",+ "type": "output",+ "description": "Odd red-pixel output LSB for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "70",+ "name": "QO17",+ "type": "output",+ "description": "Odd red-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "71",+ "name": "QO18",+ "type": "output",+ "description": "Odd red-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "72",+ "name": "QO19",+ "type": "output",+ "description": "Odd red-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "73",+ "name": "QO20",+ "type": "output",+ "description": "Odd red-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "74",+ "name": "QO21",+ "type": "output",+ "description": "Odd red-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "75",+ "name": "QO22",+ "type": "output",+ "description": "Odd red-pixel output for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "76",+ "name": "OGND",+ "type": "power_in",+ "description": "Output driver ground reference and current return"+ },+ {+ "number": "77",+ "name": "QO23",+ "type": "output",+ "description": "Odd red-pixel output MSB for 2-pixel/clock mode, held low in 1-pixel/clock mode"+ },+ {+ "number": "78",+ "name": "OVDD",+ "type": "power_out",+ "description": "Output driver supply voltage nominally 3.3V"+ },+ {+ "number": "79",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground reference and current return for analog circuitry"+ },+ {+ "number": "80",+ "name": "Rx2+",+ "type": "input",+ "description": "Channel-2 positive receiver input (red pixel data), TMDS low-voltage signal differential input"+ },+ {+ "number": "81",+ "name": "Rx2-",+ "type": "input",+ "description": "Channel-2 negative receiver input (red pixel data), TMDS low-voltage signal differential input"+ },+ {+ "number": "82",+ "name": "AVDD",+ "type": "power_out",+ "description": "Analog supply voltage nominally 3.3V for analog circuitry"+ },+ {+ "number": "83",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground reference and current return for analog circuitry"+ },+ {+ "number": "84",+ "name": "AVDD",+ "type": "power_out",+ "description": "Analog supply voltage nominally 3.3V for analog circuitry"+ },+ {+ "number": "85",+ "name": "Rx1+",+ "type": "input",+ "description": "Channel-1 positive receiver input (green pixel data), TMDS low-voltage signal differential input"+ },+ {+ "number": "86",+ "name": "Rx1-",+ "type": "input",+ "description": "Channel-1 negative receiver input (green pixel data), TMDS low-voltage signal differential input"+ },+ {+ "number": "87",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground reference and current return for analog circuitry"+ },+ {+ "number": "88",+ "name": "AVDD",+ "type": "power_out",+ "description": "Analog supply voltage nominally 3.3V for analog circuitry"+ },+ {+ "number": "89",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground reference and current return for analog circuitry"+ },+ {+ "number": "90",+ "name": "Rx0+",+ "type": "input",+ "description": "Channel-0 positive receiver input (blue pixel data), TMDS low-voltage signal differential input"+ },+ {+ "number": "91",+ "name": "Rx0-",+ "type": "input",+ "description": "Channel-0 negative receiver input (blue pixel data), TMDS low-voltage signal differential input"+ },+ {+ "number": "92",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground reference and current return for analog circuitry"+ },+ {+ "number": "93",+ "name": "RxC+",+ "type": "input",+ "description": "Clock positive receiver input, TMDS low-voltage signal differential input pair"+ },+ {+ "number": "94",+ "name": "RxC-",+ "type": "input",+ "description": "Clock negative receiver input, TMDS low-voltage signal differential input pair"+ },+ {+ "number": "95",+ "name": "AVDD",+ "type": "power_out",+ "description": "Analog supply voltage nominally 3.3V for analog circuitry"+ },+ {+ "number": "96",+ "name": "EXT_RES",+ "type": "input",+ "description": "Internal impedance matching reference; device internally optimized for 50Ω impedance"+ },+ {+ "number": "97",+ "name": "PVDD",+ "type": "power_out",+ "description": "PLL supply voltage for internal PLL"+ },+ {+ "number": "98",+ "name": "PGND",+ "type": "power_in",+ "description": "PLL ground reference and current return for internal PLL"+ },+ {+ "number": "99",+ "name": "RSVD",+ "type": "input",+ "description": "Reserved pin; must be tied high for normal operation"+ },+ {+ "number": "100",+ "name": "OCK_INV",+ "type": "input",+ "description": "ODCK polarity select: latches data on rising edge (high) or falling edge (low) of ODCK"+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Thermal pad present in package; cannot assign pin number as it is on package backside. Recommend sol"+ ],+ "pages_sent": 16,+ "cost_usd": 0.2339,+ "at": "2026-10-05T19:01:36"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tfp401a",+ "pages": 37,+ "sha256": "4faebec02402e979",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 100,+ "described": 100,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}