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Initial commit: component/tf2123g-e5-aq3-r

Ray ·344b6e318f ·4d ago
2 files changed +162
README.mdadded+39
@@ -0,0 +1,39 @@+# TF2123G-E5-AQ3-R++**UTC Unisonic Tech** · JFETs · SOT-723++TF2123G-E5-AQ3-R from UTC Unisonic Tech, in a SOT-723. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | S | passive | Source terminal; typically connected to ground or bias return; provides return path for drain current. |+| 2 | D | output | Drain terminal connected to load resistor and power supply; maximum drain current 10 mA; output signal is extracted from this node. |+| 3 | G | input | Gate input terminal for signal control; gate-source cutoff voltage VGS(OFF) is -0.38 V maximum; gate-drain voltage must not exceed -20 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | UTC Unisonic Tech |+| Package | SOT-723 |+| Category | Transistors/Thyristors |+| Pins | 3 |++## CAD (KiCad official)++- Symbol: `TF2123G-E5-AQ3-R`+- Footprint: `Package_TO_SOT_SMD:SOT-723`+- 3D model: SOT-723, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.5 mm nominal SOT-723 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `tf2123g-e5-aq3-r-etched.step` / `tf2123g-e5-aq3-r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tf2123g-e5-aq3-r.step` / `tf2123g-e5-aq3-r.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [UTC Unisonic Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586203135669121024) (4 pp, sha256 `eae046d5ee04c7f4`, retrieved 2026-10-01, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tf2123g-e5-aq3-r-datasheet.pdf)
page.jsonadded+123
@@ -0,0 +1,123 @@+{+  "slug": "tf2123g-e5-aq3-r",+  "version": "0.1.0",+  "type": "component",+  "description": "UTC Unisonic Tech JFETs, SOT-723. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "transistors-thyristors",+    "tf2123g-e5-aq3-r",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tf2123g-e5-aq3-r.kicad_sym",+    "tf2123g-e5-aq3-r.kicad_mod",+    "tf2123g-e5-aq3-r.glb",+    "tf2123g-e5-aq3-r.step",+    "tf2123g-e5-aq3-r.lbr",+    "docs/hero.png",+    "docs/tf2123g-e5-aq3-r-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "TF2123G-E5-AQ3-R",+    "manufacturer": "UTC Unisonic Tech",+    "package": "SOT-723",+    "pin_count": 3,+    "category": "Transistors/Thyristors",+    "subcategory": "JFETs",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586203135669121024",+    "parts": {+      "symbol": "tf2123g-e5-aq3-r.kicad_sym",+      "footprint": "tf2123g-e5-aq3-r.kicad_mod",+      "model_3d": "tf2123g-e5-aq3-r-etched.glb",+      "model_3d_plain": "tf2123g-e5-aq3-r.glb",+      "model_3d_step": "tf2123g-e5-aq3-r-etched.step",+      "model_3d_step_plain": "tf2123g-e5-aq3-r.step",+      "lbr": "tf2123g-e5-aq3-r.lbr"+    },+    "distributor_links": {+      "lcsc": "C127046"+    },+    "distributor_check": {+      "checked_at": "2026-10-01T17:22:26Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": null,+        "status": "no match"+      },+      "mouser": {+        "pn": null,+        "status": "no match"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "S",+        "type": "passive",+        "description": "Source terminal; typically connected to ground or bias return; provides return path for drain current."+      },+      {+        "number": "2",+        "name": "D",+        "type": "output",+        "description": "Drain terminal connected to load resistor and power supply; maximum drain current 10 mA; output signal is extracted from this node."+      },+      {+        "number": "3",+        "name": "G",+        "type": "input",+        "description": "Gate input terminal for signal control; gate-source cutoff voltage VGS(OFF) is -0.38 V maximum; gate-drain voltage must not exceed -20 V."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 4,+        "cost_usd": 0.0861,+        "at": "2026-10-01T17:22:07"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586203135669121024",+        "pages": 4,+        "sha256": "eae046d5ee04c7f4",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 3,+        "described": 3,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file