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Set visibility: public

Ray ·e614962df5 ·2mo ago ·parent b8c07a1
1 file changed +7−4
page.json+7−4
@@ -80,13 +80,13 @@         "number": "9",         "name": "B",         "type": "input",-        "description": "Address (select) input B - the MSB of the 2-bit channel select shared by both X and Y banks. Digital logic input referenced to VCC/GND. See Truth Table for A,B \u2192 channel mapping."+        "description": "Address (select) input B - the MSB of the 2-bit channel select shared by both X and Y banks. Digital logic input referenced to VCC/GND. See Truth Table for A,B → channel mapping."       },       {         "number": "10",         "name": "A",         "type": "input",-        "description": "Address (select) input A - the LSB of the 2-bit channel select shared by both X and Y banks. Digital logic input referenced to VCC/GND. See Truth Table for A,B \u2192 channel mapping."+        "description": "Address (select) input A - the LSB of the 2-bit channel select shared by both X and Y banks. Digital logic input referenced to VCC/GND. See Truth Table for A,B → channel mapping."       },       {         "number": "11",@@ -122,7 +122,7 @@         "number": "16",         "name": "VCC",         "type": "power_in",-        "description": "Positive digital / analog supply, 2 V to 6 V (VCC-VEE \u2264 12 V). Powers the internal logic and sets the upper limit of the analog signal range. Bypass locally with a 0.1 \u00b5F ceramic to GND."+        "description": "Positive digital / analog supply, 2 V to 6 V (VCC-VEE ≤ 12 V). Powers the internal logic and sets the upper limit of the analog signal range. Bypass locally with a 0.1 µF ceramic to GND."       }     ],     "provenance": {@@ -196,5 +196,8 @@     "docs/tc74hc4052aft-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file