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Initial commit: component/t835t-8g-tr

Ray ·09a199626b ·1d ago
2 files changed +209
README.mdadded+39
@@ -0,0 +1,39 @@+# T835T-8G-TR++**STMicroelectronics** · Thyristors (SCR)/Modules · D2PAK++T835T-8G-TR from STMicroelectronics, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A1 | passive | Main terminal A1 (Anode1); all VDRM/VRRM, IT(RMS) and dV/dt ratings are stated for both polarities of A2 referenced to A1. |+| 2 | A2 | passive | Main terminal A2 (Anode2) with 800 V repetitive peak off-state voltage at Tj = 125 °C and 600 V at Tj = 150 °C; the non-insulated tab is also present and the datasheet's package drawing shows A2 at the tab position. |+| 3 | G | input | Gate terminal with peak gate current IGM 4 A (tp = 20 µs, Tj = 150 °C), peak gate voltage VGM 5 V, and average gate power PG(AV) 1 W at Tj = 150 °C. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | D2PAK |+| Category | Transistors/Thyristors |+| Pins | 3 |++## CAD (KiCad official)++- Symbol: `T835T-8G-TR`+- Footprint: `Package_TO_SOT_SMD:TO-263-2`+- 3D model: D2PAK (KiCad packages3D, STEP)+- 3D model files: `t835t-8g-tr-etched.step` / `t835t-8g-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `t835t-8g-tr.step` / `t835t-8g-tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603034704920653824) (11 pp, sha256 `69c1d8183130c3dc`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/t835t-8g-tr-datasheet.pdf)
page.jsonadded+170
@@ -0,0 +1,170 @@+{+  "slug": "t835t-8g-tr",+  "version": "0.1.0",+  "type": "component",+  "description": "STMicroelectronics Thyristors (SCR)/Modules, D2PAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "transistors-thyristors",+    "t835t-8g-tr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "t835t-8g-tr.kicad_sym",+    "t835t-8g-tr.kicad_mod",+    "t835t-8g-tr.glb",+    "t835t-8g-tr.step",+    "t835t-8g-tr.lbr",+    "docs/hero.png",+    "docs/t835t-8g-tr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "t835t-8g-tr-hero.glb",+    "t835t-8g-tr-hero.overlay.json"+  ],+  "component": {+    "mpn": "T835T-8G-TR",+    "manufacturer": "STMicroelectronics",+    "package": "D2PAK",+    "pin_count": 3,+    "category": "Transistors/Thyristors",+    "subcategory": "Thyristors (SCR)/Modules",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603034704920653824",+    "parts": {+      "symbol": "t835t-8g-tr.kicad_sym",+      "footprint": "t835t-8g-tr.kicad_mod",+      "model_3d": "t835t-8g-tr-hero.glb",+      "model_3d_plain": "t835t-8g-tr.glb",+      "model_3d_step": "t835t-8g-tr-etched.step",+      "model_3d_step_plain": "t835t-8g-tr.step",+      "lbr": "t835t-8g-tr.lbr"+    },+    "distributor_links": {+      "lcsc": "C3018657",+      "digikey": "497-18256-2-ND",+      "mouser": "511-T835T-8G-TR"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T18:05:34Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "497-18256-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "511-T835T-8G-TR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "A1",+        "type": "passive",+        "description": "Main terminal A1 (Anode1); all VDRM/VRRM, IT(RMS) and dV/dt ratings are stated for both polarities of A2 referenced to A1."+      },+      {+        "number": "2",+        "name": "A2",+        "type": "passive",+        "description": "Main terminal A2 (Anode2) with 800 V repetitive peak off-state voltage at Tj = 125 °C and 600 V at Tj = 150 °C; the non-insulated tab is also present and the datasheet's package drawing shows A2 at the tab position."+      },+      {+        "number": "3",+        "name": "G",+        "type": "input",+        "description": "Gate terminal with peak gate current IGM 4 A (tp = 20 µs, Tj = 150 °C), peak gate voltage VGM 5 V, and average gate power PG(AV) 1 W at Tj = 150 °C."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The datasheet lists the pin names (A1, A2, G) and shows the numerals '1 2 3' on the D2PAK outline dr; The text does not explicitly state that the non-insulated tab is internally connected to A2. The A2 "+        ],+        "pages_sent": 11,+        "cost_usd": 0.106,+        "at": "2026-10-08T18:05:09"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603034704920653824",+        "pages": 11,+        "sha256": "69c1d8183130c3dc",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 3,+        "described": 3,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "t835t-8g-tr.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          15,+          10,+          4.42+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "804a3f76e4182a02567b2429bdc9a585b857158fb8543fccd29c8eb6780e1310",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "t835t-8g-tr-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          15,+          10,+          4.42+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "7c4474632c0e57d210516ac701bc61beb282b86de315e63d511e293ab67bef6b",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file