component
T835-600G-TR
Public Made by Adomby adom
STMicroelectronics Thyristors (SCR)/Modules, D2PAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+39@@ -0,0 +1,39 @@+# T835-600G-TR++**STMicroelectronics** · Thyristors (SCR)/Modules · D2PAK++T835-600G-TR from STMicroelectronics, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A1 | passive | Main terminal A1, the reference terminal for gate triggering (IGT, VGT and holding/latching currents are specified with A2 referenced to A1). |+| 2 | A2 | passive | Main terminal A2, also connected to the tab; repetitive peak off-state voltage VDRM/VRRM is 600 V for T835-600G and RMS on-state current is 8 A at Tc = 110 °C. |+| 3 | G | input | Gate trigger input; T835 triggering gate current IGT is 35 mA max in quadrants I-II-III with VGT 1.2 V max. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | D2PAK |+| Category | Transistors/Thyristors |+| Pins | 3 |++## CAD (KiCad official)++- Symbol: `T835-600G-TR`+- Footprint: `Package_TO_SOT_SMD:TO-263-2`+- 3D model: D2PAK (KiCad packages3D, STEP)+- 3D model files: `t835-600g-tr-etched.step` / `t835-600g-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `t835-600g-tr.step` / `t835-600g-tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586203668639059968) (18 pp, sha256 `a75018e9bb145502`, retrieved 2026-10-01, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/t835-600g-tr-datasheet.pdf)
page.jsonadded+129@@ -0,0 +1,129 @@+{+ "slug": "t835-600g-tr",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Thyristors (SCR)/Modules, D2PAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "transistors-thyristors",+ "t835-600g-tr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "t835-600g-tr.kicad_sym",+ "t835-600g-tr.kicad_mod",+ "t835-600g-tr.glb",+ "t835-600g-tr.step",+ "t835-600g-tr.lbr",+ "docs/hero.png",+ "docs/t835-600g-tr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "T835-600G-TR",+ "manufacturer": "STMicroelectronics",+ "package": "D2PAK",+ "pin_count": 3,+ "category": "Transistors/Thyristors",+ "subcategory": "Thyristors (SCR)/Modules",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586203668639059968",+ "parts": {+ "symbol": "t835-600g-tr.kicad_sym",+ "footprint": "t835-600g-tr.kicad_mod",+ "model_3d": "t835-600g-tr-etched.glb",+ "model_3d_plain": "t835-600g-tr.glb",+ "model_3d_step": "t835-600g-tr-etched.step",+ "model_3d_step_plain": "t835-600g-tr.step",+ "lbr": "t835-600g-tr.lbr"+ },+ "distributor_links": {+ "lcsc": "C155550",+ "digikey": "497-2507-2-ND",+ "mouser": "511-T835-600G-TR"+ },+ "distributor_check": {+ "checked_at": "2026-10-01T00:28:02Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-2507-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-T835-600G-TR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "A1",+ "type": "passive",+ "description": "Main terminal A1, the reference terminal for gate triggering (IGT, VGT and holding/latching currents are specified with A2 referenced to A1)."+ },+ {+ "number": "2",+ "name": "A2",+ "type": "passive",+ "description": "Main terminal A2, also connected to the tab; repetitive peak off-state voltage VDRM/VRRM is 600 V for T835-600G and RMS on-state current is 8 A at Tc = 110 °C."+ },+ {+ "number": "3",+ "name": "G",+ "type": "input",+ "description": "Gate trigger input; T835 triggering gate current IGT is 35 mA max in quadrants I-II-III with VGT 1.2 V max."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-sonnet-5-5",+ "primary_mode": "text+vision",+ "consensus_model": "claude-opus-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet never prints pin numbers for the D2PAK; page 1 only labels the leads A1, A2 and G, and; The D2PAK outline shows only the two outer leads and the tab, with the middle lead cut short, but th",+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 18,+ "cost_usd": 0.3478,+ "at": "2026-10-01T00:27:48"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586203668639059968",+ "pages": 18,+ "sha256": "a75018e9bb145502",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 3,+ "described": 3,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}