component
T435-600B
Public Made by Adomby adom
STMicroelectronics Thyristors (SCR)/Modules, DPAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+39@@ -0,0 +1,39 @@+# T435-600B++**STMicroelectronics** · Thyristors (SCR)/Modules · DPAK++T435-600B from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A1 | passive | Main terminal A1 of the triac, the reference for gate and A2 polarities (VDRM/VRRM 600 V for this T435-600B, IT(rms) 4 A at Tc = 110 °C). |+| 2 | A2 | passive | Main terminal A2 of the triac, also connected to the DPAK tab (VDRM/VRRM 600 V, IT(rms) 4 A at Tc = 110 °C). |+| 3 | G | input | Gate trigger input; IGT max 35 mA and VGT max 1.3 V at VD = 12 V, RL = 30 Ω in quadrants I-II-III. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | DPAK |+| Category | Transistors/Thyristors |+| Pins | 3 |++## CAD (KiCad official)++- Symbol: `T435-600B`+- Footprint: `Package_TO_SOT_SMD:TO-252-2`+- 3D model: DPAK (KiCad packages3D, STEP)+- 3D model files: `t435-600b-etched.step` / `t435-600b-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `t435-600b.step` / `t435-600b.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603168810334121984) (15 pp, sha256 `e28e0c1c755cad1e`, retrieved 2026-10-06, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/t435-600b-datasheet.pdf)
page.jsonadded+130@@ -0,0 +1,130 @@+{+ "slug": "t435-600b",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Thyristors (SCR)/Modules, DPAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "transistors-thyristors",+ "t435-600b",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "t435-600b.kicad_sym",+ "t435-600b.kicad_mod",+ "t435-600b.glb",+ "t435-600b.step",+ "t435-600b.lbr",+ "docs/hero.png",+ "docs/t435-600b-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "t435-600b-hero.glb",+ "t435-600b-hero.overlay.json"+ ],+ "component": {+ "mpn": "T435-600B",+ "manufacturer": "STMicroelectronics",+ "package": "DPAK",+ "pin_count": 3,+ "category": "Transistors/Thyristors",+ "subcategory": "Thyristors (SCR)/Modules",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603168810334121984",+ "parts": {+ "symbol": "t435-600b.kicad_sym",+ "footprint": "t435-600b.kicad_mod",+ "model_3d": "t435-600b-hero.glb",+ "model_3d_plain": "t435-600b.glb",+ "model_3d_step": "t435-600b-etched.step",+ "model_3d_step_plain": "t435-600b.step",+ "lbr": "t435-600b.lbr"+ },+ "distributor_links": {+ "lcsc": 2971312,+ "digikey": "497-3798-5-ND",+ "mouser": "511-T435-600B"+ },+ "distributor_check": {+ "checked_at": "2026-10-06T04:08:37Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-3798-5-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-T435-600B",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "A1",+ "type": "passive",+ "description": "Main terminal A1 of the triac, the reference for gate and A2 polarities (VDRM/VRRM 600 V for this T435-600B, IT(rms) 4 A at Tc = 110 °C)."+ },+ {+ "number": "2",+ "name": "A2",+ "type": "passive",+ "description": "Main terminal A2 of the triac, also connected to the DPAK tab (VDRM/VRRM 600 V, IT(rms) 4 A at Tc = 110 °C)."+ },+ {+ "number": "3",+ "name": "G",+ "type": "input",+ "description": "Gate trigger input; IGT max 35 mA and VGT max 1.3 V at VD = 12 V, RL = 30 Ω in quadrants I-II-III."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet does not provide an explicit pin numbering diagram for the DPAK package. The pinout fo"+ ],+ "pages_sent": 15,+ "cost_usd": 0.1403,+ "at": "2026-10-06T04:08:24"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603168810334121984",+ "pages": 15,+ "sha256": "e28e0c1c755cad1e",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 3,+ "described": 3,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}