component
SY8120B1ABC
Public Made by Adomby adom
Silergy Corp DC-DC Converters, SOT-23-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C88474). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+29−9
page.json+9−7@@ -26,43 +26,45 @@ "model_3d_step": "sy8120b1abc.step", "lbr": "sy8120b1abc.lbr" },- "distributor_links": {},+ "distributor_links": {+ "lcsc": "C88474"+ }, "pins": [ { "number": "1", "name": "BS", "type": "passive",- "description": "Boot-strap pin. Supplies the high-side gate driver via a bootstrap capacitor. Decouple to LX with a 0.1 µF ceramic capacitor. Absolute maximum BS-LX voltage is 4 V."+ "description": "Boot-strap pin. Supplies the high-side gate driver via a bootstrap capacitor. Decouple to LX with a 0.1 \u00b5F ceramic capacitor. Absolute maximum BS-LX voltage is 4 V." }, { "number": "2", "name": "GND", "type": "power_in",- "description": "Device ground. Also serves as the thermal case reference (θJC measured at this pin). Connect to a large PCB copper plane for best thermal and noise performance."+ "description": "Device ground. Also serves as the thermal case reference (\u03b8JC measured at this pin). Connect to a large PCB copper plane for best thermal and noise performance." }, { "number": "3", "name": "FB", "type": "input",- "description": "Output feedback pin. Connect to the center point of the external resistor divider to program VOUT via Vout = 0.6 × (1 + R1/R2). Internal reference is 0.6 V ±2%; FB input current is ±50 nA max."+ "description": "Output feedback pin. Connect to the center point of the external resistor divider to program VOUT via Vout = 0.6 \u00d7 (1 + R1/R2). Internal reference is 0.6 V \u00b12%; FB input current is \u00b150 nA max." }, { "number": "4", "name": "EN", "type": "input",- "description": "Enable control input. Pull high (≥1.5 V) to turn the regulator on, pull below 0.4 V to shut down. Do not float; absolute maximum is VIN + 0.3 V. Consider a 1 MΩ pull-down to GND if driven from a high-impedance source."+ "description": "Enable control input. Pull high (\u22651.5 V) to turn the regulator on, pull below 0.4 V to shut down. Do not float; absolute maximum is VIN + 0.3 V. Consider a 1 M\u03a9 pull-down to GND if driven from a high-impedance source." }, { "number": "5", "name": "IN", "type": "power_in",- "description": "Input supply pin. Operates from 4.5 V to 18 V (19 V absolute maximum). Decouple to GND with at least a 1 µF (4.7 µF recommended) low-ESR X5R ceramic capacitor placed close to the pin."+ "description": "Input supply pin. Operates from 4.5 V to 18 V (19 V absolute maximum). Decouple to GND with at least a 1 \u00b5F (4.7 \u00b5F recommended) low-ESR X5R ceramic capacitor placed close to the pin." }, { "number": "6", "name": "LX", "type": "power_out",- "description": "Switching node. Connect to the external output inductor. Internal top FET RDS(on) 130 mΩ, bottom FET 120 mΩ; peak current limit 3.6 A, valley current limit 2 A. Minimize PCB copper area on this net to reduce EMI."+ "description": "Switching node. Connect to the external output inductor. Internal top FET RDS(on) 130 m\u03a9, bottom FET 120 m\u03a9; peak current limit 3.6 A, valley current limit 2 A. Minimize PCB copper area on this net to reduce EMI." } ], "provenance": {
sy8120b1abc.lbr+20−2@@ -60,6 +60,18 @@ <smd name="4" x="1.1375" y="-0.9500" dx="1.3250" dy="0.6000" layer="1"/> <smd name="5" x="1.1375" y="-0.0000" dx="1.3250" dy="0.6000" layer="1"/> <smd name="6" x="1.1375" y="0.9500" dx="1.3250" dy="0.6000" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-1.4500" y="1.5100"/>+ <vertex x="-1.6900" y="1.8400"/>+ <vertex x="-1.2100" y="1.8400"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-0.4000" y="1.4500"/>+ <vertex x="0.8000" y="1.4500"/>+ <vertex x="0.8000" y="-1.4500"/>+ <vertex x="-0.8000" y="-1.4500"/>+ <vertex x="-0.8000" y="1.0500"/>+ </polygon> <wire x1="-0.9100" y1="1.5600" x2="0.9100" y2="1.5600" width="0.1200" layer="21"/> <wire x1="-0.9100" y1="1.5100" x2="-0.9100" y2="1.5600" width="0.1200" layer="21"/> <wire x1="-0.9100" y1="-1.5600" x2="-0.9100" y2="-1.5100" width="0.1200" layer="21"/>@@ -68,7 +80,7 @@ <wire x1="0.9100" y1="-1.5600" x2="-0.9100" y2="-1.5600" width="0.1200" layer="21"/> <text x="0" y="2.212" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-2.212" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-1.4500" y="1.5100"/><vertex x="-1.6900" y="1.8400"/><vertex x="-1.2100" y="1.8400"/></polygon></package>+</package> </packages> <symbols> <symbol name="SY8120B1ABC">@@ -102,7 +114,13 @@ <connect gate="G$1" pin="IN" pad="5"/> <connect gate="G$1" pin="EN" pad="4"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="SY8120B1ABC" constant="no"/>+ <attribute name="MANUFACTURER" value="Silergy Corp" constant="no"/>+ <attribute name="LCSC_PN" value="C88474" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>