component
SY8089AAAC
Public Made by Adomby adom
Silergy Corp DC-DC Converters, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.md+14@@ -34,6 +34,20 @@ SY8089AAAC from Silergy Corp, in a SOT-23-5. Pinout and pin descriptions extract - Footprint: `Package_TO_SOT_SMD:SOT-23-5` - 3D model: SOT-23-5 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`sy8089aaac.step`](sy8089aaac.step) | 85 KB | You want the bare part, or you mark your own boards. |+| [`sy8089aaac-etched.step`](sy8089aaac-etched.step) | 2.2 MB | You want the part with `SY8089AAAC` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 515 faces against 102 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1@@ -1,6 +1,6 @@ { "slug": "sy8089aaac",- "version": "0.1.0",+ "version": "0.2.0", "type": "component", "description": "Silergy Corp DC-DC Converters, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "tags": [
page.json+9−9@@ -4,7 +4,7 @@ "slug": "sy8089aaac", "title": "SY8089AAAC", "brief": "Silergy Corp DC-DC Converters, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.2.0", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -34,7 +34,7 @@ "number": "1", "name": "EN", "type": "input",- "description": "Enable control input. Pull high (>1.5V) to turn on the regulator; pull low (<0.4V) to shut down (Ishdn ~0.1\u00b5A). Do not float; add a 1M\u03a9 pull-down to GND if the driving source can go high-Z."+ "description": "Enable control input. Pull high (>1.5V) to turn on the regulator; pull low (<0.4V) to shut down (Ishdn ~0.1µA). Do not float; add a 1MΩ pull-down to GND if the driving source can go high-Z." }, { "number": "2",@@ -46,19 +46,19 @@ "number": "3", "name": "LX", "type": "power_out",- "description": "Switching node output; connect to the external inductor (typ. 2.2\u00b5H). Internal PFET (110m\u03a9) sources to VIN and NFET (80m\u03a9) sinks to GND; peak current limit 3.5A. Minimize PCB copper area on this node to reduce switching noise."+ "description": "Switching node output; connect to the external inductor (typ. 2.2µH). Internal PFET (110mΩ) sources to VIN and NFET (80mΩ) sinks to GND; peak current limit 3.5A. Minimize PCB copper area on this node to reduce switching noise." }, { "number": "4", "name": "IN", "type": "power_in",- "description": "Supply input, 2.7V to 5.5V (abs max 6.0V). Decouple to GND with at least a 10\u00b5F (typ. 22\u00b5F) X5R/X7R ceramic capacitor placed close to the IN and GND pins."+ "description": "Supply input, 2.7V to 5.5V (abs max 6.0V). Decouple to GND with at least a 10µF (typ. 22µF) X5R/X7R ceramic capacitor placed close to the IN and GND pins." }, { "number": "5", "name": "FB", "type": "input",- "description": "Output voltage feedback input. Connect to the mid-point of the R1/R2 output divider to program Vout = 0.6V \u00d7 (1 + R1/R2). Reference is 0.6V (\u00b12%); IFB \u00b150nA. Keep FB trace away from the LX net."+ "description": "Output voltage feedback input. Connect to the mid-point of the R1/R2 output divider to program Vout = 0.6V × (1 + R1/R2). Reference is 0.6V (±2%); IFB ±50nA. Keep FB trace away from the LX net." } ], "provenance": {@@ -132,9 +132,9 @@ "docs/hero.png", "docs/sy8089aaac-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "pads.json" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "Silergy Corp DC-DC Converters, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D." }