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Initial commit: component/stp18n60m2

Ray ·d0c15b7100 ·8d ago
2 files changed +167
README.mdadded+39
@@ -0,0 +1,39 @@+# STP18N60M2++**STMicroelectronics** · MOSFETs · TO-220++STP18N60M2 from STMicroelectronics, in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | Gate | input | Gate terminal for channel control, accepts gate-source voltage from -25 V to +25 V with gate threshold voltage of 2 to 4 V at ID = 250 µA. |+| 2 | Drain | passive | Drain terminal rated for continuous current of 13 A at TC = 25 °C and 8 A at TC = 100 °C, with drain-source breakdown voltage of 600 V minimum at ID = 1 mA. |+| 3 | Source | passive | Source terminal providing return current path for drain current and serving as reference for gate-source voltage measurements. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | TO-220 |+| Category | Transistors/Thyristors |+| Pins | 3 |++## CAD (KiCad official)++- Symbol: `STP18N60M2`+- Footprint: `Package_TO_SOT_THT:TO-220-3_Vertical`+- 3D model: TO-220 (KiCad packages3D, STEP)+- 3D model files: `stp18n60m2-etched.step` / `stp18n60m2-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stp18n60m2.step` / `stp18n60m2.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590162643534721024) (27 pp, sha256 `65d58cc2b18e5c96`, retrieved 2026-09-27, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stp18n60m2-datasheet.pdf)
page.jsonadded+128
@@ -0,0 +1,128 @@+{+  "slug": "stp18n60m2",+  "version": "0.1.0",+  "type": "component",+  "description": "STMicroelectronics MOSFETs, TO-220. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "transistors-thyristors",+    "stp18n60m2",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "stp18n60m2.kicad_sym",+    "stp18n60m2.kicad_mod",+    "stp18n60m2.glb",+    "stp18n60m2.step",+    "stp18n60m2.lbr",+    "docs/hero.png",+    "docs/stp18n60m2-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "STP18N60M2",+    "manufacturer": "STMicroelectronics",+    "package": "TO-220",+    "pin_count": 3,+    "category": "Transistors/Thyristors",+    "subcategory": "MOSFETs",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590162643534721024",+    "parts": {+      "symbol": "stp18n60m2.kicad_sym",+      "footprint": "stp18n60m2.kicad_mod",+      "model_3d": "stp18n60m2-etched.glb",+      "model_3d_plain": "stp18n60m2.glb",+      "model_3d_step": "stp18n60m2-etched.step",+      "model_3d_step_plain": "stp18n60m2.step",+      "lbr": "stp18n60m2.lbr"+    },+    "distributor_links": {+      "lcsc": "C726098",+      "digikey": "497-13971-5-ND",+      "mouser": "511-STP18N60M2"+    },+    "distributor_check": {+      "checked_at": "2026-09-27T14:26:46Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "497-13971-5-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "511-STP18N60M2",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "Gate",+        "type": "input",+        "description": "Gate terminal for channel control, accepts gate-source voltage from -25 V to +25 V with gate threshold voltage of 2 to 4 V at ID = 250 µA."+      },+      {+        "number": "2",+        "name": "Drain",+        "type": "passive",+        "description": "Drain terminal rated for continuous current of 13 A at TC = 25 °C and 8 A at TC = 100 °C, with drain-source breakdown voltage of 600 V minimum at ID = 1 mA."+      },+      {+        "number": "3",+        "name": "Source",+        "type": "passive",+        "description": "Source terminal providing return current path for drain current and serving as reference for gate-source voltage measurements."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "dropped thermal pad ['EP'] absent from footprint"+        ],+        "pages_sent": 27,+        "cost_usd": 0.2794,+        "at": "2026-09-27T14:26:30"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590162643534721024",+        "pages": 27,+        "sha256": "65d58cc2b18e5c96",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 3,+        "described": 3,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file