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STM8S105K4T3CTR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+68@@ -0,0 +1,68 @@+# STM8S105K4T3CTR++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)++STM8S105K4T3CTR from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | NRST | bidirectional | Reset input/output pin (I/O, no alternate function listed). |+| 2 | PA1/OSCIN | bidirectional | Port A1 I/O (slow, up to 2 MHz, O1) whose alternate function is resonator/crystal input OSCIN, or external clock input when OPT4 EXTCLK=1. |+| 3 | PA2/OSCOUT | bidirectional | Port A2 I/O (slow, up to 2 MHz, O1) whose alternate function is resonator/crystal output OSCOUT. |+| 4 | VSS | power_in | Digital ground. |+| 5 | VCAP | passive | Connection for the 1.8 V regulator external capacitor. |+| 6 | VDD | power_in | Digital power supply; device operating voltage is 2.95 to 5.5 V. |+| 7 | VDDIO | power_in | I/O power supply (listed as VDDIO_1 in the table). |+| 8 | PF4/AIN12 | bidirectional | Port F4 I/O (slow, O1) with analog input 12; pulled up during reset, floating input after reset release, and AIN12 is not selectable in ADC scan mode or with analog watchdog. |+| 9 | VDDA | power_in | Analog power supply. |+| 10 | VSSA | power_in | Analog ground. |+| 11 | PB5/AIN5 | bidirectional | Port B5 I/O (slow, O1, external interrupt) with analog input 5; I2C_SDA after remap with option bit AFR6. |+| 12 | PB4/AIN4 | bidirectional | Port B4 I/O (slow, O1, external interrupt) with analog input 4; I2C_SCL after remap with option bit AFR6. |+| 13 | PB3/AIN3 | bidirectional | Port B3 I/O (slow, O1, external interrupt) with analog input 3; TIM1_ETR after remap with option bit AFR5. |+| 14 | PB2/AIN2 | bidirectional | Port B2 I/O (slow, O1, external interrupt) with analog input 2; TIM1_CH3N after remap with option bit AFR5. |+| 15 | PB1/AIN1 | bidirectional | Port B1 I/O (slow, O1, external interrupt) with analog input 1; TIM1_CH2N after remap with option bit AFR5. |+| 16 | PB0/AIN0 | bidirectional | Port B0 I/O (slow, O1, external interrupt) with analog input 0; TIM1_CH1N after remap with option bit AFR5. |+| 17 | PE5/SPI_NSS | bidirectional | Port E5 I/O (slow, O1, external interrupt) used as SPI master/slave select. |+| 18 | PC1/TIM1_CH1/UART2_CK | bidirectional | Port C1 high-sink I/O (O3, external interrupt) used as Timer 1 channel 1 or UART2 synchronous clock. |+| 19 | PC2/TIM1_CH2 | bidirectional | Port C2 high-sink I/O (O3, external interrupt) used as Timer 1 channel 2. |+| 20 | PC3/TIM1_CH3 | bidirectional | Port C3 high-sink I/O (O3, external interrupt) used as Timer 1 channel 3. |+| 21 | PC4/TIM1_CH4 | bidirectional | Port C4 high-sink I/O (O3, external interrupt) used as Timer 1 channel 4. |+| 22 | PC5/SPI_SCK | bidirectional | Port C5 high-sink I/O (O3) used as SPI clock. |+| 23 | PC6/SPI_MOSI | bidirectional | Port C6 high-sink I/O (O3, external interrupt) used as SPI master out/slave in. |+| 24 | PC7/SPI_MISO | bidirectional | Port C7 high-sink I/O (O3, external interrupt) used as SPI master in/slave out. |+| 25 | PD0/TIM3_CH2 | bidirectional | Port D0 high-sink I/O (O3, external interrupt) used as Timer 3 channel 2; TIM1_BKIN with AFR3 or CLK_CCO with AFR2 after remap. |+| 26 | PD1/SWIM | bidirectional | Port D1 high-sink I/O (O4, external interrupt) used as SWIM data interface; input pull-up during reset and after internal reset release. |+| 27 | PD2/TIM3_CH1 | bidirectional | Port D2 high-sink I/O (O3, external interrupt) used as Timer 3 channel 1; TIM2_CH3 after remap with option bit AFR1. |+| 28 | PD3/TIM2_CH2 | bidirectional | Port D3 high-sink I/O (O3, external interrupt) used as Timer 2 channel 2; ADC_ETR after remap with option bit AFR0. |+| 29 | PD4/TIM2_CH1 | bidirectional | Port D4 high-sink I/O (O3, external interrupt) used as Timer 2 channel 1; BEEP output after remap with option bit AFR7. |+| 30 | PD5/UART2_TX | bidirectional | Port D5 I/O (slow, O1, external interrupt) used as UART2 data transmit. |+| 31 | PD6/UART2_RX | bidirectional | Port D6 I/O (slow, O1, external interrupt) used as UART2 data receive. |+| 32 | PD7/TLI | bidirectional | Port D7 I/O (slow, O1, external interrupt) used as top level interrupt; TIM1_CH4 after remap with option bit AFR4. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-32(7x7) |+| Category | Embedded Processors & Controllers |+| Pins | 32 |++## CAD (KiCad official)++- Symbol: `STM8S105K4T3CTR`+- Footprint: `Package_QFP:LQFP-32_7x7mm_P0.8mm`+- 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)+- 3D model files: `stm8s105k4t3ctr-etched.step` / `stm8s105k4t3ctr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm8s105k4t3ctr.step` / `stm8s105k4t3ctr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588942639186259968) (121 pp, sha256 `b1007bc27bb78327`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm8s105k4t3ctr-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm8s105k4t3ctr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm8s105k4t3ctr.kicad_sym",+ "stm8s105k4t3ctr.kicad_mod",+ "stm8s105k4t3ctr.glb",+ "stm8s105k4t3ctr.step",+ "stm8s105k4t3ctr.lbr",+ "docs/hero.png",+ "docs/stm8s105k4t3ctr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm8s105k4t3ctr-hero.glb",+ "stm8s105k4t3ctr-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM8S105K4T3CTR",+ "manufacturer": "STMicroelectronics",+ "package": "LQFP-32(7x7)",+ "pin_count": 32,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588942639186259968",+ "parts": {+ "symbol": "stm8s105k4t3ctr.kicad_sym",+ "footprint": "stm8s105k4t3ctr.kicad_mod",+ "model_3d": "stm8s105k4t3ctr-hero.glb",+ "model_3d_plain": "stm8s105k4t3ctr.glb",+ "model_3d_step": "stm8s105k4t3ctr-etched.step",+ "model_3d_step_plain": "stm8s105k4t3ctr.step",+ "lbr": "stm8s105k4t3ctr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2053291",+ "digikey": "497-19028-2-ND",+ "mouser": "511-STM8S105K4T3CTR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T14:55:23Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-19028-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-STM8S105K4T3CTR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Reset input/output pin (I/O, no alternate function listed)."+ },+ {+ "number": "2",+ "name": "PA1/OSCIN",+ "type": "bidirectional",+ "description": "Port A1 I/O (slow, up to 2 MHz, O1) whose alternate function is resonator/crystal input OSCIN, or external clock input when OPT4 EXTCLK=1."+ },+ {+ "number": "3",+ "name": "PA2/OSCOUT",+ "type": "bidirectional",+ "description": "Port A2 I/O (slow, up to 2 MHz, O1) whose alternate function is resonator/crystal output OSCOUT."+ },+ {+ "number": "4",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground."+ },+ {+ "number": "5",+ "name": "VCAP",+ "type": "passive",+ "description": "Connection for the 1.8 V regulator external capacitor."+ },+ {+ "number": "6",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital power supply; device operating voltage is 2.95 to 5.5 V."+ },+ {+ "number": "7",+ "name": "VDDIO",+ "type": "power_in",+ "description": "I/O power supply (listed as VDDIO_1 in the table)."+ },+ {+ "number": "8",+ "name": "PF4/AIN12",+ "type": "bidirectional",+ "description": "Port F4 I/O (slow, O1) with analog input 12; pulled up during reset, floating input after reset release, and AIN12 is not selectable in ADC scan mode or with analog watchdog."+ },+ {+ "number": "9",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog power supply."+ },+ {+ "number": "10",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground."+ },+ {+ "number": "11",+ "name": "PB5/AIN5",+ "type": "bidirectional",+ "description": "Port B5 I/O (slow, O1, external interrupt) with analog input 5; I2C_SDA after remap with option bit AFR6."+ },+ {+ "number": "12",+ "name": "PB4/AIN4",+ "type": "bidirectional",+ "description": "Port B4 I/O (slow, O1, external interrupt) with analog input 4; I2C_SCL after remap with option bit AFR6."+ },+ {+ "number": "13",+ "name": "PB3/AIN3",+ "type": "bidirectional",+ "description": "Port B3 I/O (slow, O1, external interrupt) with analog input 3; TIM1_ETR after remap with option bit AFR5."+ },+ {+ "number": "14",+ "name": "PB2/AIN2",+ "type": "bidirectional",+ "description": "Port B2 I/O (slow, O1, external interrupt) with analog input 2; TIM1_CH3N after remap with option bit AFR5."+ },+ {+ "number": "15",+ "name": "PB1/AIN1",+ "type": "bidirectional",+ "description": "Port B1 I/O (slow, O1, external interrupt) with analog input 1; TIM1_CH2N after remap with option bit AFR5."+ },+ {+ "number": "16",+ "name": "PB0/AIN0",+ "type": "bidirectional",+ "description": "Port B0 I/O (slow, O1, external interrupt) with analog input 0; TIM1_CH1N after remap with option bit AFR5."+ },+ {+ "number": "17",+ "name": "PE5/SPI_NSS",+ "type": "bidirectional",+ "description": "Port E5 I/O (slow, O1, external interrupt) used as SPI master/slave select."+ },+ {+ "number": "18",+ "name": "PC1/TIM1_CH1/UART2_CK",+ "type": "bidirectional",+ "description": "Port C1 high-sink I/O (O3, external interrupt) used as Timer 1 channel 1 or UART2 synchronous clock."+ },+ {+ "number": "19",+ "name": "PC2/TIM1_CH2",+ "type": "bidirectional",+ "description": "Port C2 high-sink I/O (O3, external interrupt) used as Timer 1 channel 2."+ },+ {+ "number": "20",+ "name": "PC3/TIM1_CH3",+ "type": "bidirectional",+ "description": "Port C3 high-sink I/O (O3, external interrupt) used as Timer 1 channel 3."+ },+ {+ "number": "21",+ "name": "PC4/TIM1_CH4",+ "type": "bidirectional",+ "description": "Port C4 high-sink I/O (O3, external interrupt) used as Timer 1 channel 4."+ },+ {+ "number": "22",+ "name": "PC5/SPI_SCK",+ "type": "bidirectional",+ "description": "Port C5 high-sink I/O (O3) used as SPI clock."+ },+ {+ "number": "23",+ "name": "PC6/SPI_MOSI",+ "type": "bidirectional",+ "description": "Port C6 high-sink I/O (O3, external interrupt) used as SPI master out/slave in."+ },+ {+ "number": "24",+ "name": "PC7/SPI_MISO",+ "type": "bidirectional",+ "description": "Port C7 high-sink I/O (O3, external interrupt) used as SPI master in/slave out."+ },+ {+ "number": "25",+ "name": "PD0/TIM3_CH2",+ "type": "bidirectional",+ "description": "Port D0 high-sink I/O (O3, external interrupt) used as Timer 3 channel 2; TIM1_BKIN with AFR3 or CLK_CCO with AFR2 after remap."+ },+ {+ "number": "26",+ "name": "PD1/SWIM",+ "type": "bidirectional",+ "description": "Port D1 high-sink I/O (O4, external interrupt) used as SWIM data interface; input pull-up during reset and after internal reset release."+ },+ {+ "number": "27",+ "name": "PD2/TIM3_CH1",+ "type": "bidirectional",+ "description": "Port D2 high-sink I/O (O3, external interrupt) used as Timer 3 channel 1; TIM2_CH3 after remap with option bit AFR1."+ },+ {+ "number": "28",+ "name": "PD3/TIM2_CH2",+ "type": "bidirectional",+ "description": "Port D3 high-sink I/O (O3, external interrupt) used as Timer 2 channel 2; ADC_ETR after remap with option bit AFR0."+ },+ {+ "number": "29",+ "name": "PD4/TIM2_CH1",+ "type": "bidirectional",+ "description": "Port D4 high-sink I/O (O3, external interrupt) used as Timer 2 channel 1; BEEP output after remap with option bit AFR7."+ },+ {+ "number": "30",+ "name": "PD5/UART2_TX",+ "type": "bidirectional",+ "description": "Port D5 I/O (slow, O1, external interrupt) used as UART2 data transmit."+ },+ {+ "number": "31",+ "name": "PD6/UART2_RX",+ "type": "bidirectional",+ "description": "Port D6 I/O (slow, O1, external interrupt) used as UART2 data receive."+ },+ {+ "number": "32",+ "name": "PD7/TLI",+ "type": "bidirectional",+ "description": "Port D7 I/O (slow, O1, external interrupt) used as top level interrupt; TIM1_CH4 after remap with option bit AFR4."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Table 5 lists one pin-number column per package. The LQFP32 pin numbers were taken from the 'LQFP32/; Pin 5 VCAP is typed 'passive' because the datasheet classes it as a supply pin (S) but describes it ; Datasheet Table 5 lists PA2/OSCOUT under 'Port A1' in its description column, which appears to be a "+ ],+ "pages_sent": 55,+ "cost_usd": 0.2176,+ "at": "2026-10-08T14:54:59"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588942639186259968",+ "pages": 121,+ "sha256": "b1007bc27bb78327",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 32,+ "described": 32,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm8s105k4t3ctr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "be0e412f1c66fee70039b0e109e0cc7c823161dda97593718afa97569bc61ce3",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm8s105k4t3ctr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "d1f4be3f1d0936a03f1ea70805f14c5fcc9abc7db84aae8197427a1133a77bc2",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}