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STM8S103F3U3TR
Public Made by Adomby adom
STMicroelectronics Microcontroller Units (MCUs/MPUs/SOCs), UFQFPN-20(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+56@@ -0,0 +1,56 @@+# STM8S103F3U3TR++**STMicroelectronics** · Microcontroller Units (MCUs/MPUs/SOCs) · UFQFPN-20(3x3)++STM8S103F3U3TR from STMicroelectronics, in a UFQFPN-20(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | NRST | bidirectional | Reset input with internal weak pull-up, active low. |+| 2 | PA1/OSCIN | bidirectional | General-purpose I/O port A1, external oscillator crystal input. |+| 3 | PA2/OSCOUT | bidirectional | General-purpose I/O port A2, external oscillator crystal output. |+| 4 | VSS | power_in | Digital ground. |+| 5 | VCAP | passive | 1.8 V internal regulator output capacitor connection. |+| 6 | VDD | power_in | Digital power supply, 2.95 to 5.5 V. |+| 7 | PA3/TIM2_CH3 | bidirectional | High sink I/O port A3, Timer 2 channel 3 or configurable as SPI slave select via alternate function remapping. |+| 8 | PB5/I2C_SDA | tri_state | True open-drain I/O port B5, I2C data or configurable as Timer 1 break input via alternate function remapping. |+| 9 | PB4/I2C_SCL | tri_state | True open-drain I/O port B4, I2C clock or configurable as ADC external trigger via alternate function remapping. |+| 10 | PC3/TIM1_CH3 | bidirectional | High sink I/O port C3, Timer 1 channel 3 or configurable as top-level interrupt or inverted Timer 1 channel 1 via alternate function remapping. |+| 11 | PC4/CLK_CCO/TIM1_CH4/AIN2 | bidirectional | High sink I/O port C4, configurable as clock output, Timer 1 channel 4, analog input 2, or inverted Timer 1 channel 2 via alternate function remapping. |+| 12 | PC5/SPI_SCK | bidirectional | High sink I/O port C5, SPI clock or configurable as Timer 2 channel 1 via alternate function remapping. |+| 13 | PC6/SPI_MOSI | bidirectional | High sink I/O port C6, SPI master out/slave in or configurable as Timer 1 channel 1 via alternate function remapping. |+| 14 | PC7/SPI_MISO | bidirectional | High sink I/O port C7, SPI master in/slave out or configurable as Timer 1 channel 2 via alternate function remapping. |+| 15 | PD1/SWIM | bidirectional | High sink I/O port D1, SWIM single-wire interface for in-circuit debugging and programming. |+| 16 | PD2/AIN3 | bidirectional | High sink I/O port D2, analog input 3 or configurable as Timer 2 channel 3 via alternate function remapping. |+| 17 | PD3/AIN4/TIM2_CH2/ADC_ETR | bidirectional | High sink I/O port D3, analog input 4, Timer 2 channel 2, or ADC external trigger. |+| 18 | PD4/BEEP/TIM2_CH1/UART1_CK | bidirectional | High sink I/O port D4, configurable as beeper output, Timer 2 channel 1, or UART1 clock. |+| 19 | PD5/AIN5/UART1_TX | bidirectional | High sink I/O port D5, UART1 transmit data or analog input 5. |+| 20 | PD6/AIN6/UART1_RX | bidirectional | High sink I/O port D6, UART1 receive data or analog input 6. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | UFQFPN-20(3x3) |+| Category | Single Chip Microcomputer/Microcontroller |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `STM8S103F3U3TR`+- Footprint: `Package_DFN_QFN:ST_UFQFPN-20_3x3mm_P0.5mm`+- 3D model: UFQFPN-20(3x3) (KiCad packages3D, STEP)+- 3D model files: `stm8s103f3u3tr-etched.step` / `stm8s103f3u3tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm8s103f3u3tr.step` / `stm8s103f3u3tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588893454981582848) (121 pp, sha256 `ac23789ac0a2f408`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm8s103f3u3tr-datasheet.pdf)
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"stm8s103f3u3tr.kicad_sym",+ "footprint": "stm8s103f3u3tr.kicad_mod",+ "model_3d": "stm8s103f3u3tr-hero.glb",+ "model_3d_plain": "stm8s103f3u3tr.glb",+ "model_3d_step": "stm8s103f3u3tr-etched.step",+ "model_3d_step_plain": "stm8s103f3u3tr.step",+ "lbr": "stm8s103f3u3tr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2052817",+ "digikey": "497-16046-2-ND",+ "mouser": "511-STM8S103F3U3TR"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T09:05:29Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-16046-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-STM8S103F3U3TR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Reset input with internal weak pull-up, active low."+ },+ {+ "number": "2",+ "name": "PA1/OSCIN",+ "type": "bidirectional",+ "description": "General-purpose I/O port A1, external oscillator crystal input."+ },+ {+ "number": "3",+ "name": "PA2/OSCOUT",+ "type": "bidirectional",+ "description": "General-purpose I/O port A2, external oscillator crystal output."+ },+ {+ "number": "4",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground."+ },+ {+ "number": "5",+ "name": "VCAP",+ "type": "passive",+ "description": "1.8 V internal regulator output capacitor connection."+ },+ {+ "number": "6",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital power supply, 2.95 to 5.5 V."+ },+ {+ "number": "7",+ "name": "PA3/TIM2_CH3",+ "type": "bidirectional",+ "description": "High sink I/O port A3, Timer 2 channel 3 or configurable as SPI slave select via alternate function remapping."+ },+ {+ "number": "8",+ "name": "PB5/I2C_SDA",+ "type": "tri_state",+ "description": "True open-drain I/O port B5, I2C data or configurable as Timer 1 break input via alternate function remapping."+ },+ {+ "number": "9",+ "name": "PB4/I2C_SCL",+ "type": "tri_state",+ "description": "True open-drain I/O port B4, I2C clock or configurable as ADC external trigger via alternate function remapping."+ },+ {+ "number": "10",+ "name": "PC3/TIM1_CH3",+ "type": "bidirectional",+ "description": "High sink I/O port C3, Timer 1 channel 3 or configurable as top-level interrupt or inverted Timer 1 channel 1 via alternate function remapping."+ },+ {+ "number": "11",+ "name": "PC4/CLK_CCO/TIM1_CH4/AIN2",+ "type": "bidirectional",+ "description": "High sink I/O port C4, configurable as clock output, Timer 1 channel 4, analog input 2, or inverted Timer 1 channel 2 via alternate function remapping."+ },+ {+ "number": "12",+ "name": "PC5/SPI_SCK",+ "type": "bidirectional",+ "description": "High sink I/O port C5, SPI clock or configurable as Timer 2 channel 1 via alternate function remapping."+ },+ {+ "number": "13",+ "name": "PC6/SPI_MOSI",+ "type": "bidirectional",+ "description": "High sink I/O port C6, SPI master out/slave in or configurable as Timer 1 channel 1 via alternate function remapping."+ },+ {+ "number": "14",+ "name": "PC7/SPI_MISO",+ "type": "bidirectional",+ "description": "High sink I/O port C7, SPI master in/slave out or configurable as Timer 1 channel 2 via alternate function remapping."+ },+ {+ "number": "15",+ "name": "PD1/SWIM",+ "type": "bidirectional",+ "description": "High sink I/O port D1, SWIM single-wire interface for in-circuit debugging and programming."+ },+ {+ "number": "16",+ "name": "PD2/AIN3",+ "type": "bidirectional",+ "description": "High sink I/O port D2, analog input 3 or configurable as Timer 2 channel 3 via alternate function remapping."+ },+ {+ "number": "17",+ "name": "PD3/AIN4/TIM2_CH2/ADC_ETR",+ "type": "bidirectional",+ "description": "High sink I/O port D3, analog input 4, Timer 2 channel 2, or ADC external trigger."+ },+ {+ "number": "18",+ "name": "PD4/BEEP/TIM2_CH1/UART1_CK",+ "type": "bidirectional",+ "description": "High sink I/O port D4, configurable as beeper output, Timer 2 channel 1, or UART1 clock."+ },+ {+ "number": "19",+ "name": "PD5/AIN5/UART1_TX",+ "type": "bidirectional",+ "description": "High sink I/O port D5, UART1 transmit data or analog input 5."+ },+ {+ "number": "20",+ "name": "PD6/AIN6/UART1_RX",+ "type": "bidirectional",+ "description": "High sink I/O port D6, UART1 receive data or analog input 6."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 57,+ "cost_usd": 0.3651,+ "at": "2026-10-07T09:05:14"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588893454981582848",+ "pages": 121,+ "sha256": "ac23789ac0a2f408",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm8s103f3u3tr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 3,+ 3,+ 0.6+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "a041605a19c65d5b64ab4e3e43119fd04980a1a759efc863cad57c0ec653b22b",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm8s103f3u3tr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 3,+ 3,+ 0.6+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "036f5df3155bfc107117ef7168168eb28fcc8154c3f60e38fe19a012c87c2f0c",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}