stm8s003k3t6c

@@ -33,5 +33,223 @@   "author": {     "name": "Ray",     "email": "[email protected]"+  },+  "component": {+    "mpn": "STM8S003K3T6C",+    "manufacturer": "STMicroelectronics",+    "package": "LQFP-32(7x7)",+    "pin_count": 32,+    "category": "Microcontrollers (MCU/MPU/SOC)",+    "datasheet": "https://www.st.com/resource/en/datasheet/stm8s003k3t6c.pdf",+    "parts": {+      "symbol": "stm8s003k3t6c.kicad_sym",+      "footprint": "stm8s003k3t6c.kicad_mod",+      "model_3d": "stm8s003k3t6c-etched.glb",+      "model_3d_plain": "stm8s003k3t6c.glb",+      "model_3d_step": "stm8s003k3t6c-etched.step",+      "model_3d_step_plain": "stm8s003k3t6c.step",+      "lbr": "stm8s003k3t6c.lbr"+    },+    "pins": [+      {+        "number": "1",+        "name": "NRST",+        "type": "bidirectional",+        "description": "Active-low bidirectional reset pin with internal weak pull-up. Driven low externally or by internal reset sources (POR/BOR, watchdog, SWIM); recommended external protection network (see Fig 37)."+      },+      {+        "number": "2",+        "name": "PA1/OSCIN",+        "type": "bidirectional",+        "description": "Port A bit 1 / HSE oscillator (resonator/crystal) input. In Halt/Active-halt this pin is forced to input weak pull-up."+      },+      {+        "number": "3",+        "name": "PA2/OSCOUT",+        "type": "bidirectional",+        "description": "Port A bit 2 / HSE oscillator (resonator/crystal) output. Standard I/O with slow (O1) output speed by default."+      },+      {+        "number": "4",+        "name": "VSS",+        "type": "power_in",+        "description": "Digital ground reference for the MCU. Tie to the system ground plane."+      },+      {+        "number": "5",+        "name": "VCAP",+        "type": "passive",+        "description": "Internal 1.8 V regulator decoupling pin. Must be connected to VSS through an external low-ESR ceramic capacitor (typ. 470 nF-1 uF, see 9.3.1 VCAP external capacitor)."+      },+      {+        "number": "6",+        "name": "VDD",+        "type": "power_in",+        "description": "Digital supply input, 2.95 V to 5.5 V operating range. Decouple locally with a 100 nF ceramic close to the pin."+      },+      {+        "number": "7",+        "name": "PA3/TIM2_CH3/[SPI_NSS]",+        "type": "bidirectional",+        "description": "Port A bit 3, high-sink I/O. Default alt-function TIM2 channel 3; can be remapped to SPI_NSS (slave select) via option bit AFR1."+      },+      {+        "number": "8",+        "name": "PF4",+        "type": "bidirectional",+        "description": "Port F bit 4, general-purpose I/O (no alternate function assigned)."+      },+      {+        "number": "9",+        "name": "PB7",+        "type": "bidirectional",+        "description": "Port B bit 7, standard general-purpose I/O."+      },+      {+        "number": "10",+        "name": "PB6",+        "type": "bidirectional",+        "description": "Port B bit 6, standard general-purpose I/O."+      },+      {+        "number": "11",+        "name": "PB5/I2C_SDA",+        "type": "bidirectional",+        "description": "Port B bit 5 / I2C data line. True open-drain output (no P-buffer, no weak pull-up, no protection diode to VDD); requires external pull-up resistor for I2C operation."+      },+      {+        "number": "12",+        "name": "PB4/I2C_SCL",+        "type": "bidirectional",+        "description": "Port B bit 4 / I2C clock line. True open-drain output; requires external pull-up resistor for I2C bus operation (standard up to 100 kHz, fast up to 400 kHz)."+      },+      {+        "number": "13",+        "name": "PB3/AIN3/TIM1_ETR",+        "type": "bidirectional",+        "description": "Port B bit 3, high-sink I/O. Muxed with ADC analog input channel 3 and TIM1 external trigger input."+      },+      {+        "number": "14",+        "name": "PB2/AIN2/TIM1_CH3N",+        "type": "bidirectional",+        "description": "Port B bit 2, high-sink I/O. Muxed with ADC analog input channel 2 and TIM1 inverted (complementary) channel 3 output."+      },+      {+        "number": "15",+        "name": "PB1/AIN1/TIM1_CH2N",+        "type": "bidirectional",+        "description": "Port B bit 1, high-sink I/O. Muxed with ADC analog input channel 1 and TIM1 inverted (complementary) channel 2 output."+      },+      {+        "number": "16",+        "name": "PB0/AIN0/TIM1_CH1N",+        "type": "bidirectional",+        "description": "Port B bit 0, high-sink I/O. Muxed with ADC analog input channel 0 and TIM1 inverted (complementary) channel 1 output."+      },+      {+        "number": "17",+        "name": "PE5/SPI_NSS",+        "type": "bidirectional",+        "description": "Port E bit 5, high-sink I/O. Default alt-function: SPI slave/master select (NSS)."+      },+      {+        "number": "18",+        "name": "PC1/TIM1_CH1/UART1_CK",+        "type": "bidirectional",+        "description": "Port C bit 1, high-sink I/O. Muxed with TIM1 channel 1 (PWM/capture) and UART1 synchronous clock output."+      },+      {+        "number": "19",+        "name": "PC2/TIM1_CH2",+        "type": "bidirectional",+        "description": "Port C bit 2, high-sink I/O. Default alt-function: TIM1 channel 2."+      },+      {+        "number": "20",+        "name": "PC3/TIM1_CH3",+        "type": "bidirectional",+        "description": "Port C bit 3, high-sink I/O. Default alt-function: TIM1 channel 3."+      },+      {+        "number": "21",+        "name": "PC4/TIM1_CH4/CLK_CCO",+        "type": "bidirectional",+        "description": "Port C bit 4, high-sink I/O. Muxed with TIM1 channel 4 and configurable clock output (CLK_CCO)."+      },+      {+        "number": "22",+        "name": "PC5/SPI_SCK",+        "type": "bidirectional",+        "description": "Port C bit 5, high-sink I/O. Default alt-function: SPI clock (SCK)."+      },+      {+        "number": "23",+        "name": "PC6/SPI_MOSI",+        "type": "bidirectional",+        "description": "Port C bit 6, high-sink I/O. Default alt-function: SPI master-out/slave-in (MOSI)."+      },+      {+        "number": "24",+        "name": "PC7/SPI_MISO",+        "type": "bidirectional",+        "description": "Port C bit 7, high-sink I/O. Default alt-function: SPI master-in/slave-out (MISO)."+      },+      {+        "number": "25",+        "name": "PD0/TIM1_BKIN/[CLK_CCO]",+        "type": "bidirectional",+        "description": "Port D bit 0, high-sink I/O. Default alt-function TIM1 break input; remappable to configurable clock output (CLK_CCO) via option bit AFR5."+      },+      {+        "number": "26",+        "name": "PD1/SWIM",+        "type": "bidirectional",+        "description": "Port D bit 1 / SWIM (Single-Wire Interface Module) debug and programming pin. Held in input pull-up during reset and after internal reset release."+      },+      {+        "number": "27",+        "name": "PD2/[TIM2_CH3]",+        "type": "bidirectional",+        "description": "Port D bit 2, high-sink I/O. Remappable to TIM2 channel 3 via option bit AFR1 (mutually exclusive with PA3 assignment)."+      },+      {+        "number": "28",+        "name": "PD3/TIM2_CH2/ADC_ETR",+        "type": "bidirectional",+        "description": "Port D bit 3, high-sink I/O. Muxed with TIM2 channel 2 and ADC external trigger input."+      },+      {+        "number": "29",+        "name": "PD4/BEEP/TIM2_CH1",+        "type": "bidirectional",+        "description": "Port D bit 4, high-sink I/O. Muxed with BEEP output (sound-generation square wave) and TIM2 channel 1."+      },+      {+        "number": "30",+        "name": "PD5/UART1_TX",+        "type": "bidirectional",+        "description": "Port D bit 5, high-sink I/O. Default alt-function: UART1 asynchronous data transmit."+      },+      {+        "number": "31",+        "name": "PD6/UART1_RX",+        "type": "bidirectional",+        "description": "Port D bit 6, high-sink I/O. Default alt-function: UART1 asynchronous data receive."+      },+      {+        "number": "32",+        "name": "PD7/TLI/[TIM1_CH4]",+        "type": "bidirectional",+        "description": "Port D bit 7, high-sink I/O. Default alt-function: Top Level Interrupt (TLI); remappable to TIM1 channel 4 via option bit AFR6."+      }+    ],+    "provenance": {+      "rebuilt": "component block rebuilt 2026-10-05 from this page's own README pinout table and .kicad_sym (pins cross-checked), no re-extraction"+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }   }-}\ No newline at end of file+}