component
STM32U575VGT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
← Commit history
Publish 0.1.1
5 files changed
+505−494
README.md+98−98@@ -8,105 +8,105 @@ STM32U575VGT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | Pin | Name | Type | Function | |---|---|---|---|-| 1 | PE2 | output | Port E pin 2, trace data output, TIM3_ETR, SAI1 interface capable |-| 2 | PC13 | output | Port C pin 13, optional event output, RTC/tamper capable |-| 3 | PC14-OSC32_IN | input | Port C pin 14, 32 kHz oscillator input, event output capable |-| 4 | PC15-OSC32_OUT | output | Port C pin 15, 32 kHz oscillator output, event output capable |-| 5 | VDD | power_in | Main 3.3V digital supply for kernel logic |-| 6 | PC2 | input | Port C pin 2, ADC1_IN3, ADC4_IN3, low-power GPIO capable |-| 7 | PE5 | output | Port E pin 5, trace data output, timer and SAI interfaces, wakeup capable |-| 8 | VBAT | power_in | VBAT domain power supply for backup domain, RTC and tamper |-| 9 | PC14-OSC32_IN | input | Port C pin 14, 32 kHz oscillator input for RTC |+| 1 | PE2 | bidirectional | Port E pin 2, trace data output, TIM3_ETR, SAI1 interface capable |+| 2 | PE3 | bidirectional | |+| 3 | PE4 | bidirectional | |+| 4 | PE5 | bidirectional | Port E pin 5, trace data output, timer and SAI interfaces, wakeup capable |+| 5 | PE6 | bidirectional | |+| 6 | VBAT | power_in | VBAT domain power supply for backup domain, RTC and tamper |+| 7 | PC13 | bidirectional | Port C pin 13, optional event output, RTC/tamper capable |+| 8 | PC14-OSC32_IN (PC14) | bidirectional | |+| 9 | PC15-OSC32_OUT (PC15) | bidirectional | | | 10 | VSS | power_in | Ground return for main digital supply |-| 11 | PH1-OSC_OUT | output | Port H pin 1, high-speed oscillator output |-| 12 | PC1 | input | Port C pin 1, ADC1_IN2, ADC4_IN2, trace data capable |-| 13 | VSSA | power_in | Analog ground return for ADC/DAC reference circuits |-| 14 | PA0 | input | Port A pin 0, timer input, ADC1_IN5, wakeup and tamper capable |-| 15 | PH0-OSC_IN | input | Port H pin 0, high-speed oscillator input |-| 16 | PC0 | input | Port C pin 0, ADC1_IN1, ADC4_IN1, low-power UART capable |-| 17 | PC3 | input | Port C pin 3, ADC1_IN4, ADC4_IN4, low-power timer capable |-| 18 | VREF+ | power_in | ADC positive reference voltage, 1.65V to VDD |-| 19 | PA1 | input | Port A pin 1, timer input, ADC1_IN6, wakeup and tamper capable |-| 20 | PA2 | input | Port A pin 2, LPUART_TX, ADC1_IN7, wakeup capable |-| 21 | VDDA | power_in | Analog power supply for ADC, DAC, comparators and OPAMP |-| 22 | VDD | power_in | Main 3.3V digital supply for I/O logic |-| 23 | VSS | power_in | Ground return for digital supply |-| 24 | VDDUSB | power_in | USB OTG and power delivery controller supply |-| 25 | PA12 | output | Port A pin 12, USART1 DE/RTS, FDCAN1_TX, OTG_FS_DP |-| 26 | NRST | input | Active-low reset pin with embedded pull-up resistor |-| 27 | PC0 | input | Port C pin 0, I2C3_SCL boot capable, ADC1_IN1 |-| 28 | PC1 | input | Port C pin 1, trace data, ADC1_IN2, LPUART1_TX capable |-| 29 | PC2 | input | Port C pin 2, low-power GPIO, ADC1_IN3 capable |-| 30 | PC3 | input | Port C pin 3, low-power timer, ADC1_IN4 capable |-| 31 | VSSA | power_in | Analog ground return |-| 32 | VREF+ | power_in | ADC reference voltage output from VREFBUF |-| 33 | VDDA | power_in | Analog power supply |-| 34 | PA0 | input | Port A pin 0, timer CH1, ADC1_IN5, WKUP1 capable |-| 35 | PA1 | input | Port A pin 1, timer CH2, ADC1_IN6, WKUP3 capable |-| 36 | PA2 | input | Port A pin 2, USART2_TX boot, ADC1_IN7, WKUP4/LSCO |-| 37 | PA3 | output | Port A pin 3, USART2_RX boot, ADC1_IN8, WKUP5 capable |-| 38 | VSS | power_in | Ground return |-| 39 | VDD | power_in | Main supply voltage |-| 40 | PA4 | input | Port A pin 4, DAC1_OUT1, ADC1_IN9, WKUP2 capable |-| 41 | PA5 | input | Port A pin 5, DAC1_OUT2, ADC1_IN10, WKUP6 capable |-| 42 | PA6 | input | Port A pin 6, ADC1_IN11, timer CH1, WKUP7 capable |-| 43 | PA7 | input | Port A pin 7, ADC1_IN12, timer CH2, WKUP8 capable |-| 44 | PC4 | input | Port C pin 4, ADC1_IN13 analog input capable |-| 45 | PC5 | input | Port C pin 5, ADC1_IN14, wakeup and tamper capable |-| 46 | PB0 | input | Port B pin 0, ADC1_IN15, comparator output capable |-| 47 | PB1 | input | Port B pin 1, ADC1_IN16, comparator input capable |-| 48 | PB2 | input | Port B pin 2, ADC1_IN17, comparator input, wakeup capable |-| 49 | PF11 | output | Port F pin 11, high-speed, DCMI_D12/PSSI_D12 capable |-| 50 | PF12 | input | Port F pin 12, OCTOSPI DQS strobe capable |-| 51 | VSS | power_in | Ground return |-| 52 | VDD | power_in | Main supply |-| 53 | PF13 | input | Port F pin 13, I2C4 address, UCPD1_FRSTX2 capable |-| 54 | PF14 | input | Port F pin 14, I2C4_SCL, ADC4_IN5 capable |-| 55 | PF15 | input | Port F pin 15, I2C4_SDA, ADC4_IN6 capable |-| 56 | PG0 | input | Port G pin 0, OCTOSPI IO4, ADC4_IN7 capable |-| 57 | PG1 | input | Port G pin 1, OCTOSPI IO5, ADC4_IN8 capable |-| 58 | PE7 | input | Port E pin 7, timer, MDF interface, wakeup capable |-| 59 | PE8 | input | Port E pin 8, timer, MDF interface, wakeup capable |-| 60 | PE9 | output | Port E pin 9, high-speed, timer CH1, ADF1 capable |-| 61 | PE10 | input | Port E pin 10, timer CH2N, ADF1_SDI0, high-speed capable |-| 62 | PE11 | input | Port E pin 11, timer CH2, MDF interface capable |-| 63 | PE12 | input | Port E pin 12, timer CH3N, MDF interface capable |-| 64 | PE13 | input | Port E pin 13, timer CH3, MDF interface capable |-| 65 | PE14 | input | Port E pin 14, timer CH4, SPI1_MISO capable |-| 66 | PE15 | input | Port E pin 15, timer BKIN, SPI1_MOSI capable |-| 67 | PB10 | input | Port B pin 10, high-speed, I2C4_SCL, SPI2_SCK boot capable |-| 68 | PB11 | input | Port B pin 11, I2C4_SDA, SPI2_RDY, comparator capable |-| 69 | PB12 | input | Port B pin 12, high-speed, timer BKIN, MDF interface capable |-| 70 | PB13 | input | Port B pin 13, I2C2_SCL boot, SPI2_SCK, timer CH1N capable |-| 71 | PB14 | input | Port B pin 14, I2C2_SDA boot, UCPD1_DBCC2, timer CH1 capable |-| 72 | PB15 | output | Port B pin 15, UCPD1_CC2, SPI2_MOSI boot, timer CH2, wakeup capable |-| 73 | PD8 | output | Port D pin 8, USART3_TX, DCMI_HSYNC/PSSI_DE capable |-| 74 | PD9 | output | Port D pin 9, USART3_RX, DCMI_PIXCLK/PSSI_PDCK capable |-| 75 | PD10 | input | Port D pin 10, timer CH2, low-power timer capable |-| 76 | PD11 | input | Port D pin 11, ADC4_IN15, low-power timer capable |-| 77 | PD12 | input | Port D pin 12, ADC4_IN16, timer CH1 capable |-| 78 | PD13 | input | Port D pin 13, ADC4_IN17, low-power timer capable |-| 79 | PD14 | output | Port D pin 14, timer CH3, low-power timer capable |-| 80 | PD15 | output | Port D pin 15, timer CH4, low-power timer capable |-| 81 | PC6 | input | Port C pin 6, timer CH1, DCMI_D0/PSSI_D0, SDMMC capable |-| 82 | PC7 | input | Port C pin 7, timer CH2, DCMI_D1/PSSI_D1, SDMMC capable |-| 83 | PC8 | input | Port C pin 8, timer CH3, DCMI_D2/PSSI_D2, SDMMC capable |-| 84 | PC9 | input | Port C pin 9, timer CH4, OTG_FS_NOE, DCMI_D3 capable |-| 85 | PA8 | output | Port A pin 8, high-speed, MCO, timer CH1, OTG_FS_SOF capable |-| 86 | PA9 | output | Port A pin 9, USART1_TX boot, OTG_FS_VBUS, DCMI_D0 capable |-| 87 | PA10 | input | Port A pin 10, USART1_RX boot, OTG_FS_ID capable |-| 88 | PA11 | input | Port A pin 11, USART1_CTS, FDCAN1_RX, OTG_FS_DM boot capable |-| 89 | PA12 | output | Port A pin 12, USART1_DE/RTS, FDCAN1_TX, OTG_FS_DP boot capable |-| 90 | PA13 (JTMS/SWDIO) | output | Port A pin 13, JTAG/SWD debug port with internal pull-up |-| 91 | VSS | power_in | Ground return |-| 92 | VDDUSB | power_in | USB supply |-| 93 | VSS | power_in | Ground return |-| 94 | VDD | power_in | Main supply |-| 95 | PA14 (JTCK/SWCLK) | output | Port A pin 14, JTAG/SWD clock with internal pull-down |-| 96 | PA15 (JTDI) | output | Port A pin 15, JTAG input, UCPD1_CC1, wakeup capable |-| 97 | PC10 | input | Port C pin 10, trace data, USART3_TX boot, SDMMC capable |-| 98 | PC11 | input | Port C pin 11, low-power timer, USART3_RX boot, SDMMC capable |-| 99 | PC12 | output | Port C pin 12, high-speed, USART3_CK, SPI3_MOSI, SDMMC capable |+| 11 | VDD | power_in | Main supply voltage |+| 12 | PH0-OSC_IN (PH0) | bidirectional | |+| 13 | PH1-OSC_OUT (PH1) | bidirectional | |+| 14 | NRST | input | Active-low reset pin with embedded pull-up resistor |+| 15 | PC0 | bidirectional | Port C pin 0, I2C3_SCL boot capable, ADC1_IN1 |+| 16 | PC1 | bidirectional | Port C pin 1, trace data, ADC1_IN2, LPUART1_TX capable |+| 17 | PC2 | bidirectional | Port C pin 2, low-power GPIO, ADC1_IN3 capable |+| 18 | PC3 | bidirectional | Port C pin 3, low-power timer, ADC1_IN4 capable |+| 19 | VSSA | power_in | Analog ground return |+| 20 | VREF- | power_in | |+| 21 | VREF+ | power_in | ADC reference voltage output from VREFBUF |+| 22 | VDDA | power_in | Analog power supply |+| 23 | PA0 | bidirectional | Port A pin 0, timer CH1, ADC1_IN5, WKUP1 capable |+| 24 | PA1 | bidirectional | Port A pin 1, timer CH2, ADC1_IN6, WKUP3 capable |+| 25 | PA2 | bidirectional | Port A pin 2, USART2_TX boot, ADC1_IN7, WKUP4/LSCO |+| 26 | PA3 | bidirectional | Port A pin 3, USART2_RX boot, ADC1_IN8, WKUP5 capable |+| 27 | VSS | power_in | Ground return |+| 28 | VDD | power_in | Main supply voltage |+| 29 | PA4 | bidirectional | Port A pin 4, DAC1_OUT1, ADC1_IN9, WKUP2 capable |+| 30 | PA5 | bidirectional | Port A pin 5, DAC1_OUT2, ADC1_IN10, WKUP6 capable |+| 31 | PA6 | bidirectional | Port A pin 6, ADC1_IN11, timer CH1, WKUP7 capable |+| 32 | PA7 | bidirectional | Port A pin 7, ADC1_IN12, timer CH2, WKUP8 capable |+| 33 | PC4 | bidirectional | Port C pin 4, ADC1_IN13 analog input capable |+| 34 | PC5 | bidirectional | Port C pin 5, ADC1_IN14, wakeup and tamper capable |+| 35 | PB0 | bidirectional | Port B pin 0, ADC1_IN15, comparator output capable |+| 36 | PB1 | bidirectional | Port B pin 1, ADC1_IN16, comparator input capable |+| 37 | PB2 | bidirectional | Port B pin 2, ADC1_IN17, comparator input, wakeup capable |+| 38 | PE7 | bidirectional | Port E pin 7, timer, MDF interface, wakeup capable |+| 39 | PE8 | bidirectional | Port E pin 8, timer, MDF interface, wakeup capable |+| 40 | PE9 | bidirectional | Port E pin 9, high-speed, timer CH1, ADF1 capable |+| 41 | PE10 | bidirectional | Port E pin 10, timer CH2N, ADF1_SDI0, high-speed capable |+| 42 | PE11 | bidirectional | Port E pin 11, timer CH2, MDF interface capable |+| 43 | PE12 | bidirectional | Port E pin 12, timer CH3N, MDF interface capable |+| 44 | PE13 | bidirectional | Port E pin 13, timer CH3, MDF interface capable |+| 45 | PE14 | bidirectional | Port E pin 14, timer CH4, SPI1_MISO capable |+| 46 | PE15 | bidirectional | Port E pin 15, timer BKIN, SPI1_MOSI capable |+| 47 | PB10 | bidirectional | Port B pin 10, high-speed, I2C4_SCL, SPI2_SCK boot capable |+| 48 | VCAP | power_in | |+| 49 | VSS | power_in | Ground return |+| 50 | VDD | power_in | Main supply voltage |+| 51 | PB12 | bidirectional | Port B pin 12, high-speed, timer BKIN, MDF interface capable |+| 52 | PB13 | bidirectional | Port B pin 13, I2C2_SCL boot, SPI2_SCK, timer CH1N capable |+| 53 | PB14 | bidirectional | Port B pin 14, I2C2_SDA boot, UCPD1_DBCC2, timer CH1 capable |+| 54 | PB15 | bidirectional | Port B pin 15, UCPD1_CC2, SPI2_MOSI boot, timer CH2, wakeup capable |+| 55 | PD8 | bidirectional | Port D pin 8, USART3_TX, DCMI_HSYNC/PSSI_DE capable |+| 56 | PD9 | bidirectional | Port D pin 9, USART3_RX, DCMI_PIXCLK/PSSI_PDCK capable |+| 57 | PD10 | bidirectional | Port D pin 10, timer CH2, low-power timer capable |+| 58 | PD11 | bidirectional | Port D pin 11, ADC4_IN15, low-power timer capable |+| 59 | PD12 | bidirectional | Port D pin 12, ADC4_IN16, timer CH1 capable |+| 60 | PD13 | bidirectional | Port D pin 13, ADC4_IN17, low-power timer capable |+| 61 | PD14 | bidirectional | Port D pin 14, timer CH3, low-power timer capable |+| 62 | PD15 | bidirectional | Port D pin 15, timer CH4, low-power timer capable |+| 63 | PC6 | bidirectional | Port C pin 6, timer CH1, DCMI_D0/PSSI_D0, SDMMC capable |+| 64 | PC7 | bidirectional | Port C pin 7, timer CH2, DCMI_D1/PSSI_D1, SDMMC capable |+| 65 | PC8 | bidirectional | Port C pin 8, timer CH3, DCMI_D2/PSSI_D2, SDMMC capable |+| 66 | PC9 | bidirectional | Port C pin 9, timer CH4, OTG_FS_NOE, DCMI_D3 capable |+| 67 | PA8 | bidirectional | Port A pin 8, high-speed, MCO, timer CH1, OTG_FS_SOF capable |+| 68 | PA9 | bidirectional | Port A pin 9, USART1_TX boot, OTG_FS_VBUS, DCMI_D0 capable |+| 69 | PA10 | bidirectional | Port A pin 10, USART1_RX boot, OTG_FS_ID capable |+| 70 | PA11 | bidirectional | Port A pin 11, USART1_CTS, FDCAN1_RX, OTG_FS_DM boot capable |+| 71 | PA12 | bidirectional | Port A pin 12, USART1_DE/RTS, FDCAN1_TX, OTG_FS_DP boot capable |+| 72 | PA13 (JTMS/SWDIO) | bidirectional | Port A pin 13, JTAG/SWD debug port with internal pull-up |+| 73 | VDDUSB | power_in | USB supply |+| 74 | VSS | power_in | Ground return |+| 75 | VDD | power_in | Main supply voltage |+| 76 | PA14 (JTCK/SWCLK) | bidirectional | Port A pin 14, JTAG/SWD clock with internal pull-down |+| 77 | PA15 (JTDI) | bidirectional | Port A pin 15, JTAG input, UCPD1_CC1, wakeup capable |+| 78 | PC10 | bidirectional | Port C pin 10, trace data, USART3_TX boot, SDMMC capable |+| 79 | PC11 | bidirectional | Port C pin 11, low-power timer, USART3_RX boot, SDMMC capable |+| 80 | PC12 | bidirectional | Port C pin 12, high-speed, USART3_CK, SPI3_MOSI, SDMMC capable |+| 81 | PD0 | bidirectional | |+| 82 | PD1 | bidirectional | |+| 83 | PD2 | bidirectional | |+| 84 | PD3 | bidirectional | |+| 85 | PD4 | bidirectional | |+| 86 | PD5 | bidirectional | |+| 87 | PD6 | bidirectional | |+| 88 | PD7 | bidirectional | |+| 89 | PB3 (JTDO/TRACESWO) | bidirectional | |+| 90 | PB4 (NJTRST) | bidirectional | |+| 91 | PB5 | bidirectional | |+| 92 | PB6 | bidirectional | |+| 93 | PB7 | bidirectional | |+| 94 | PH3-BOOT0 | bidirectional | |+| 95 | PB8 | bidirectional | |+| 96 | PB9 | bidirectional | |+| 97 | PE0 | bidirectional | |+| 98 | PE1 | bidirectional | |+| 99 | VSS | power_in | Ground return | | 100 | VDD | power_in | Main supply voltage | ## Key specifications
package.json+2−2@@ -1,6 +1,6 @@ { "slug": "stm32u575vgt6",- "version": "0.1.0",+ "version": "0.1.1", "type": "component", "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.", "tags": [@@ -685,4 +685,4 @@ "footprint": "viewers/footprint.html" } }-}+}
page.json+4−4@@ -4,7 +4,7 @@ "slug": "stm32u575vgt6", "title": "STM32U575VGT6", "brief": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.1.1", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -712,7 +712,7 @@ "viewers/symbol.html", "viewers/footprint.html" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "org": "adom" }
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y="27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PD5" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PD4" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PD3" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PD2" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PD1" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PD0" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>+ <pin name="PA15_JTDI" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+ <pin name="PA14_JTCK/SWCLK" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@5" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@5" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+ <pin name="VDDUSB" x="17.78" y="-7.62" length="middle" direction="pwr" rot="R180"/>+ <pin name="PA13_JTMS/SWDIO" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PA12" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PA11" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PA10" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PA9" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PA8" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PC9" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PC8" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PC7" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PC6" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PD15" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PD14" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PD13" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PD12" x="17.78" y="-43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PD11" x="17.78" y="-45.72" length="middle" direction="io" rot="R180"/>+ <pin name="PD10" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>+ <pin name="PD9" x="17.78" y="-50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PD8" x="17.78" y="-53.34" length="middle" direction="io" rot="R180"/>+ <pin name="PB15" x="17.78" y="-55.88" length="middle" direction="io" rot="R180"/>+ <pin name="PB14" x="17.78" y="-58.42" length="middle" direction="io" rot="R180"/>+ <pin name="PB13" x="17.78" y="-60.96" length="middle" direction="io" rot="R180"/>+ <pin name="PB12" x="17.78" y="-63.5" length="middle" direction="io" rot="R180"/> </symbol> </symbols> <devicesets> <deviceset name="STM32U575VGT6" prefix="U">- <description></description>+ <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data</description> <gates> <gate name="G$1" symbol="STM32U575VGT6" x="0" y="0"/> </gates>@@ -298,107 +299,117 @@ <device name="" package="LQFP-100_14x14mm_P0.5mm"> <connects> <connect gate="G$1" pin="PE2" pad="1"/>- <connect gate="G$1" pin="PC13" pad="2"/>- <connect gate="G$1" pin="PC14-OSC32_IN" pad="3"/>- <connect gate="G$1" pin="PC15-OSC32_OUT" pad="4"/>- <connect gate="G$1" pin="VDD" pad="5"/>- <connect gate="G$1" pin="PC2" pad="6"/>- <connect gate="G$1" pin="PE5" pad="7"/>- <connect gate="G$1" pin="VBAT" pad="8"/>- <connect gate="G$1" pin="PC14-OSC32_IN@2" pad="9"/>+ <connect gate="G$1" pin="PE3" pad="2"/>+ <connect gate="G$1" pin="PE4" pad="3"/>+ <connect gate="G$1" pin="PE5" pad="4"/>+ <connect gate="G$1" pin="PE6" pad="5"/>+ <connect gate="G$1" pin="VBAT" pad="6"/>+ <connect gate="G$1" pin="PC13" pad="7"/>+ <connect gate="G$1" pin="PC14-OSC32_IN_PC14" pad="8"/>+ <connect gate="G$1" pin="PC15-OSC32_OUT_PC15" pad="9"/> <connect gate="G$1" pin="VSS" pad="10"/>- <connect gate="G$1" pin="PH1-OSC_OUT" pad="11"/>- <connect gate="G$1" pin="PC1" pad="12"/>- <connect gate="G$1" pin="VSSA" pad="13"/>- <connect gate="G$1" pin="PA0" pad="14"/>- <connect gate="G$1" pin="PH0-OSC_IN" pad="15"/>- <connect gate="G$1" pin="PC0" pad="16"/>- <connect gate="G$1" pin="PC3" pad="17"/>- <connect gate="G$1" pin="VREF+" pad="18"/>- <connect gate="G$1" pin="PA1" pad="19"/>- <connect gate="G$1" pin="PA2" pad="20"/>- <connect gate="G$1" pin="VDDA" pad="21"/>- <connect gate="G$1" pin="VDD@2" pad="22"/>- <connect gate="G$1" pin="VSS@2" pad="23"/>- <connect gate="G$1" pin="VDDUSB" pad="24"/>- <connect gate="G$1" pin="PA12" pad="25"/>- <connect gate="G$1" pin="NRST" pad="26"/>- <connect gate="G$1" pin="PC0@2" pad="27"/>- <connect gate="G$1" pin="PC1@2" pad="28"/>- <connect gate="G$1" pin="PC2@2" pad="29"/>- <connect gate="G$1" pin="PC3@2" pad="30"/>- <connect gate="G$1" pin="VSSA@2" pad="31"/>- <connect gate="G$1" pin="VREF+@2" pad="32"/>- <connect gate="G$1" pin="VDDA@2" pad="33"/>- <connect gate="G$1" pin="PA0@2" pad="34"/>- <connect gate="G$1" pin="PA1@2" pad="35"/>- <connect gate="G$1" pin="PA2@2" pad="36"/>- <connect gate="G$1" pin="PA3" pad="37"/>- <connect gate="G$1" pin="VSS@3" pad="38"/>- <connect gate="G$1" pin="VDD@3" pad="39"/>- <connect gate="G$1" pin="PA4" pad="40"/>- <connect gate="G$1" pin="PA5" pad="41"/>- <connect gate="G$1" pin="PA6" pad="42"/>- <connect gate="G$1" pin="PA7" pad="43"/>- <connect gate="G$1" pin="PC4" pad="44"/>- <connect gate="G$1" pin="PC5" pad="45"/>- <connect gate="G$1" pin="PB0" pad="46"/>- <connect gate="G$1" pin="PB1" pad="47"/>- <connect gate="G$1" pin="PB2" pad="48"/>- <connect gate="G$1" pin="PF11" pad="49"/>- <connect gate="G$1" pin="PF12" pad="50"/>+ <connect gate="G$1" pin="VDD" pad="11"/>+ <connect gate="G$1" pin="PH0-OSC_IN_PH0" pad="12"/>+ <connect gate="G$1" pin="PH1-OSC_OUT_PH1" pad="13"/>+ <connect gate="G$1" pin="NRST" pad="14"/>+ <connect gate="G$1" pin="PC0" pad="15"/>+ <connect gate="G$1" pin="PC1" pad="16"/>+ <connect gate="G$1" pin="PC2" pad="17"/>+ <connect gate="G$1" pin="PC3" pad="18"/>+ <connect gate="G$1" pin="VSSA" pad="19"/>+ <connect gate="G$1" pin="VREF-" pad="20"/>+ <connect gate="G$1" pin="VREF+" pad="21"/>+ <connect gate="G$1" pin="VDDA" pad="22"/>+ <connect gate="G$1" pin="PA0" pad="23"/>+ <connect gate="G$1" pin="PA1" pad="24"/>+ <connect gate="G$1" pin="PA2" pad="25"/>+ <connect gate="G$1" pin="PA3" pad="26"/>+ <connect gate="G$1" pin="VSS@2" pad="27"/>+ <connect gate="G$1" pin="VDD@2" pad="28"/>+ <connect gate="G$1" pin="PA4" pad="29"/>+ <connect gate="G$1" pin="PA5" pad="30"/>+ <connect gate="G$1" pin="PA6" pad="31"/>+ <connect gate="G$1" pin="PA7" pad="32"/>+ <connect gate="G$1" pin="PC4" pad="33"/>+ <connect gate="G$1" pin="PC5" pad="34"/>+ <connect gate="G$1" pin="PB0" pad="35"/>+ <connect gate="G$1" pin="PB1" pad="36"/>+ <connect gate="G$1" pin="PB2" pad="37"/>+ <connect gate="G$1" pin="PE7" pad="38"/>+ <connect gate="G$1" pin="PE8" pad="39"/>+ <connect gate="G$1" pin="PE9" pad="40"/>+ <connect gate="G$1" pin="PE10" pad="41"/>+ <connect gate="G$1" pin="PE11" pad="42"/>+ <connect gate="G$1" pin="PE12" pad="43"/>+ <connect gate="G$1" pin="PE13" pad="44"/>+ <connect gate="G$1" pin="PE14" pad="45"/>+ <connect gate="G$1" pin="PE15" pad="46"/>+ <connect gate="G$1" pin="PB10" pad="47"/>+ <connect gate="G$1" pin="VCAP" pad="48"/>+ <connect gate="G$1" pin="VSS@3" pad="49"/>+ <connect gate="G$1" pin="VDD@3" pad="50"/> <connect gate="G$1" pin="VDD@4" pad="100"/>- <connect gate="G$1" pin="PC12" pad="99"/>- <connect gate="G$1" pin="PC11" pad="98"/>- <connect gate="G$1" pin="PC10" pad="97"/>- <connect gate="G$1" pin="PA15_JTDI" pad="96"/>- <connect gate="G$1" pin="PA14_JTCK/SWCLK" pad="95"/>- <connect gate="G$1" pin="VDD@5" pad="94"/>- <connect gate="G$1" pin="VSS@4" pad="93"/>- <connect gate="G$1" pin="VDDUSB@2" pad="92"/>- <connect gate="G$1" pin="VSS@5" pad="91"/>- <connect gate="G$1" pin="PA13_JTMS/SWDIO" pad="90"/>- <connect gate="G$1" pin="PA12@2" pad="89"/>- <connect gate="G$1" pin="PA11" pad="88"/>- <connect gate="G$1" pin="PA10" pad="87"/>- <connect gate="G$1" pin="PA9" pad="86"/>- <connect gate="G$1" pin="PA8" pad="85"/>- <connect gate="G$1" pin="PC9" pad="84"/>- <connect gate="G$1" pin="PC8" pad="83"/>- <connect gate="G$1" pin="PC7" pad="82"/>- <connect gate="G$1" pin="PC6" pad="81"/>- <connect gate="G$1" pin="PD15" pad="80"/>- <connect gate="G$1" pin="PD14" pad="79"/>- <connect gate="G$1" pin="PD13" pad="78"/>- <connect gate="G$1" pin="PD12" pad="77"/>- <connect gate="G$1" pin="PD11" pad="76"/>- <connect gate="G$1" pin="PD10" pad="75"/>- <connect gate="G$1" pin="PD9" pad="74"/>- <connect gate="G$1" pin="PD8" pad="73"/>- <connect gate="G$1" pin="PB15" pad="72"/>- <connect gate="G$1" pin="PB14" pad="71"/>- <connect gate="G$1" pin="PB13" pad="70"/>- <connect gate="G$1" pin="PB12" pad="69"/>- <connect gate="G$1" pin="PB11" pad="68"/>- <connect gate="G$1" pin="PB10" pad="67"/>- <connect gate="G$1" pin="PE15" pad="66"/>- <connect gate="G$1" pin="PE14" pad="65"/>- <connect gate="G$1" pin="PE13" pad="64"/>- <connect gate="G$1" pin="PE12" pad="63"/>- <connect gate="G$1" pin="PE11" pad="62"/>- <connect gate="G$1" pin="PE10" pad="61"/>- <connect gate="G$1" pin="PE9" pad="60"/>- <connect gate="G$1" pin="PE8" pad="59"/>- <connect gate="G$1" pin="PE7" pad="58"/>- <connect gate="G$1" pin="PG1" pad="57"/>- <connect gate="G$1" pin="PG0" pad="56"/>- <connect gate="G$1" pin="PF15" pad="55"/>- <connect gate="G$1" pin="PF14" pad="54"/>- <connect gate="G$1" pin="PF13" pad="53"/>- <connect gate="G$1" pin="VDD@6" pad="52"/>- <connect gate="G$1" pin="VSS@6" pad="51"/>+ <connect gate="G$1" pin="VSS@4" pad="99"/>+ <connect gate="G$1" pin="PE1" pad="98"/>+ <connect gate="G$1" pin="PE0" pad="97"/>+ <connect gate="G$1" pin="PB9" pad="96"/>+ <connect gate="G$1" pin="PB8" pad="95"/>+ <connect gate="G$1" pin="PH3-BOOT0" pad="94"/>+ <connect gate="G$1" pin="PB7" pad="93"/>+ <connect gate="G$1" pin="PB6" pad="92"/>+ <connect gate="G$1" pin="PB5" pad="91"/>+ <connect gate="G$1" pin="PB4_NJTRST" pad="90"/>+ <connect gate="G$1" pin="PB3_JTDO/TRACESWO" pad="89"/>+ <connect gate="G$1" pin="PD7" pad="88"/>+ <connect gate="G$1" pin="PD6" pad="87"/>+ <connect gate="G$1" pin="PD5" pad="86"/>+ <connect gate="G$1" pin="PD4" pad="85"/>+ <connect gate="G$1" pin="PD3" pad="84"/>+ <connect gate="G$1" pin="PD2" pad="83"/>+ <connect gate="G$1" pin="PD1" pad="82"/>+ <connect gate="G$1" pin="PD0" pad="81"/>+ <connect gate="G$1" pin="PC12" pad="80"/>+ <connect gate="G$1" pin="PC11" pad="79"/>+ <connect gate="G$1" pin="PC10" pad="78"/>+ <connect gate="G$1" pin="PA15_JTDI" pad="77"/>+ <connect gate="G$1" pin="PA14_JTCK/SWCLK" pad="76"/>+ <connect gate="G$1" pin="VDD@5" pad="75"/>+ <connect gate="G$1" pin="VSS@5" pad="74"/>+ <connect gate="G$1" pin="VDDUSB" pad="73"/>+ <connect gate="G$1" pin="PA13_JTMS/SWDIO" pad="72"/>+ <connect gate="G$1" pin="PA12" pad="71"/>+ <connect gate="G$1" pin="PA11" pad="70"/>+ <connect gate="G$1" pin="PA10" pad="69"/>+ <connect gate="G$1" pin="PA9" pad="68"/>+ <connect gate="G$1" pin="PA8" pad="67"/>+ <connect gate="G$1" pin="PC9" pad="66"/>+ <connect gate="G$1" pin="PC8" pad="65"/>+ <connect gate="G$1" pin="PC7" pad="64"/>+ <connect gate="G$1" pin="PC6" pad="63"/>+ <connect gate="G$1" pin="PD15" pad="62"/>+ <connect gate="G$1" pin="PD14" pad="61"/>+ <connect gate="G$1" pin="PD13" pad="60"/>+ <connect gate="G$1" pin="PD12" pad="59"/>+ <connect gate="G$1" pin="PD11" pad="58"/>+ <connect gate="G$1" pin="PD10" pad="57"/>+ <connect gate="G$1" pin="PD9" pad="56"/>+ <connect gate="G$1" pin="PD8" pad="55"/>+ <connect gate="G$1" pin="PB15" pad="54"/>+ <connect gate="G$1" pin="PB14" pad="53"/>+ <connect gate="G$1" pin="PB13" pad="52"/>+ <connect gate="G$1" pin="PB12" pad="51"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="STM32U575VGT6" constant="no"/>+ <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+ <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589838909182926848" constant="no"/>+ <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/stm32u575vgt6" constant="no"/>+ <attribute name="MOUSER_PN" value="511-STM32U575VGT6" constant="no"/>+ <attribute name="DIGIKEY_PN" value="497-STM32U575VGT6-ND" constant="no"/>+ <attribute name="LCSC_PN" value="C5270988" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>