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STM32L462RET6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+100@@ -0,0 +1,100 @@+# STM32L462RET6++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)++STM32L462RET6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VBAT | power_in | Backup-domain supply for the RTC and backup registers, with a backup operating voltage of 1.55 V to 3.6 V (Table 22). |+| 2 | PC13 | bidirectional | 5 V tolerant GPIO supplied through the power switch that sinks at most 3 mA, so output speed must not exceed 2 MHz at 30 pF and it must not source current such as an LED drive; it also carries RTC_TAMP1, RTC_TS, RTC_OUT and WKUP2. |+| 3 | PC14-OSC32_IN | bidirectional | 5 V tolerant GPIO supplied through the power switch with the same 3 mA sink, 2 MHz / 30 pF and no-current-source limits, and used as the 32 kHz LSE crystal input (OSC32_IN) when enabled. |+| 4 | PC15-OSC32_OUT | bidirectional | 5 V tolerant GPIO supplied through the power switch with the same 3 mA sink, 2 MHz / 30 pF and no-current-source limits, and used as the 32 kHz LSE crystal output (OSC32_OUT) when enabled. |+| 5 | PH0-OSC_IN | bidirectional | Five-volt-tolerant I/O (FT) that serves as the high-speed crystal oscillator input (OSC_IN) for the 4 to 48 MHz crystal oscillator. |+| 6 | PH1-OSC_OUT | bidirectional | Five-volt-tolerant I/O (FT) that serves as the high-speed crystal oscillator output (OSC_OUT) for the 4 to 48 MHz crystal oscillator. |+| 7 | NRST | bidirectional | Bidirectional active-low reset pin with an embedded weak pull-up resistor. |+| 8 | PC0 | bidirectional | I/O with FT_fa structure (5 V tolerant, Fm+ capable, analog switch supplied by VDDA) offering ADC1_IN1 analog input and LPTIM1_IN1, I2C4_SCL, I2C3_SCL and LPUART1_RX alternate functions. |+| 9 | PC1 | bidirectional | I/O with FT_fa structure (5 V tolerant, Fm+ capable, analog switch supplied by VDDA) offering ADC1_IN2 analog input and TRACED0, LPTIM1_OUT, I2C4_SDA, I2C3_SDA and LPUART1_TX alternate functions. |+| 10 | PC2 | bidirectional | 5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN3 analog input and LPTIM1_IN2, SPI2_MISO and DFSDM1_CKOUT alternate functions. |+| 11 | PC3 | bidirectional | 5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN4 analog input and LPTIM1_ETR, SPI2_MOSI, SAI1_SD_A and LPTIM2_ETR alternate functions. |+| 12 | VSSA/VREF- | power_in | Combined analog ground and ADC negative reference pin, with VREF- internally connected to VSSA on this package as allowed by the ADC note. |+| 13 | VDDA/VREF+ | power_in | Combined analog supply and ADC positive reference: VDDA must be 1.62 V to 3.6 V when the ADC or COMP is used, 1.8 V minimum for DAC or OPAMP and 2.4 V minimum for VREFBUF (Table 22). |+| 14 | PA0 | bidirectional | 5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN5, OPAMP1_VINP, COMP1_INM, RTC_TAMP2 and WKUP1 functions. |+| 15 | PA1 | bidirectional | 5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN6, OPAMP1_VINM and COMP1_INP functions, plus TIM2_CH2, SPI1_SCK and USART2_RTS_DE. |+| 16 | PA2 | bidirectional | 5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN7, COMP2_INM and WKUP4 functions, plus TIM2_CH3, USART2_TX, LPUART1_TX and LSCO. |+| 17 | PA3 | bidirectional | 3.6 V tolerant I/O with TT_a structure (analog switch supplied by VDDA) offering ADC1_IN8, OPAMP1_VOUT and COMP2_INP functions, plus TIM2_CH4, USART2_RX, LPUART1_RX and QUADSPI_CLK. |+| 18 | VSS | power_in | Ground pin that must be connected to the ground supply, with variations between ground pins limited to 50 mV. |+| 19 | VDD | power_in | Main supply pin that must be kept within 1.71 V to 3.6 V, with variations between VDD pins limited to 50 mV. |+| 20 | PA4 | bidirectional | 3.6 V tolerant I/O with TT_a structure (analog switch supplied by VDDA) offering ADC1_IN9, DAC1_OUT1, COMP1_INM and COMP2_INM functions, plus SPI1_NSS, SPI3_NSS and USART2_CK. |+| 21 | PA5 | bidirectional | 3.6 V tolerant I/O with TT_a structure (analog switch supplied by VDDA) offering ADC1_IN10, COMP1_INM and COMP2_INM functions, plus TIM2_CH1, TIM2_ETR and SPI1_SCK. |+| 22 | PA6 | bidirectional | 5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN11 analog input, plus TIM1_BKIN, TIM3_CH1, SPI1_MISO and COMP1_OUT alternate functions. |+| 23 | PA7 | bidirectional | 5 V tolerant Fm+ capable I/O with FT_fa structure (analog switch supplied by VDDA) offering ADC1_IN12 analog input, plus TIM1_CH1N, TIM3_CH2, I2C3_SCL and SPI1_MOSI alternate functions. |+| 24 | PC4 | bidirectional | 5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN13 and COMP1_INM functions, plus USART3_TX. |+| 25 | PC5 | bidirectional | 5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN14, COMP1_INP and WKUP5 functions, plus USART3_RX. |+| 26 | PB0 | bidirectional | 5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN15 analog input, plus TIM1_CH2N, TIM3_CH3, SPI1_NSS and COMP1_OUT alternate functions. |+| 27 | PB1 | bidirectional | 5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN16 and COMP1_INM functions, plus TIM1_CH3N, TIM3_CH4, USART3_RTS_DE and QUADSPI_BK1_IO0. |+| 28 | PB2 | bidirectional | 5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering COMP1_INP function, plus RTC_OUT, LPTIM1_OUT, I2C3_SMBA and DFSDM1_CKIN0. |+| 29 | PB10 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f) with alternate functions including TIM2_CH3, I2C4_SCL, I2C2_SCL, SPI2_SCK, USART3_TX and LPUART1_RX. |+| 30 | PB11 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f) with alternate functions including TIM2_CH4, I2C4_SDA, I2C2_SDA, USART3_RX and LPUART1_TX. |+| 31 | VSS | power_in | Ground pin that must be connected to the ground supply, with variations between ground pins limited to 50 mV. |+| 32 | VDD | power_in | Main supply pin that must be kept within 1.71 V to 3.6 V, with variations between VDD pins limited to 50 mV. |+| 33 | PB12 | bidirectional | 5 V tolerant standard I/O (FT) with alternate functions including TIM1_BKIN, I2C2_SMBA, SPI2_NSS, DFSDM1_DATIN1, USART3_CK and CAN1_RX. |+| 34 | PB13 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f) with alternate functions including TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS and CAN1_TX. |+| 35 | PB14 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f) with alternate functions including TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE and TIM15_CH1. |+| 36 | PB15 | bidirectional | 5 V tolerant standard I/O (FT) with alternate functions including RTC_REFIN, TIM1_CH3N, SPI2_MOSI, SAI1_SD_A and TIM15_CH2. |+| 37 | PC6 | bidirectional | 5 V tolerant standard I/O (FT) with alternate functions including TIM3_CH1, DFSDM1_CKIN3, TSC_G4_IO1 and SDMMC1_D6. |+| 38 | PC7 | bidirectional | 5 V tolerant standard I/O (FT) with alternate functions including TIM3_CH2, DFSDM1_DATIN3, TSC_G4_IO2 and SDMMC1_D7. |+| 39 | PC8 | bidirectional | 5 V tolerant standard I/O (FT) with alternate functions including TIM3_CH3, TSC_G4_IO3 and SDMMC1_D0. |+| 40 | PC9 | bidirectional | 5 V tolerant standard I/O (FT) with alternate functions including TIM3_CH4, TSC_G4_IO4, USBNOE and SDMMC1_D1. |+| 41 | PA8 | bidirectional | 5 V tolerant standard I/O (FT) with alternate functions including MCO, TIM1_CH1, DFSDM1_CKIN1, USART1_CK, SAI1_SCK_A and LPTIM2_OUT. |+| 42 | PA9 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f) with alternate functions including TIM1_CH2, I2C1_SCL, DFSDM1_DATIN1, USART1_TX and SAI1_FS_A. |+| 43 | PA10 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f) with alternate functions including TIM1_CH3, I2C1_SDA, USART1_RX, USBCRS_SYNC and SAI1_SD_A. |+| 44 | PA11 | bidirectional | 5 V tolerant I/O with FT_u structure whose USB function (USBDM) is supplied by VDDUSB, also offering TIM1_CH4, SPI1_MISO, COMP1_OUT, USART1_CTS and CAN1_RX. |+| 45 | PA12 | bidirectional | 5 V tolerant Fm+ capable I/O with FT_fu structure whose USB function (USBDP) is supplied by VDDUSB, also offering TIM1_ETR, SPI1_MOSI, USART1_RTS_DE and CAN1_TX. |+| 46 | PA13 | bidirectional | 5 V tolerant I/O that after reset carries the JTMS/SWDAT debug function with its internal pull-up activated, and also offers IR_OUT, USBNOE and SAI1_SD_B. |+| 47 | VSS | power_in | Ground pin that must be connected to the ground supply, with variations between ground pins limited to 50 mV. |+| 48 | VDDUSB | power_in | USB supply pin that must be 3.0 V to 3.6 V when USB is used, and may be 0 V to 3.6 V when USB is not used (Table 22). |+| 49 | PA14 | bidirectional | 5 V tolerant I/O that after reset carries the JTCK/SWCLK debug function with its internal pull-down activated, and also offers LPTIM1_OUT, I2C1_SMBA, I2C4_SMBA and SAI1_FS_B. |+| 50 | PA15 | bidirectional | 5 V tolerant I/O that after reset carries the JTDI debug function with its internal pull-up activated, and also offers TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS and TSC_G3_IO1. |+| 51 | PC10 | bidirectional | 5 V tolerant standard I/O (FT) with alternate functions including TRACED1, SPI3_SCK, USART3_TX, UART4_TX, TSC_G3_IO2 and SDMMC1_D2. |+| 52 | PC11 | bidirectional | 5 V tolerant standard I/O (FT) with alternate functions including SPI3_MISO, USART3_RX, UART4_RX, TSC_G3_IO3 and SDMMC1_D3. |+| 53 | PC12 | bidirectional | 5 V tolerant standard I/O (FT) with alternate functions including TRACED3, SPI3_MOSI, USART3_CK, TSC_G3_IO4 and SDMMC1_CK. |+| 54 | PD2 | bidirectional | 5 V tolerant standard I/O (FT) with alternate functions including TRACED2, TIM3_ETR, USART3_RTS_DE, TSC_SYNC and SDMMC1_CMD. |+| 55 | PB3 | bidirectional | 5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) that after reset carries the JTDO/TRACESWO debug function and also offers COMP2_INM, TIM2_CH2, SPI1_SCK and SPI3_SCK. |+| 56 | PB4 | bidirectional | 5 V tolerant I/O with FT_fa structure that after reset carries the NJTRST debug function with its internal pull-up activated, and also offers COMP2_INP, TIM3_CH1, I2C3_SDA and SPI1_MISO. |+| 57 | PB5 | bidirectional | 5 V tolerant standard I/O (FT) with alternate functions including LPTIM1_IN1, TIM3_CH2, CAN1_RX, I2C1_SMBA, SPI1_MOSI, COMP2_OUT and TIM16_BKIN. |+| 58 | PB6 | bidirectional | 5 V tolerant I/O with FT_fa structure that also offers COMP2_INP, LPTIM1_ETR, I2C1_SCL, I2C4_SCL, USART1_TX and CAN1_TX. |+| 59 | PB7 | bidirectional | 5 V tolerant I/O with FT_fa structure that also offers COMP2_INM and PVD_IN, plus LPTIM1_IN2, I2C1_SDA, I2C4_SDA, USART1_RX and UART4_CTS. |+| 60 | PH3-BOOT0 | bidirectional | Boot configuration pin BOOT0 that is also available as general-purpose PH3; Table 15 gives no I/O structure for this pin. |+| 61 | PB8 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f) with alternate functions including I2C1_SCL, CAN1_RX, SDMMC1_D4, SAI1_MCLK_A and TIM16_CH1. |+| 62 | PB9 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f) with alternate functions including IR_OUT, I2C1_SDA, SPI2_NSS, CAN1_TX, SDMMC1_D5 and SAI1_FS_A. |+| 63 | VSS | power_in | Ground pin that must be connected to the ground supply, with variations between ground pins limited to 50 mV. |+| 64 | VDD | power_in | Main supply pin that must be kept within 1.71 V to 3.6 V, with variations between VDD pins limited to 50 mV. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-64(10x10) |+| Category | Embedded Processors & Controllers |+| Pins | 64 |++## CAD (KiCad official)++- Symbol: `STM32L462RET6`+- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`+- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)+- 3D model files: `stm32l462ret6-etched.step` / `stm32l462ret6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32l462ret6.step` / `stm32l462ret6.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922527418212352) (210 pp, sha256 `3a1333ab41d6e9a6`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32l462ret6-datasheet.pdf)
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Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32l462ret6",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32l462ret6.kicad_sym",+ "stm32l462ret6.kicad_mod",+ "stm32l462ret6.glb",+ "stm32l462ret6.step",+ "stm32l462ret6.lbr",+ "docs/hero.png",+ "docs/stm32l462ret6-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm32l462ret6-hero.glb",+ "stm32l462ret6-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM32L462RET6",+ "manufacturer": "STMicroelectronics",+ "package": "LQFP-64(10x10)",+ "pin_count": 64,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922527418212352",+ "parts": {+ "symbol": "stm32l462ret6.kicad_sym",+ "footprint": "stm32l462ret6.kicad_mod",+ "model_3d": "stm32l462ret6-hero.glb",+ "model_3d_plain": "stm32l462ret6.glb",+ "model_3d_step": "stm32l462ret6-etched.step",+ "model_3d_step_plain": "stm32l462ret6.step",+ "lbr": "stm32l462ret6.lbr"+ },+ "distributor_links": {+ "lcsc": "C1340473",+ "digikey": "497-17214-ND",+ "mouser": "511-STM32L462RET6"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T18:31:29Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-17214-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32L462RET6",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VBAT",+ "type": "power_in",+ "description": "Backup-domain supply for the RTC and backup registers, with a backup operating voltage of 1.55 V to 3.6 V (Table 22)."+ },+ {+ "number": "2",+ "name": "PC13",+ "type": "bidirectional",+ "description": "5 V tolerant GPIO supplied through the power switch that sinks at most 3 mA, so output speed must not exceed 2 MHz at 30 pF and it must not source current such as an LED drive; it also carries RTC_TAMP1, RTC_TS, RTC_OUT and WKUP2."+ },+ {+ "number": "3",+ "name": "PC14-OSC32_IN",+ "type": "bidirectional",+ "description": "5 V tolerant GPIO supplied through the power switch with the same 3 mA sink, 2 MHz / 30 pF and no-current-source limits, and used as the 32 kHz LSE crystal input (OSC32_IN) when enabled."+ },+ {+ "number": "4",+ "name": "PC15-OSC32_OUT",+ "type": "bidirectional",+ "description": "5 V tolerant GPIO supplied through the power switch with the same 3 mA sink, 2 MHz / 30 pF and no-current-source limits, and used as the 32 kHz LSE crystal output (OSC32_OUT) when enabled."+ },+ {+ "number": "5",+ "name": "PH0-OSC_IN",+ "type": "bidirectional",+ "description": "Five-volt-tolerant I/O (FT) that serves as the high-speed crystal oscillator input (OSC_IN) for the 4 to 48 MHz crystal oscillator."+ },+ {+ "number": "6",+ "name": "PH1-OSC_OUT",+ "type": "bidirectional",+ "description": "Five-volt-tolerant I/O (FT) that serves as the high-speed crystal oscillator output (OSC_OUT) for the 4 to 48 MHz crystal oscillator."+ },+ {+ "number": "7",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Bidirectional active-low reset pin with an embedded weak pull-up resistor."+ },+ {+ "number": "8",+ "name": "PC0",+ "type": "bidirectional",+ "description": "I/O with FT_fa structure (5 V tolerant, Fm+ capable, analog switch supplied by VDDA) offering ADC1_IN1 analog input and LPTIM1_IN1, I2C4_SCL, I2C3_SCL and LPUART1_RX alternate functions."+ },+ {+ "number": "9",+ "name": "PC1",+ "type": "bidirectional",+ "description": "I/O with FT_fa structure (5 V tolerant, Fm+ capable, analog switch supplied by VDDA) offering ADC1_IN2 analog input and TRACED0, LPTIM1_OUT, I2C4_SDA, I2C3_SDA and LPUART1_TX alternate functions."+ },+ {+ "number": "10",+ "name": "PC2",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN3 analog input and LPTIM1_IN2, SPI2_MISO and DFSDM1_CKOUT alternate functions."+ },+ {+ "number": "11",+ "name": "PC3",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN4 analog input and LPTIM1_ETR, SPI2_MOSI, SAI1_SD_A and LPTIM2_ETR alternate functions."+ },+ {+ "number": "12",+ "name": "VSSA/VREF-",+ "type": "power_in",+ "description": "Combined analog ground and ADC negative reference pin, with VREF- internally connected to VSSA on this package as allowed by the ADC note."+ },+ {+ "number": "13",+ "name": "VDDA/VREF+",+ "type": "power_in",+ "description": "Combined analog supply and ADC positive reference: VDDA must be 1.62 V to 3.6 V when the ADC or COMP is used, 1.8 V minimum for DAC or OPAMP and 2.4 V minimum for VREFBUF (Table 22)."+ },+ {+ "number": "14",+ "name": "PA0",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN5, OPAMP1_VINP, COMP1_INM, RTC_TAMP2 and WKUP1 functions."+ },+ {+ "number": "15",+ "name": "PA1",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN6, OPAMP1_VINM and COMP1_INP functions, plus TIM2_CH2, SPI1_SCK and USART2_RTS_DE."+ },+ {+ "number": "16",+ "name": "PA2",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN7, COMP2_INM and WKUP4 functions, plus TIM2_CH3, USART2_TX, LPUART1_TX and LSCO."+ },+ {+ "number": "17",+ "name": "PA3",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with TT_a structure (analog switch supplied by VDDA) offering ADC1_IN8, OPAMP1_VOUT and COMP2_INP functions, plus TIM2_CH4, USART2_RX, LPUART1_RX and QUADSPI_CLK."+ },+ {+ "number": "18",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin that must be connected to the ground supply, with variations between ground pins limited to 50 mV."+ },+ {+ "number": "19",+ "name": "VDD",+ "type": "power_in",+ "description": "Main supply pin that must be kept within 1.71 V to 3.6 V, with variations between VDD pins limited to 50 mV."+ },+ {+ "number": "20",+ "name": "PA4",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with TT_a structure (analog switch supplied by VDDA) offering ADC1_IN9, DAC1_OUT1, COMP1_INM and COMP2_INM functions, plus SPI1_NSS, SPI3_NSS and USART2_CK."+ },+ {+ "number": "21",+ "name": "PA5",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with TT_a structure (analog switch supplied by VDDA) offering ADC1_IN10, COMP1_INM and COMP2_INM functions, plus TIM2_CH1, TIM2_ETR and SPI1_SCK."+ },+ {+ "number": "22",+ "name": "PA6",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN11 analog input, plus TIM1_BKIN, TIM3_CH1, SPI1_MISO and COMP1_OUT alternate functions."+ },+ {+ "number": "23",+ "name": "PA7",+ "type": "bidirectional",+ "description": "5 V tolerant Fm+ capable I/O with FT_fa structure (analog switch supplied by VDDA) offering ADC1_IN12 analog input, plus TIM1_CH1N, TIM3_CH2, I2C3_SCL and SPI1_MOSI alternate functions."+ },+ {+ "number": "24",+ "name": "PC4",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN13 and COMP1_INM functions, plus USART3_TX."+ },+ {+ "number": "25",+ "name": "PC5",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN14, COMP1_INP and WKUP5 functions, plus USART3_RX."+ },+ {+ "number": "26",+ "name": "PB0",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN15 analog input, plus TIM1_CH2N, TIM3_CH3, SPI1_NSS and COMP1_OUT alternate functions."+ },+ {+ "number": "27",+ "name": "PB1",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering ADC1_IN16 and COMP1_INM functions, plus TIM1_CH3N, TIM3_CH4, USART3_RTS_DE and QUADSPI_BK1_IO0."+ },+ {+ "number": "28",+ "name": "PB2",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) offering COMP1_INP function, plus RTC_OUT, LPTIM1_OUT, I2C3_SMBA and DFSDM1_CKIN0."+ },+ {+ "number": "29",+ "name": "PB10",+ "type": "bidirectional",+ "description": "5 V tolerant Fm+ capable I/O (FT_f) with alternate functions including TIM2_CH3, I2C4_SCL, I2C2_SCL, SPI2_SCK, USART3_TX and LPUART1_RX."+ },+ {+ "number": "30",+ "name": "PB11",+ "type": "bidirectional",+ "description": "5 V tolerant Fm+ capable I/O (FT_f) with alternate functions including TIM2_CH4, I2C4_SDA, I2C2_SDA, USART3_RX and LPUART1_TX."+ },+ {+ "number": "31",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin that must be connected to the ground supply, with variations between ground pins limited to 50 mV."+ },+ {+ "number": "32",+ "name": "VDD",+ "type": "power_in",+ "description": "Main supply pin that must be kept within 1.71 V to 3.6 V, with variations between VDD pins limited to 50 mV."+ },+ {+ "number": "33",+ "name": "PB12",+ "type": "bidirectional",+ "description": "5 V tolerant standard I/O (FT) with alternate functions including TIM1_BKIN, I2C2_SMBA, SPI2_NSS, DFSDM1_DATIN1, USART3_CK and CAN1_RX."+ },+ {+ "number": "34",+ "name": "PB13",+ "type": "bidirectional",+ "description": "5 V tolerant Fm+ capable I/O (FT_f) with alternate functions including TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS and CAN1_TX."+ },+ {+ "number": "35",+ "name": "PB14",+ "type": "bidirectional",+ "description": "5 V tolerant Fm+ capable I/O (FT_f) with alternate functions including TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE and TIM15_CH1."+ },+ {+ "number": "36",+ "name": "PB15",+ "type": "bidirectional",+ "description": "5 V tolerant standard I/O (FT) with alternate functions including RTC_REFIN, TIM1_CH3N, SPI2_MOSI, SAI1_SD_A and TIM15_CH2."+ },+ {+ "number": "37",+ "name": "PC6",+ "type": "bidirectional",+ "description": "5 V tolerant standard I/O (FT) with alternate functions including TIM3_CH1, DFSDM1_CKIN3, TSC_G4_IO1 and SDMMC1_D6."+ },+ {+ "number": "38",+ "name": "PC7",+ "type": "bidirectional",+ "description": "5 V tolerant standard I/O (FT) with alternate functions including TIM3_CH2, DFSDM1_DATIN3, TSC_G4_IO2 and SDMMC1_D7."+ },+ {+ "number": "39",+ "name": "PC8",+ "type": "bidirectional",+ "description": "5 V tolerant standard I/O (FT) with alternate functions including TIM3_CH3, TSC_G4_IO3 and SDMMC1_D0."+ },+ {+ "number": "40",+ "name": "PC9",+ "type": "bidirectional",+ "description": "5 V tolerant standard I/O (FT) with alternate functions including TIM3_CH4, TSC_G4_IO4, USBNOE and SDMMC1_D1."+ },+ {+ "number": "41",+ "name": "PA8",+ "type": "bidirectional",+ "description": "5 V tolerant standard I/O (FT) with alternate functions including MCO, TIM1_CH1, DFSDM1_CKIN1, USART1_CK, SAI1_SCK_A and LPTIM2_OUT."+ },+ {+ "number": "42",+ "name": "PA9",+ "type": "bidirectional",+ "description": "5 V tolerant Fm+ capable I/O (FT_f) with alternate functions including TIM1_CH2, I2C1_SCL, DFSDM1_DATIN1, USART1_TX and SAI1_FS_A."+ },+ {+ "number": "43",+ "name": "PA10",+ "type": "bidirectional",+ "description": "5 V tolerant Fm+ capable I/O (FT_f) with alternate functions including TIM1_CH3, I2C1_SDA, USART1_RX, USBCRS_SYNC and SAI1_SD_A."+ },+ {+ "number": "44",+ "name": "PA11",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FT_u structure whose USB function (USBDM) is supplied by VDDUSB, also offering TIM1_CH4, SPI1_MISO, COMP1_OUT, USART1_CTS and CAN1_RX."+ },+ {+ "number": "45",+ "name": "PA12",+ "type": "bidirectional",+ "description": "5 V tolerant Fm+ capable I/O with FT_fu structure whose USB function (USBDP) is supplied by VDDUSB, also offering TIM1_ETR, SPI1_MOSI, USART1_RTS_DE and CAN1_TX."+ },+ {+ "number": "46",+ "name": "PA13",+ "type": "bidirectional",+ "description": "5 V tolerant I/O that after reset carries the JTMS/SWDAT debug function with its internal pull-up activated, and also offers IR_OUT, USBNOE and SAI1_SD_B."+ },+ {+ "number": "47",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin that must be connected to the ground supply, with variations between ground pins limited to 50 mV."+ },+ {+ "number": "48",+ "name": "VDDUSB",+ "type": "power_in",+ "description": "USB supply pin that must be 3.0 V to 3.6 V when USB is used, and may be 0 V to 3.6 V when USB is not used (Table 22)."+ },+ {+ "number": "49",+ "name": "PA14",+ "type": "bidirectional",+ "description": "5 V tolerant I/O that after reset carries the JTCK/SWCLK debug function with its internal pull-down activated, and also offers LPTIM1_OUT, I2C1_SMBA, I2C4_SMBA and SAI1_FS_B."+ },+ {+ "number": "50",+ "name": "PA15",+ "type": "bidirectional",+ "description": "5 V tolerant I/O that after reset carries the JTDI debug function with its internal pull-up activated, and also offers TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS and TSC_G3_IO1."+ },+ {+ "number": "51",+ "name": "PC10",+ "type": "bidirectional",+ "description": "5 V tolerant standard I/O (FT) with alternate functions including TRACED1, SPI3_SCK, USART3_TX, UART4_TX, TSC_G3_IO2 and SDMMC1_D2."+ },+ {+ "number": "52",+ "name": "PC11",+ "type": "bidirectional",+ "description": "5 V tolerant standard I/O (FT) with alternate functions including SPI3_MISO, USART3_RX, UART4_RX, TSC_G3_IO3 and SDMMC1_D3."+ },+ {+ "number": "53",+ "name": "PC12",+ "type": "bidirectional",+ "description": "5 V tolerant standard I/O (FT) with alternate functions including TRACED3, SPI3_MOSI, USART3_CK, TSC_G3_IO4 and SDMMC1_CK."+ },+ {+ "number": "54",+ "name": "PD2",+ "type": "bidirectional",+ "description": "5 V tolerant standard I/O (FT) with alternate functions including TRACED2, TIM3_ETR, USART3_RTS_DE, TSC_SYNC and SDMMC1_CMD."+ },+ {+ "number": "55",+ "name": "PB3",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FT_a structure (analog switch supplied by VDDA) that after reset carries the JTDO/TRACESWO debug function and also offers COMP2_INM, TIM2_CH2, SPI1_SCK and SPI3_SCK."+ },+ {+ "number": "56",+ "name": "PB4",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FT_fa structure that after reset carries the NJTRST debug function with its internal pull-up activated, and also offers COMP2_INP, TIM3_CH1, I2C3_SDA and SPI1_MISO."+ },+ {+ "number": "57",+ "name": "PB5",+ "type": "bidirectional",+ "description": "5 V tolerant standard I/O (FT) with alternate functions including LPTIM1_IN1, TIM3_CH2, CAN1_RX, I2C1_SMBA, SPI1_MOSI, COMP2_OUT and TIM16_BKIN."+ },+ {+ "number": "58",+ "name": "PB6",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FT_fa structure that also offers COMP2_INP, LPTIM1_ETR, I2C1_SCL, I2C4_SCL, USART1_TX and CAN1_TX."+ },+ {+ "number": "59",+ "name": "PB7",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FT_fa structure that also offers COMP2_INM and PVD_IN, plus LPTIM1_IN2, I2C1_SDA, I2C4_SDA, USART1_RX and UART4_CTS."+ },+ {+ "number": "60",+ "name": "PH3-BOOT0",+ "type": "bidirectional",+ "description": "Boot configuration pin BOOT0 that is also available as general-purpose PH3; Table 15 gives no I/O structure for this pin."+ },+ {+ "number": "61",+ "name": "PB8",+ "type": "bidirectional",+ "description": "5 V tolerant Fm+ capable I/O (FT_f) with alternate functions including I2C1_SCL, CAN1_RX, SDMMC1_D4, SAI1_MCLK_A and TIM16_CH1."+ },+ {+ "number": "62",+ "name": "PB9",+ "type": "bidirectional",+ "description": "5 V tolerant Fm+ capable I/O (FT_f) with alternate functions including IR_OUT, I2C1_SDA, SPI2_NSS, CAN1_TX, SDMMC1_D5 and SAI1_FS_A."+ },+ {+ "number": "63",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin that must be connected to the ground supply, with variations between ground pins limited to 50 mV."+ },+ {+ "number": "64",+ "name": "VDD",+ "type": "power_in",+ "description": "Main supply pin that must be kept within 1.71 V to 3.6 V, with variations between VDD pins limited to 50 mV."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: No specs field exists in the schema; headline electrical parameters are not output here. Pin electri; Pin type mapping: datasheet I/O is mapped to KiCad bidirectional, and VSS/VDD/VDDA/VREF/VBAT/VDDUSB ; PH3-BOOT0 (pin 60): Table 15 lists type I/O with no I/O structure, and the BOOT0 function is an inpu"+ ],+ "pages_sent": 78,+ "cost_usd": 0.3616,+ "at": "2026-10-08T18:30:40"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922527418212352",+ "pages": 210,+ "sha256": "3a1333ab41d6e9a6",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 64,+ "described": 64,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm32l462ret6.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b0c827bc5c05552175d28affe44a5bd2ab45c9c36efff6ff07a74cc449b13db4",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm32l462ret6-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f1cdbedaa44057e65823f147eea4c76c465ba38dc12aeaf1de5697f91f0b5385",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}