STM32L431RCT6

@@ -0,0 +1,125 @@+# STM32L431RCT6++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)++STM32L431RCT6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VBAT | power_in | Backup domain supply, 1.55-3.6 V. Feeds RTC, LSE and backup registers when VDD is absent. |+| 2 | PC13 | bidirectional | GPIO through backup power switch (limited drive, ≤3 mA, ≤2 MHz, ≤30 pF). Alt: EVENTOUT. Additional: RTC_TAMP1, RTC_TS, RTC_OUT, WKUP2. |+| 3 | PC14-OSC32_IN | bidirectional | PC14 GPIO / LSE 32.768 kHz crystal input (OSC32_IN). Backup-domain, limited drive. |+| 4 | PC15-OSC32_OUT | bidirectional | PC15 GPIO / LSE 32.768 kHz crystal output (OSC32_OUT). Backup-domain, limited drive. |+| 5 | PH0-OSC_IN | bidirectional | PH0 GPIO / HSE main crystal oscillator input (4-48 MHz). |+| 6 | PH1-OSC_OUT | bidirectional | PH1 GPIO / HSE main crystal oscillator output. |+| 7 | NRST | bidirectional | Bidirectional device reset. Active low with internal pull-up; can be driven low by the MCU to reset external circuitry. |+| 8 | PC0 | bidirectional | 5V-tolerant FT_fa GPIO. Alt: LPTIM1_IN1, I2C3_SCL, LPUART1_RX, LPTIM2_IN1, EVENTOUT. Additional: ADC1_IN1. |+| 9 | PC1 | bidirectional | 5V-tolerant FT_fa GPIO. Alt: LPTIM1_OUT, I2C3_SDA, LPUART1_TX, EVENTOUT. Additional: ADC1_IN2. |+| 10 | PC2 | bidirectional | FT_a GPIO (analog capable). Alt: LPTIM1_IN2, SPI2_MISO, EVENTOUT. Additional: ADC1_IN3. |+| 11 | PC3 | bidirectional | FT_a GPIO. Alt: LPTIM1_ETR, SPI2_MOSI, SAI1_SD_A, LPTIM2_ETR, EVENTOUT. Additional: ADC1_IN4. |+| 12 | VSSA/VREF- | power_in | Analog ground and negative ADC/DAC reference (combined pin on LQFP64). |+| 13 | VDDA/VREF+ | power_in | Analog supply and positive ADC/DAC reference (combined pin on LQFP64), 1.62-3.6 V. |+| 14 | PA0 | bidirectional | FT_a GPIO. Alt: TIM2_CH1, USART2_CTS, COMP1_OUT, SAI1_EXTCLK, TIM2_ETR, EVENTOUT. Additional: OPAMP1_VINP, COMP1_INM, ADC1_IN5, RTC_TAMP2, WKUP1. |+| 15 | PA1 | bidirectional | FT_a GPIO. Alt: TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE, TIM15_CH1N, EVENTOUT. Additional: OPAMP1_VINM, COMP1_INP, ADC1_IN6. |+| 16 | PA2 | bidirectional | FT_a GPIO. Alt: TIM2_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS, COMP2_OUT, TIM15_CH1, EVENTOUT. Additional: COMP2_INM, ADC1_IN7, WKUP4, LSCO. |+| 17 | PA3 | bidirectional | TT_a GPIO (3.3 V-tolerant analog). Alt: TIM2_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK, SAI1_MCLK_A, TIM15_CH2, EVENTOUT. Additional: OPAMP1_VOUT, COMP2_INP, ADC1_IN8. |+| 18 | VSS | power_in | Digital ground. |+| 19 | VDD | power_in | Digital core/IO supply, 1.71-3.6 V. |+| 20 | PA4 | bidirectional | TT_a GPIO. Alt: SPI1_NSS, SPI3_NSS, USART2_CK, SAI1_FS_B, LPTIM2_OUT, EVENTOUT. Additional: COMP1_INM, COMP2_INM, ADC1_IN9, DAC1_OUT1. |+| 21 | PA5 | bidirectional | TT_a GPIO. Alt: TIM2_CH1, TIM2_ETR, SPI1_SCK, LPTIM2_ETR, EVENTOUT. Additional: COMP1_INM, COMP2_INM, ADC1_IN10, DAC1_OUT2. |+| 22 | PA6 | bidirectional | FT_a GPIO. Alt: TIM1_BKIN, SPI1_MISO, COMP1_OUT, USART3_CTS, LPUART1_CTS, QUADSPI_BK1_IO3, TIM1_BKIN_COMP2, TIM16_CH1, EVENTOUT. Additional: ADC1_IN11. |+| 23 | PA7 | bidirectional | FT_fa GPIO. Alt: TIM1_CH1N, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2, COMP2_OUT, EVENTOUT. Additional: ADC1_IN12. |+| 24 | PC4 | bidirectional | FT_a GPIO. Alt: USART3_TX, EVENTOUT. Additional: COMP1_INM, ADC1_IN13. |+| 25 | PC5 | bidirectional | FT_a GPIO. Alt: USART3_RX, EVENTOUT. Additional: COMP1_INP, ADC1_IN14, WKUP5. |+| 26 | PB0 | bidirectional | FT_a GPIO. Alt: TIM1_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1, COMP1_OUT, SAI1_EXTCLK, EVENTOUT. Additional: ADC1_IN15. |+| 27 | PB1 | bidirectional | FT_a GPIO. Alt: TIM1_CH3N, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0, LPTIM2_IN1, EVENTOUT. Additional: COMP1_INM, ADC1_IN16. |+| 28 | PB2 | bidirectional | FT_a GPIO. Alt: RTC_OUT, LPTIM1_OUT, I2C3_SMBA, EVENTOUT. Additional: COMP1_INP. |+| 29 | PB10 | bidirectional | FT_f GPIO. Alt: TIM2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX, TSC_SYNC, QUADSPI_CLK, COMP1_OUT, SAI1_SCK_A, EVENTOUT. |+| 30 | PB11 | bidirectional | FT_f GPIO. Alt: TIM2_CH4, I2C2_SDA, USART3_RX, LPUART1_TX, QUADSPI_BK1_NCS, COMP2_OUT, EVENTOUT. |+| 31 | VSS | power_in | Digital ground. |+| 32 | VDD | power_in | Digital core/IO supply, 1.71-3.6 V. |+| 33 | PB12 | bidirectional | FT GPIO. Alt: TIM1_BKIN, TIM1_BKIN_COMP2, I2C2_SMBA, SPI2_NSS, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, SWPMI1_IO, SAI1_FS_A, TIM15_BKIN, EVENTOUT. |+| 34 | PB13 | bidirectional | FT_f GPIO. Alt: TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, SWPMI1_TX, SAI1_SCK_A, TIM15_CH1N, EVENTOUT. |+| 35 | PB14 | bidirectional | FT_f GPIO. Alt: TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE, TSC_G1_IO3, SWPMI1_RX, SAI1_MCLK_A, TIM15_CH1, EVENTOUT. |+| 36 | PB15 | bidirectional | FT GPIO. Alt: RTC_REFIN, TIM1_CH3N, SPI2_MOSI, TSC_G1_IO4, SWPMI1_SUSPEND, SAI1_SD_A, TIM15_CH2, EVENTOUT. |+| 37 | PC6 | bidirectional | FT GPIO. Alt: TSC_G4_IO1, SDMMC1_D6, EVENTOUT. |+| 38 | PC7 | bidirectional | FT GPIO. Alt: TSC_G4_IO2, SDMMC1_D7, EVENTOUT. |+| 39 | PC8 | bidirectional | FT GPIO. Alt: TSC_G4_IO3, SDMMC1_D0, EVENTOUT. |+| 40 | PC9 | bidirectional | FT GPIO. Alt: TSC_G4_IO4, SDMMC1_D1, EVENTOUT. |+| 41 | PA8 | bidirectional | FT GPIO. Alt: MCO, TIM1_CH1, USART1_CK, SWPMI1_IO, SAI1_SCK_A, LPTIM2_OUT, EVENTOUT. |+| 42 | PA9 | bidirectional | FT_f GPIO. Alt: TIM1_CH2, I2C1_SCL, USART1_TX, SAI1_FS_A, TIM15_BKIN, EVENTOUT. |+| 43 | PA10 | bidirectional | FT_f GPIO. Alt: TIM1_CH3, I2C1_SDA, USART1_RX, SAI1_SD_A, EVENTOUT. |+| 44 | PA11 | bidirectional | FT_u GPIO (USB-tolerant). Alt: TIM1_CH4, TIM1_BKIN2, SPI1_MISO, COMP1_OUT, USART1_CTS, CAN1_RX, TIM1_BKIN2_COMP1, EVENTOUT. |+| 45 | PA12 | bidirectional | FT_u GPIO. Alt: TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, CAN1_TX, EVENTOUT. |+| 46 | PA13 (JTMS-SWDIO) | bidirectional | FT GPIO; after reset configured as JTMS-SWDIO with internal pull-up. Alt: JTMS-SWDIO, IR_OUT, SWPMI1_TX, SAI1_SD_B, EVENTOUT. |+| 47 | VSS | power_in | Digital ground. |+| 48 | VDD | power_in | Digital core/IO supply, 1.71-3.6 V. |+| 49 | PA14 (JTCK-SWCLK) | bidirectional | FT GPIO; after reset configured as JTCK-SWCLK with internal pull-down. Alt: JTCK-SWCLK, LPTIM1_OUT, I2C1_SMBA, SWPMI1_RX, SAI1_FS_B, EVENTOUT. |+| 50 | PA15 (JTDI) | bidirectional | FT GPIO; after reset configured as JTDI with internal pull-up. Alt: JTDI, TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS, SPI3_NSS, USART3_RTS_DE, TSC_G3_IO1, SWPMI1_SUSPEND, EVENTOUT. |+| 51 | PC10 | bidirectional | FT GPIO. Alt: SPI3_SCK, USART3_TX, TSC_G3_IO2, SDMMC1_D2, EVENTOUT. |+| 52 | PC11 | bidirectional | FT GPIO. Alt: SPI3_MISO, USART3_RX, TSC_G3_IO3, SDMMC1_D3, EVENTOUT. |+| 53 | PC12 | bidirectional | FT GPIO. Alt: SPI3_MOSI, USART3_CK, TSC_G3_IO4, SDMMC1_CK, EVENTOUT. |+| 54 | PD2 | bidirectional | FT GPIO. Alt: USART3_RTS_DE, TSC_SYNC, SDMMC1_CMD, EVENTOUT. |+| 55 | PB3 (JTDO-TRACESWO) | bidirectional | FT_a GPIO; after reset configured as JTDO-TRACESWO with pull-up. Alt: JTDO-TRACESWO, TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS_DE, SAI1_SCK_B, EVENTOUT. Additional: COMP2_INM. |+| 56 | PB4 (NJTRST) | bidirectional | FT_fa GPIO; after reset configured as NJTRST with pull-up. Alt: NJTRST, I2C3_SDA, SPI1_MISO, SPI3_MISO, USART1_CTS, TSC_G2_IO1, SAI1_MCLK_B, EVENTOUT. Additional: COMP2_INP. |+| 57 | PB5 | bidirectional | FT GPIO. Alt: LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, TSC_G2_IO2, COMP2_OUT, SAI1_SD_B, TIM16_BKIN, EVENTOUT. |+| 58 | PB6 | bidirectional | FT_fa GPIO. Alt: LPTIM1_ETR, I2C1_SCL, USART1_TX, TSC_G2_IO3, SAI1_FS_B, TIM16_CH1N, EVENTOUT. Additional: COMP2_INP. |+| 59 | PB7 | bidirectional | FT_fa GPIO. Alt: LPTIM1_IN2, I2C1_SDA, USART1_RX, TSC_G2_IO4, EVENTOUT. Additional: COMP2_INM, PVD_IN. |+| 60 | PH3/BOOT0 | bidirectional | FT pin combining PH3 GPIO with BOOT0 boot-mode select input (sampled at reset). Alt: EVENTOUT. Additional: BOOT0. |+| 61 | PB8 | bidirectional | FT_f GPIO. Alt: I2C1_SCL, CAN1_RX, SDMMC1_D4, SAI1_MCLK_A, TIM16_CH1, EVENTOUT. |+| 62 | PB9 | bidirectional | FT_f GPIO. Alt: IR_OUT, I2C1_SDA, SPI2_NSS, CAN1_TX, SDMMC1_D5, SAI1_FS_A, EVENTOUT. |+| 63 | VSS | power_in | Digital ground. |+| 64 | VDD | power_in | Digital core/IO supply, 1.71-3.6 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-64(10x10) |+| Category | MCU |+| Pins | 64 |++## Ordering variants++- `STM32L431RCT6RCT6`+- `STM32L431RCT6RBT6`+- `STM32L431RCT6RCT6TR`+- `STM32L431RCT6RBT6TR`+- `STM32L431RCT6RCT3`+- `STM32L431RCT6RBT3`+- `STM32L431RCT6RCY6`+- `STM32L431RCT6RBY6`+- `STM32L431RCT6RCI6`+- `STM32L431RCT6RBI6`+- `STM32L431RCT6VCT6`+- `STM32L431RCT6VCT3`+- `STM32L431RCT6VCH6`+- `STM32L431RCT6CCT6`+- `STM32L431RCT6CBT6`+- `STM32L431RCT6CCT3`+- `STM32L431RCT6CBT3`+- `STM32L431RCT6CCU6`+- `STM32L431RCT6CBU6`+- `STM32L431RCT6CCY6`+- `STM32L431RCT6CBY6`+- `STM32L431RCT6KCU6`+- `STM32L431RCT6KBU6`++## CAD (KiCad official)++- Symbol: `STM32L431RCT6`+- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`+- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/stm32l431rct6.pdf) (200 pp, sha256 `5871072c6a82c80b`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32l431rct6-datasheet.pdf)