component
STM32L431KBU6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-32(5x5). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+69@@ -0,0 +1,69 @@+# STM32L431KBU6++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · UFQFPN-32(5x5)++STM32L431KBU6 from STMicroelectronics, in a UFQFPN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD | power_in | Main power supply, 1.71 to 3.6 V |+| 2 | PC14 | bidirectional | Port C pin 14, 32 kHz oscillator input, EVENTOUT alternate function, OSC32_IN additional function |+| 3 | PC15 | bidirectional | Port C pin 15, 32 kHz oscillator output, EVENTOUT alternate function, OSC32_OUT additional function |+| 4 | NRST | input | Bidirectional reset pin with embedded weak pull-up resistor |+| 5 | VDDA | power_in | Analog power supply and positive reference voltage for ADC, DAC, OPAMP, COMP, VREFBUF, 1.62 to 3.6 V when analog peripherals used |+| 6 | PA0 | bidirectional | Port A pin 0, FT_a structure, TIM2_CH1, USART2_CTS, COMP1_OUT, SAI1_EXTCLK, ADC1_IN5, OPAMP1_VINP, RTC_TAMP2, WKUP1, CK_IN alternate/additional functions |+| 7 | PA1 | bidirectional | Port A pin 1, FT_a structure, TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE, ADC1_IN6, OPAMP1_VINM, COMP1_INP alternate/additional functions |+| 8 | PA2 | bidirectional | Port A pin 2, FT_a structure, TIM2_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS, ADC1_IN7, COMP2_OUT, TIM15_CH1 alternate/additional functions |+| 9 | PA3 | bidirectional | Port A pin 3, TT structure, TIM2_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK, ADC1_IN8, OPAMP1_VOUT, COMP2_INP alternate/additional functions |+| 10 | PA4 | bidirectional | Port A pin 4, TT structure, SPI1_NSS, SPI3_NSS, USART2_CK, ADC1_IN9, DAC1_OUT1, COMP1_INM, COMP2_INM alternate/additional functions |+| 11 | PA5 | bidirectional | Port A pin 5, TT structure, TIM2_CH1, TIM2_ETR, SPI1_SCK, ADC1_IN10, DAC1_OUT2, COMP1_INM, COMP2_INM, LPTIM2_ETR alternate/additional functions |+| 12 | PA6 | bidirectional | Port A pin 6, FT_a structure, TIM1_BKIN, SPI1_MISO, COMP1_OUT, USART3_CTS, ADC1_IN11, QUADSPI_BK1_IO3, TIM16_CH1 alternate/additional functions |+| 13 | PA7 | bidirectional | Port A pin 7, FT_fa structure, TIM1_CH1N, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2, ADC1_IN12, COMP2_OUT alternate/additional functions |+| 14 | PB0 | bidirectional | Port B pin 0, FT_a structure, TIM1_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1, ADC1_IN15, COMP1_OUT, SAI1_EXTCLK alternate/additional functions |+| 15 | PB1 | bidirectional | Port B pin 1, FT_a structure, TIM1_CH3N, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0, ADC1_IN16, COMP1_INM, LPTIM2_IN1 alternate/additional functions |+| 16 | VSS | power_in | Ground pin |+| 17 | VDD | power_in | Main power supply, 1.71 to 3.6 V |+| 18 | PA8 | bidirectional | Port A pin 8, FT structure, MCO, TIM1_CH1, USART1_CK, SWPMI1_IO, SAI1_SCK_A, LPTIM2_OUT alternate functions |+| 19 | PA9 | bidirectional | Port A pin 9, FT_f structure with Fm+ capability, TIM1_CH2, I2C1_SCL, USART1_TX, SAI1_FS_A, TIM15_BKIN alternate functions |+| 20 | PA10 | bidirectional | Port A pin 10, FT_f structure with Fm+ capability, TIM1_CH3, I2C1_SDA, USART1_RX, SAI1_SD_A alternate functions |+| 21 | PA11 | bidirectional | Port A pin 11, FT structure, TIM1_CH4, TIM1_BKIN2, SPI1_MISO, COMP1_OUT, USART1_CTS, CAN1_RX, TIM1_BKIN2_COMP1 alternate functions |+| 22 | PA12 | bidirectional | Port A pin 12, FT structure, TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, CAN1_TX alternate functions |+| 23 | PA13 | bidirectional | Port A pin 13 / JTMS-SWDIO, after reset configured as JTAG debug port with internal pull-up, SWPMI1_TX, SAI1_SD_B, IR_OUT alternate functions |+| 24 | PA14 | bidirectional | Port A pin 14 / JTCK-SWCLK, after reset configured as JTAG debug port with internal pull-down, LPTIM1_OUT, I2C1_SMBA, SWPMI1_RX, SAI1_FS_B alternate functions |+| 25 | PA15 | bidirectional | Port A pin 15 / JTDI, after reset configured as JTAG input with internal pull-up, TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS, SPI3_NSS, USART3_RTS_DE, SWPMI1_SUSPEND alternate functions |+| 26 | PB3 | bidirectional | Port B pin 3 / JTDO-TRACESWO, after reset configured as JTAG output with FT_a structure, TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS_DE, SAI1_SCK_B, COMP2_INM alternate/additional functions |+| 27 | PB4 | bidirectional | Port B pin 4 / NJTRST, after reset configured as JTAG input with FT_fa structure, I2C3_SDA, SPI1_MISO, SPI3_MISO, USART1_CTS, TSC_G2_IO1, SAI1_MCLK_B, COMP2_INP alternate/additional functions |+| 28 | PB5 | bidirectional | Port B pin 5, FT structure, LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, TSC_G2_IO2, COMP2_OUT, SAI1_SD_B, TIM16_BKIN alternate functions |+| 29 | PB6 | bidirectional | Port B pin 6, FT_fa structure, LPTIM1_ETR, I2C1_SCL, USART1_TX, TSC_G2_IO3, SAI1_FS_B, TIM16_CH1N, COMP2_INP alternate functions |+| 30 | PB7 | bidirectional | Port B pin 7, FT_fa structure, LPTIM1_IN2, I2C1_SDA, USART1_RX, TSC_G2_IO4, COMP2_INM, PVD_IN alternate/additional functions |+| 31 | PH3 | bidirectional | Port H pin 3 / BOOT0, selects boot mode between Flash memory and system bootloader on power-up or reset |+| 32 | VSS | power_in | Ground pin |+| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | UFQFPN-32(5x5) |+| Category | Embedded Processors & Controllers |+| Pins | 33 |++## CAD (KiCad official)++- Symbol: `STM32L431KBU6`+- Footprint: `Package_DFN_QFN:UFQFPN-32-1EP_5x5mm_P0.5mm_EP3.5x3.5mm`+- 3D model: UFQFPN-32(5x5) (KiCad packages3D, STEP)+- 3D model files: `stm32l431kbu6-etched.step` / `stm32l431kbu6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32l431kbu6.step` / `stm32l431kbu6.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590222344049221632) (208 pp, sha256 `71963de3cb899f8f`, retrieved 2026-10-01, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32l431kbu6-datasheet.pdf)
page.jsonadded+308@@ -0,0 +1,308 @@+{+ "slug": "stm32l431kbu6",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-32(5x5). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32l431kbu6",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32l431kbu6.kicad_sym",+ "stm32l431kbu6.kicad_mod",+ "stm32l431kbu6.glb",+ "stm32l431kbu6.step",+ "stm32l431kbu6.lbr",+ "docs/hero.png",+ "docs/stm32l431kbu6-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "STM32L431KBU6",+ "manufacturer": "STMicroelectronics",+ "package": "UFQFPN-32(5x5)",+ "pin_count": 33,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590222344049221632",+ "parts": {+ "symbol": "stm32l431kbu6.kicad_sym",+ "footprint": "stm32l431kbu6.kicad_mod",+ "model_3d": "stm32l431kbu6-etched.glb",+ "model_3d_plain": "stm32l431kbu6.glb",+ "model_3d_step": "stm32l431kbu6-etched.step",+ "model_3d_step_plain": "stm32l431kbu6.step",+ "lbr": "stm32l431kbu6.lbr"+ },+ "distributor_links": {+ "lcsc": "C2826408",+ "digikey": "497-18595-ND",+ "mouser": "511-STM32L431KBU6"+ },+ "distributor_check": {+ "checked_at": "2026-10-01T18:45:21Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-18595-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32L431KBU6",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VDD",+ "type": "power_in",+ "description": "Main power supply, 1.71 to 3.6 V"+ },+ {+ "number": "2",+ "name": "PC14",+ "type": "bidirectional",+ "description": "Port C pin 14, 32 kHz oscillator input, EVENTOUT alternate function, OSC32_IN additional function"+ },+ {+ "number": "3",+ "name": "PC15",+ "type": "bidirectional",+ "description": "Port C pin 15, 32 kHz oscillator output, EVENTOUT alternate function, OSC32_OUT additional function"+ },+ {+ "number": "4",+ "name": "NRST",+ "type": "input",+ "description": "Bidirectional reset pin with embedded weak pull-up resistor"+ },+ {+ "number": "5",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog power supply and positive reference voltage for ADC, DAC, OPAMP, COMP, VREFBUF, 1.62 to 3.6 V when analog peripherals used"+ },+ {+ "number": "6",+ "name": "PA0",+ "type": "bidirectional",+ "description": "Port A pin 0, FT_a structure, TIM2_CH1, USART2_CTS, COMP1_OUT, SAI1_EXTCLK, ADC1_IN5, OPAMP1_VINP, RTC_TAMP2, WKUP1, CK_IN alternate/additional functions"+ },+ {+ "number": "7",+ "name": "PA1",+ "type": "bidirectional",+ "description": "Port A pin 1, FT_a structure, TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE, ADC1_IN6, OPAMP1_VINM, COMP1_INP alternate/additional functions"+ },+ {+ "number": "8",+ "name": "PA2",+ "type": "bidirectional",+ "description": "Port A pin 2, FT_a structure, TIM2_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS, ADC1_IN7, COMP2_OUT, TIM15_CH1 alternate/additional functions"+ },+ {+ "number": "9",+ "name": "PA3",+ "type": "bidirectional",+ "description": "Port A pin 3, TT structure, TIM2_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK, ADC1_IN8, OPAMP1_VOUT, COMP2_INP alternate/additional functions"+ },+ {+ "number": "10",+ "name": "PA4",+ "type": "bidirectional",+ "description": "Port A pin 4, TT structure, SPI1_NSS, SPI3_NSS, USART2_CK, ADC1_IN9, DAC1_OUT1, COMP1_INM, COMP2_INM alternate/additional functions"+ },+ {+ "number": "11",+ "name": "PA5",+ "type": "bidirectional",+ "description": "Port A pin 5, TT structure, TIM2_CH1, TIM2_ETR, SPI1_SCK, ADC1_IN10, DAC1_OUT2, COMP1_INM, COMP2_INM, LPTIM2_ETR alternate/additional functions"+ },+ {+ "number": "12",+ "name": "PA6",+ "type": "bidirectional",+ "description": "Port A pin 6, FT_a structure, TIM1_BKIN, SPI1_MISO, COMP1_OUT, USART3_CTS, ADC1_IN11, QUADSPI_BK1_IO3, TIM16_CH1 alternate/additional functions"+ },+ {+ "number": "13",+ "name": "PA7",+ "type": "bidirectional",+ "description": "Port A pin 7, FT_fa structure, TIM1_CH1N, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2, ADC1_IN12, COMP2_OUT alternate/additional functions"+ },+ {+ "number": "14",+ "name": "PB0",+ "type": "bidirectional",+ "description": "Port B pin 0, FT_a structure, TIM1_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1, ADC1_IN15, COMP1_OUT, SAI1_EXTCLK alternate/additional functions"+ },+ {+ "number": "15",+ "name": "PB1",+ "type": "bidirectional",+ "description": "Port B pin 1, FT_a structure, TIM1_CH3N, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0, ADC1_IN16, COMP1_INM, LPTIM2_IN1 alternate/additional functions"+ },+ {+ "number": "16",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin"+ },+ {+ "number": "17",+ "name": "VDD",+ "type": "power_in",+ "description": "Main power supply, 1.71 to 3.6 V"+ },+ {+ "number": "18",+ "name": "PA8",+ "type": "bidirectional",+ "description": "Port A pin 8, FT structure, MCO, TIM1_CH1, USART1_CK, SWPMI1_IO, SAI1_SCK_A, LPTIM2_OUT alternate functions"+ },+ {+ "number": "19",+ "name": "PA9",+ "type": "bidirectional",+ "description": "Port A pin 9, FT_f structure with Fm+ capability, TIM1_CH2, I2C1_SCL, USART1_TX, SAI1_FS_A, TIM15_BKIN alternate functions"+ },+ {+ "number": "20",+ "name": "PA10",+ "type": "bidirectional",+ "description": "Port A pin 10, FT_f structure with Fm+ capability, TIM1_CH3, I2C1_SDA, USART1_RX, SAI1_SD_A alternate functions"+ },+ {+ "number": "21",+ "name": "PA11",+ "type": "bidirectional",+ "description": "Port A pin 11, FT structure, TIM1_CH4, TIM1_BKIN2, SPI1_MISO, COMP1_OUT, USART1_CTS, CAN1_RX, TIM1_BKIN2_COMP1 alternate functions"+ },+ {+ "number": "22",+ "name": "PA12",+ "type": "bidirectional",+ "description": "Port A pin 12, FT structure, TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, CAN1_TX alternate functions"+ },+ {+ "number": "23",+ "name": "PA13",+ "type": "bidirectional",+ "description": "Port A pin 13 / JTMS-SWDIO, after reset configured as JTAG debug port with internal pull-up, SWPMI1_TX, SAI1_SD_B, IR_OUT alternate functions"+ },+ {+ "number": "24",+ "name": "PA14",+ "type": "bidirectional",+ "description": "Port A pin 14 / JTCK-SWCLK, after reset configured as JTAG debug port with internal pull-down, LPTIM1_OUT, I2C1_SMBA, SWPMI1_RX, SAI1_FS_B alternate functions"+ },+ {+ "number": "25",+ "name": "PA15",+ "type": "bidirectional",+ "description": "Port A pin 15 / JTDI, after reset configured as JTAG input with internal pull-up, TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS, SPI3_NSS, USART3_RTS_DE, SWPMI1_SUSPEND alternate functions"+ },+ {+ "number": "26",+ "name": "PB3",+ "type": "bidirectional",+ "description": "Port B pin 3 / JTDO-TRACESWO, after reset configured as JTAG output with FT_a structure, TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS_DE, SAI1_SCK_B, COMP2_INM alternate/additional functions"+ },+ {+ "number": "27",+ "name": "PB4",+ "type": "bidirectional",+ "description": "Port B pin 4 / NJTRST, after reset configured as JTAG input with FT_fa structure, I2C3_SDA, SPI1_MISO, SPI3_MISO, USART1_CTS, TSC_G2_IO1, SAI1_MCLK_B, COMP2_INP alternate/additional functions"+ },+ {+ "number": "28",+ "name": "PB5",+ "type": "bidirectional",+ "description": "Port B pin 5, FT structure, LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, TSC_G2_IO2, COMP2_OUT, SAI1_SD_B, TIM16_BKIN alternate functions"+ },+ {+ "number": "29",+ "name": "PB6",+ "type": "bidirectional",+ "description": "Port B pin 6, FT_fa structure, LPTIM1_ETR, I2C1_SCL, USART1_TX, TSC_G2_IO3, SAI1_FS_B, TIM16_CH1N, COMP2_INP alternate functions"+ },+ {+ "number": "30",+ "name": "PB7",+ "type": "bidirectional",+ "description": "Port B pin 7, FT_fa structure, LPTIM1_IN2, I2C1_SDA, USART1_RX, TSC_G2_IO4, COMP2_INM, PVD_IN alternate/additional functions"+ },+ {+ "number": "31",+ "name": "PH3",+ "type": "bidirectional",+ "description": "Port H pin 3 / BOOT0, selects boot mode between Flash memory and system bootloader on power-up or reset"+ },+ {+ "number": "32",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin"+ },+ {+ "number": "33",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin 1 VDD and Pin 17 VDD are both power supply pins; both are referenced in Table 15 on different pa; Pins 23, 24, 25, 26, 27 have JTAG/debug functionality that is active after reset with internal pull-; Pins 2, 3 have dual functionality as oscillator pins and GPIO; they are supplied through the power s",+ "2/33 pins cited to the wrong page (name found elsewhere): ['16:VSS@p67', '17:VDD@p67']"+ ],+ "pages_sent": 80,+ "cost_usd": 0.5611,+ "at": "2026-10-01T18:45:03"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590222344049221632",+ "pages": 208,+ "sha256": "71963de3cb899f8f",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 33,+ "described": 33,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}