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STM32L431CBU6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+85@@ -0,0 +1,85 @@+# STM32L431CBU6++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · UFQFPN-48(7x7)++STM32L431CBU6 from STMicroelectronics, in a UFQFPN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VBAT | power_in | Backup domain supply for RTC, LSE and backup registers, operating range 1.55 V to 3.6 V. |+| 2 | PC13 | bidirectional | FT I/O supplied via the VBAT power switch, output limited to 2 MHz with 30 pF max load and no current-source use (3 mA switch limit); additional functions RTC_TAMP1, RTC_TS, RTC_OUT, WKUP2. |+| 3 | PC14-OSC32_IN | bidirectional | FT I/O (PC14) supplied via the power switch with the same 2 MHz/30 pF output limit; serves as LSE 32.768 kHz oscillator input OSC32_IN. |+| 4 | PC15-OSC32_OUT | bidirectional | FT I/O (PC15) supplied via the power switch with the same 2 MHz/30 pF output limit; serves as LSE 32.768 kHz oscillator output OSC32_OUT. |+| 5 | PH0-OSC_IN | bidirectional | FT I/O (PH0) that serves as the 4 to 48 MHz HSE crystal oscillator input OSC_IN. |+| 6 | PH1-OSC_OUT | bidirectional | FT I/O (PH1) that serves as the HSE crystal oscillator output OSC_OUT. |+| 7 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor. |+| 8 | VSSA/VREF- | power_in | Analog ground, also the negative reference voltage for the ADC (VREF- = VSSA). |+| 9 | VDDA/VREF+ | power_in | Analog supply, 1.62 V min with ADC or COMP, 1.8 V with DAC or OPAMP, 2.4 V with VREFBUF, up to 3.6 V; also the positive reference voltage. |+| 10 | PA0 | bidirectional | FT_a I/O with TIM2_CH1, USART2_CTS, COMP1_OUT; analog functions OPAMP1_VINP, COMP1_INM, ADC1_IN5, RTC_TAMP2, WKUP1. |+| 11 | PA1 | bidirectional | FT_a I/O with TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE; analog functions OPAMP1_VINM, COMP1_INP, ADC1_IN6. |+| 12 | PA2 | bidirectional | FT_a I/O with TIM2_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS; analog functions COMP2_INM, ADC1_IN7, WKUP4, LSCO. |+| 13 | PA3 | bidirectional | TT_a (3.6 V tolerant) I/O with TIM2_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK; analog functions OPAMP1_VOUT, COMP2_INP, ADC1_IN8. |+| 14 | PA4 | bidirectional | TT_a (3.6 V tolerant) I/O with SPI1_NSS, SPI3_NSS, USART2_CK; analog functions COMP1_INM, COMP2_INM, ADC1_IN9, DAC1_OUT1. |+| 15 | PA5 | bidirectional | TT_a (3.6 V tolerant) I/O with TIM2_CH1, TIM2_ETR, SPI1_SCK; analog functions COMP1_INM, COMP2_INM, ADC1_IN10, DAC1_OUT2. |+| 16 | PA6 | bidirectional | FT_a I/O with TIM1_BKIN, SPI1_MISO, COMP1_OUT, USART3_CTS, QUADSPI_BK1_IO3; analog function ADC1_IN11. |+| 17 | PA7 | bidirectional | FT_fa I/O (Fm+ capable) with TIM1_CH1N, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2; analog function ADC1_IN12. |+| 18 | PB0 | bidirectional | FT_a I/O with TIM1_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1; analog function ADC1_IN15. |+| 19 | PB1 | bidirectional | FT_a I/O with TIM1_CH3N, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0; analog functions COMP1_INM, ADC1_IN16. |+| 20 | PB2 | bidirectional | FT_a I/O with RTC_OUT, LPTIM1_OUT, I2C3_SMBA; analog function COMP1_INP. |+| 21 | PB10 | bidirectional | FT_f I/O (Fm+ capable) with TIM2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX, QUADSPI_CLK. |+| 22 | PB11 | bidirectional | FT_f I/O (Fm+ capable) with TIM2_CH4, I2C2_SDA, USART3_RX, LPUART1_TX, QUADSPI_BK1_NCS. |+| 23 | VSS | power_in | Digital ground; all VSS pins must be connected to the external ground. |+| 24 | VDD | power_in | Digital supply, 1.71 V to 3.6 V; must be decoupled with ceramic capacitors close to the pin. |+| 25 | PB12 | bidirectional | FT I/O with TIM1_BKIN, I2C2_SMBA, SPI2_NSS, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, SWPMI1_IO, SAI1_FS_A. |+| 26 | PB13 | bidirectional | FT_f I/O (Fm+ capable) with TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, SWPMI1_TX, SAI1_SCK_A. |+| 27 | PB14 | bidirectional | FT_f I/O (Fm+ capable) with TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE, TSC_G1_IO3, SWPMI1_RX, SAI1_MCLK_A. |+| 28 | PB15 | bidirectional | FT I/O with RTC_REFIN, TIM1_CH3N, SPI2_MOSI, TSC_G1_IO4, SWPMI1_SUSPEND, SAI1_SD_A. |+| 29 | PA8 | bidirectional | FT I/O with MCO, TIM1_CH1, USART1_CK, SWPMI1_IO, SAI1_SCK_A, LPTIM2_OUT. |+| 30 | PA9 | bidirectional | FT_f I/O (Fm+ capable) with TIM1_CH2, I2C1_SCL, USART1_TX, SAI1_FS_A, TIM15_BKIN. |+| 31 | PA10 | bidirectional | FT_f I/O (Fm+ capable) with TIM1_CH3, I2C1_SDA, USART1_RX, SAI1_SD_A. |+| 32 | PA11 | bidirectional | FT I/O with TIM1_CH4, TIM1_BKIN2, SPI1_MISO, COMP1_OUT, USART1_CTS, CAN1_RX. |+| 33 | PA12 | bidirectional | FT I/O with TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, CAN1_TX. |+| 34 | PA13 (JTMS-SWDIO) | bidirectional | FT I/O that is JTMS-SWDIO after reset with internal pull-up active; also IR_OUT, SWPMI1_TX, SAI1_SD_B. |+| 35 | VSS | power_in | Digital ground; all VSS pins must be connected to the external ground. |+| 36 | VDD | power_in | Digital supply, 1.71 V to 3.6 V; must be decoupled with ceramic capacitors close to the pin. |+| 37 | PA14 (JTCK-SWCLK) | bidirectional | FT I/O that is JTCK-SWCLK after reset with internal pull-down active; also LPTIM1_OUT, I2C1_SMBA, SWPMI1_RX, SAI1_FS_B. |+| 38 | PA15 (JTDI) | bidirectional | FT I/O that is JTDI after reset with internal pull-up active; also TIM2_CH1, USART2_RX, SPI1_NSS, SPI3_NSS, TSC_G3_IO1. |+| 39 | PB3 (JTDO-TRACESWO) | bidirectional | FT_a I/O that is JTDO-TRACESWO after reset; also TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS_DE, SAI1_SCK_B, analog COMP2_INM. |+| 40 | PB4 (NJTRST) | bidirectional | FT_fa I/O (Fm+ capable) that is NJTRST after reset with internal pull-up active; also I2C3_SDA, SPI1_MISO, SPI3_MISO, USART1_CTS, analog COMP2_INP. |+| 41 | PB5 | bidirectional | FT I/O with LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, TSC_G2_IO2, COMP2_OUT, SAI1_SD_B, TIM16_BKIN. |+| 42 | PB6 | bidirectional | FT_fa I/O (Fm+ capable) with LPTIM1_ETR, I2C1_SCL, USART1_TX, TSC_G2_IO3, SAI1_FS_B, TIM16_CH1N; analog COMP2_INP. |+| 43 | PB7 | bidirectional | FT_fa I/O (Fm+ capable) with LPTIM1_IN2, I2C1_SDA, USART1_RX, TSC_G2_IO4; analog COMP2_INM, PVD_IN. |+| 44 | PH3/BOOT0 | input | FT pin used as the BOOT0 boot mode selection input (PH3 GPIO with EVENTOUT alternate function). |+| 45 | PB8 | bidirectional | FT_f I/O (Fm+ capable) with I2C1_SCL, CAN1_RX, SDMMC1_D4, SAI1_MCLK_A, TIM16_CH1. |+| 46 | PB9 | bidirectional | FT_f I/O (Fm+ capable) with IR_OUT, I2C1_SDA, SPI2_NSS, CAN1_TX, SDMMC1_D5, SAI1_FS_A. |+| 47 | VSS | power_in | Digital ground; all VSS pins must be connected to the external ground. |+| 48 | VDD | power_in | Digital supply, 1.71 V to 3.6 V; must be decoupled with ceramic capacitors close to the pin. |+| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | UFQFPN-48(7x7) |+| Category | Embedded Processors & Controllers |+| Pins | 49 |++## CAD (KiCad official)++- Symbol: `STM32L431CBU6`+- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`+- 3D model: UFQFPN-48(7x7) (KiCad packages3D, STEP)+- 3D model files: `stm32l431cbu6-etched.step` / `stm32l431cbu6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32l431cbu6.step` / `stm32l431cbu6.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588917371532677120) (208 pp, sha256 `9407aade68696ec5`, retrieved 2026-10-03, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32l431cbu6-datasheet.pdf)
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Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32l431cbu6",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32l431cbu6.kicad_sym",+ "stm32l431cbu6.kicad_mod",+ "stm32l431cbu6.glb",+ "stm32l431cbu6.step",+ "stm32l431cbu6.lbr",+ "docs/hero.png",+ "docs/stm32l431cbu6-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm32l431cbu6-hero.glb",+ "stm32l431cbu6-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM32L431CBU6",+ "manufacturer": "STMicroelectronics",+ "package": "UFQFPN-48(7x7)",+ "pin_count": 49,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588917371532677120",+ "parts": {+ "symbol": "stm32l431cbu6.kicad_sym",+ "footprint": "stm32l431cbu6.kicad_mod",+ "model_3d": "stm32l431cbu6-hero.glb",+ "model_3d_plain": "stm32l431cbu6.glb",+ "model_3d_step": "stm32l431cbu6-etched.step",+ "model_3d_step_plain": "stm32l431cbu6.step",+ "lbr": "stm32l431cbu6.lbr"+ },+ "distributor_links": {+ "lcsc": 915967,+ "digikey": "497-17849-ND",+ "mouser": "511-STM32L431CBU6"+ },+ "distributor_check": {+ "checked_at": "2026-10-03T01:35:49Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-17849-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32L431CBU6",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VBAT",+ "type": "power_in",+ "description": "Backup domain supply for RTC, LSE and backup registers, operating range 1.55 V to 3.6 V."+ },+ {+ "number": "2",+ "name": "PC13",+ "type": "bidirectional",+ "description": "FT I/O supplied via the VBAT power switch, output limited to 2 MHz with 30 pF max load and no current-source use (3 mA switch limit); additional functions RTC_TAMP1, RTC_TS, RTC_OUT, WKUP2."+ },+ {+ "number": "3",+ "name": "PC14-OSC32_IN",+ "type": "bidirectional",+ "description": "FT I/O (PC14) supplied via the power switch with the same 2 MHz/30 pF output limit; serves as LSE 32.768 kHz oscillator input OSC32_IN."+ },+ {+ "number": "4",+ "name": "PC15-OSC32_OUT",+ "type": "bidirectional",+ "description": "FT I/O (PC15) supplied via the power switch with the same 2 MHz/30 pF output limit; serves as LSE 32.768 kHz oscillator output OSC32_OUT."+ },+ {+ "number": "5",+ "name": "PH0-OSC_IN",+ "type": "bidirectional",+ "description": "FT I/O (PH0) that serves as the 4 to 48 MHz HSE crystal oscillator input OSC_IN."+ },+ {+ "number": "6",+ "name": "PH1-OSC_OUT",+ "type": "bidirectional",+ "description": "FT I/O (PH1) that serves as the HSE crystal oscillator output OSC_OUT."+ },+ {+ "number": "7",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Bidirectional reset pin with embedded weak pull-up resistor."+ },+ {+ "number": "8",+ "name": "VSSA/VREF-",+ "type": "power_in",+ "description": "Analog ground, also the negative reference voltage for the ADC (VREF- = VSSA)."+ },+ {+ "number": "9",+ "name": "VDDA/VREF+",+ "type": "power_in",+ "description": "Analog supply, 1.62 V min with ADC or COMP, 1.8 V with DAC or OPAMP, 2.4 V with VREFBUF, up to 3.6 V; also the positive reference voltage."+ },+ {+ "number": "10",+ "name": "PA0",+ "type": "bidirectional",+ "description": "FT_a I/O with TIM2_CH1, USART2_CTS, COMP1_OUT; analog functions OPAMP1_VINP, COMP1_INM, ADC1_IN5, RTC_TAMP2, WKUP1."+ },+ {+ "number": "11",+ "name": "PA1",+ "type": "bidirectional",+ "description": "FT_a I/O with TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE; analog functions OPAMP1_VINM, COMP1_INP, ADC1_IN6."+ },+ {+ "number": "12",+ "name": "PA2",+ "type": "bidirectional",+ "description": "FT_a I/O with TIM2_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS; analog functions COMP2_INM, ADC1_IN7, WKUP4, LSCO."+ },+ {+ "number": "13",+ "name": "PA3",+ "type": "bidirectional",+ "description": "TT_a (3.6 V tolerant) I/O with TIM2_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK; analog functions OPAMP1_VOUT, COMP2_INP, ADC1_IN8."+ },+ {+ "number": "14",+ "name": "PA4",+ "type": "bidirectional",+ "description": "TT_a (3.6 V tolerant) I/O with SPI1_NSS, SPI3_NSS, USART2_CK; analog functions COMP1_INM, COMP2_INM, ADC1_IN9, DAC1_OUT1."+ },+ {+ "number": "15",+ "name": "PA5",+ "type": "bidirectional",+ "description": "TT_a (3.6 V tolerant) I/O with TIM2_CH1, TIM2_ETR, SPI1_SCK; analog functions COMP1_INM, COMP2_INM, ADC1_IN10, DAC1_OUT2."+ },+ {+ "number": "16",+ "name": "PA6",+ "type": "bidirectional",+ "description": "FT_a I/O with TIM1_BKIN, SPI1_MISO, COMP1_OUT, USART3_CTS, QUADSPI_BK1_IO3; analog function ADC1_IN11."+ },+ {+ "number": "17",+ "name": "PA7",+ "type": "bidirectional",+ "description": "FT_fa I/O (Fm+ capable) with TIM1_CH1N, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2; analog function ADC1_IN12."+ },+ {+ "number": "18",+ "name": "PB0",+ "type": "bidirectional",+ "description": "FT_a I/O with TIM1_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1; analog function ADC1_IN15."+ },+ {+ "number": "19",+ "name": "PB1",+ "type": "bidirectional",+ "description": "FT_a I/O with TIM1_CH3N, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0; analog functions COMP1_INM, ADC1_IN16."+ },+ {+ "number": "20",+ "name": "PB2",+ "type": "bidirectional",+ "description": "FT_a I/O with RTC_OUT, LPTIM1_OUT, I2C3_SMBA; analog function COMP1_INP."+ },+ {+ "number": "21",+ "name": "PB10",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) with TIM2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX, QUADSPI_CLK."+ },+ {+ "number": "22",+ "name": "PB11",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) with TIM2_CH4, I2C2_SDA, USART3_RX, LPUART1_TX, QUADSPI_BK1_NCS."+ },+ {+ "number": "23",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground; all VSS pins must be connected to the external ground."+ },+ {+ "number": "24",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital supply, 1.71 V to 3.6 V; must be decoupled with ceramic capacitors close to the pin."+ },+ {+ "number": "25",+ "name": "PB12",+ "type": "bidirectional",+ "description": "FT I/O with TIM1_BKIN, I2C2_SMBA, SPI2_NSS, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, SWPMI1_IO, SAI1_FS_A."+ },+ {+ "number": "26",+ "name": "PB13",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) with TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, SWPMI1_TX, SAI1_SCK_A."+ },+ {+ "number": "27",+ "name": "PB14",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) with TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE, TSC_G1_IO3, SWPMI1_RX, SAI1_MCLK_A."+ },+ {+ "number": "28",+ "name": "PB15",+ "type": "bidirectional",+ "description": "FT I/O with RTC_REFIN, TIM1_CH3N, SPI2_MOSI, TSC_G1_IO4, SWPMI1_SUSPEND, SAI1_SD_A."+ },+ {+ "number": "29",+ "name": "PA8",+ "type": "bidirectional",+ "description": "FT I/O with MCO, TIM1_CH1, USART1_CK, SWPMI1_IO, SAI1_SCK_A, LPTIM2_OUT."+ },+ {+ "number": "30",+ "name": "PA9",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) with TIM1_CH2, I2C1_SCL, USART1_TX, SAI1_FS_A, TIM15_BKIN."+ },+ {+ "number": "31",+ "name": "PA10",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) with TIM1_CH3, I2C1_SDA, USART1_RX, SAI1_SD_A."+ },+ {+ "number": "32",+ "name": "PA11",+ "type": "bidirectional",+ "description": "FT I/O with TIM1_CH4, TIM1_BKIN2, SPI1_MISO, COMP1_OUT, USART1_CTS, CAN1_RX."+ },+ {+ "number": "33",+ "name": "PA12",+ "type": "bidirectional",+ "description": "FT I/O with TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, CAN1_TX."+ },+ {+ "number": "34",+ "name": "PA13 (JTMS-SWDIO)",+ "type": "bidirectional",+ "description": "FT I/O that is JTMS-SWDIO after reset with internal pull-up active; also IR_OUT, SWPMI1_TX, SAI1_SD_B."+ },+ {+ "number": "35",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground; all VSS pins must be connected to the external ground."+ },+ {+ "number": "36",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital supply, 1.71 V to 3.6 V; must be decoupled with ceramic capacitors close to the pin."+ },+ {+ "number": "37",+ "name": "PA14 (JTCK-SWCLK)",+ "type": "bidirectional",+ "description": "FT I/O that is JTCK-SWCLK after reset with internal pull-down active; also LPTIM1_OUT, I2C1_SMBA, SWPMI1_RX, SAI1_FS_B."+ },+ {+ "number": "38",+ "name": "PA15 (JTDI)",+ "type": "bidirectional",+ "description": "FT I/O that is JTDI after reset with internal pull-up active; also TIM2_CH1, USART2_RX, SPI1_NSS, SPI3_NSS, TSC_G3_IO1."+ },+ {+ "number": "39",+ "name": "PB3 (JTDO-TRACESWO)",+ "type": "bidirectional",+ "description": "FT_a I/O that is JTDO-TRACESWO after reset; also TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS_DE, SAI1_SCK_B, analog COMP2_INM."+ },+ {+ "number": "40",+ "name": "PB4 (NJTRST)",+ "type": "bidirectional",+ "description": "FT_fa I/O (Fm+ capable) that is NJTRST after reset with internal pull-up active; also I2C3_SDA, SPI1_MISO, SPI3_MISO, USART1_CTS, analog COMP2_INP."+ },+ {+ "number": "41",+ "name": "PB5",+ "type": "bidirectional",+ "description": "FT I/O with LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, TSC_G2_IO2, COMP2_OUT, SAI1_SD_B, TIM16_BKIN."+ },+ {+ "number": "42",+ "name": "PB6",+ "type": "bidirectional",+ "description": "FT_fa I/O (Fm+ capable) with LPTIM1_ETR, I2C1_SCL, USART1_TX, TSC_G2_IO3, SAI1_FS_B, TIM16_CH1N; analog COMP2_INP."+ },+ {+ "number": "43",+ "name": "PB7",+ "type": "bidirectional",+ "description": "FT_fa I/O (Fm+ capable) with LPTIM1_IN2, I2C1_SDA, USART1_RX, TSC_G2_IO4; analog COMP2_INM, PVD_IN."+ },+ {+ "number": "44",+ "name": "PH3/BOOT0",+ "type": "input",+ "description": "FT pin used as the BOOT0 boot mode selection input (PH3 GPIO with EVENTOUT alternate function)."+ },+ {+ "number": "45",+ "name": "PB8",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) with I2C1_SCL, CAN1_RX, SDMMC1_D4, SAI1_MCLK_A, TIM16_CH1."+ },+ {+ "number": "46",+ "name": "PB9",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) with IR_OUT, I2C1_SDA, SPI2_NSS, CAN1_TX, SDMMC1_D5, SAI1_FS_A."+ },+ {+ "number": "47",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground; all VSS pins must be connected to the external ground."+ },+ {+ "number": "48",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital supply, 1.71 V to 3.6 V; must be decoupled with ceramic capacitors close to the pin."+ },+ {+ "number": "49",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "exposed pad 49 added from the footprint"+ ],+ "pages_sent": 80,+ "cost_usd": 0.5694,+ "at": "2026-10-03T01:35:23"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588917371532677120",+ "pages": 208,+ "sha256": "9407aade68696ec5",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 49,+ "described": 49,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}