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STM32L151RBT6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+100@@ -0,0 +1,100 @@+# STM32L151RBT6TR++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)++STM32L151RBT6TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VLCD | power_in | LCD power supply pin; note 3 states that for STM32L151xx devices this pin should be connected to VDD. |+| 2 | PC13-WKUP2 | bidirectional | 5 V tolerant (FT) general-purpose I/O PC13, also RTC_TAMP1, RTC_TS, RTC_OUT and WKUP2 wakeup function. |+| 3 | PC14-OSC32_IN | bidirectional | Standard 3.3 V (TC) I/O PC14, used as OSC32_IN only when the LSE oscillator is on (LSEON in RCC_CSR), otherwise usable as GPIO with LSE having priority. |+| 4 | PC15-OSC32_OUT | bidirectional | Standard 3.3 V (TC) I/O PC15, used as OSC32_OUT only when the LSE oscillator is on (LSEON in RCC_CSR), otherwise usable as GPIO with LSE having priority. |+| 5 | PH0-OSC_IN | bidirectional | Standard 3.3 V (TC) I/O PH0, used as OSC_IN only when the HSE oscillator is on (HSEON in RCC_CR), otherwise usable as GPIO with HSE having priority. |+| 6 | PH1-OSC_OUT | bidirectional | Standard 3.3 V (TC) I/O PH1, used as OSC_OUT only when the HSE oscillator is on (HSEON in RCC_CR), otherwise usable as GPIO with HSE having priority. |+| 7 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor. |+| 8 | PC0 | bidirectional | 5 V tolerant (FT) I/O PC0 with analog inputs ADC_IN10 and COMP1_INP and alternate function LCD_SEG18 as printed. |+| 9 | PC1 | bidirectional | 5 V tolerant (FT) I/O PC1 with analog inputs ADC_IN11 and COMP1_INP and alternate function LCD_SEG19 as printed. |+| 10 | PC2 | bidirectional | 5 V tolerant (FT) I/O PC2 with analog inputs ADC_IN12 and COMP1_INP and alternate function LCD_SEG20 as printed. |+| 11 | PC3 | bidirectional | Standard 3.3 V (TC) I/O PC3 with analog inputs ADC_IN13 and COMP1_INP and alternate function LCD_SEG21 as printed. |+| 12 | VSSA | power_in | Analog ground pin; VSSA must be tied to ground. |+| 13 | VDDA | power_in | Analog supply pin; ADC characteristics specify VDDA from 1.8 V to 3.6 V. |+| 14 | PA0-WKUP1 | bidirectional | 5 V tolerant (FT) I/O PA0 with USART2_CTS and TIM2_CH1_ETR alternate functions, plus WKUP1, ADC_IN0 and COMP1_INP. |+| 15 | PA1 | bidirectional | 5 V tolerant (FT) I/O PA1 with USART2_RTS, TIM2_CH2 and LCD_SEG0 alternate functions, plus ADC_IN1 and COMP1_INP. |+| 16 | PA2 | bidirectional | 5 V tolerant (FT) I/O PA2 with USART2_TX, TIM2_CH3, TIM9_CH1 and LCD_SEG1 alternate functions, plus ADC_IN2 and COMP1_INP. |+| 17 | PA3 | bidirectional | Standard 3.3 V (TC) I/O PA3 with USART2_RX, TIM2_CH4, TIM9_CH2 and LCD_SEG2 alternate functions, plus ADC_IN3 and COMP1_INP. |+| 18 | VSS_4 | power_in | Digital ground pin. |+| 19 | VDD_4 | power_in | Digital supply pin; for this ordering option (no T option character) the VDD range is 1.8 V to 3.6 V with BOR enabled. |+| 20 | PA4 | bidirectional | Standard 3.3 V (TC) I/O PA4 with SPI1_NSS and USART2_CK alternate functions, plus ADC_IN4, DAC_OUT1 and COMP1_INP. |+| 21 | PA5 | bidirectional | Standard 3.3 V (TC) I/O PA5 with SPI1_SCK and TIM2_CH1_ETR alternate functions, plus ADC_IN5, DAC_OUT2 and COMP1_INP. |+| 22 | PA6 | bidirectional | 5 V tolerant (FT) I/O PA6 with SPI1_MISO, TIM3_CH1, LCD_SEG3 and TIM10_CH1 alternate functions, plus ADC_IN6 and COMP1_INP. |+| 23 | PA7 | bidirectional | 5 V tolerant (FT) I/O PA7 with SPI1_MOSI, TIM3_CH2, LCD_SEG4 and TIM11_CH1 alternate functions, plus ADC_IN7 and COMP1_INP. |+| 24 | PC4 | bidirectional | 5 V tolerant (FT) I/O PC4 with alternate function LCD_SEG22 as printed, plus ADC_IN14 and COMP1_INP. |+| 25 | PC5 | bidirectional | 5 V tolerant (FT) I/O PC5 with alternate function LCD_SEG23 as printed, plus ADC_IN15 and COMP1_INP. |+| 26 | PB0 | bidirectional | Standard 3.3 V (TC) I/O PB0 with TIM3_CH3 and LCD_SEG5 alternate functions, plus ADC_IN8, COMP1_INP and VREF_OUT. |+| 27 | PB1 | bidirectional | 5 V tolerant (FT) I/O PB1 with TIM3_CH4 and LCD_SEG6 alternate functions, plus ADC_IN9, COMP1_INP and VREF_OUT. |+| 28 | PB2/BOOT1 | bidirectional | 5 V tolerant (FT) I/O PB2 that is also the BOOT1 boot-mode pin. |+| 29 | PB10 | bidirectional | 5 V tolerant (FT) I/O PB10 with I2C2_SCL, USART3_TX, TIM2_CH3 and LCD_SEG10 alternate functions. |+| 30 | PB11 | bidirectional | 5 V tolerant (FT) I/O PB11 with I2C2_SDA, USART3_RX, TIM2_CH4 and LCD_SEG11 alternate functions. |+| 31 | VSS_1 | power_in | Digital ground pin. |+| 32 | VDD_1 | power_in | Digital supply pin; for this ordering option the VDD range is 1.8 V to 3.6 V with BOR enabled. |+| 33 | PB12 | bidirectional | 5 V tolerant (FT) I/O PB12 with SPI2_NSS, I2C2_SMBA, USART3_CK, LCD_SEG12 and TIM10_CH1 alternate functions, plus ADC_IN18 and COMP1_INP. |+| 34 | PB13 | bidirectional | 5 V tolerant (FT) I/O PB13 with SPI2_SCK, USART3_CTS, LCD_SEG13 and TIM9_CH1 alternate functions, plus ADC_IN19 and COMP1_INP. |+| 35 | PB14 | bidirectional | 5 V tolerant (FT) I/O PB14 with SPI2_MISO, USART3_RTS, LCD_SEG14 and TIM9_CH2 alternate functions, plus ADC_IN20 and COMP1_INP. |+| 36 | PB15 | bidirectional | 5 V tolerant (FT) I/O PB15 with SPI2_MOSI, LCD_SEG15 and TIM11_CH1 alternate functions, plus ADC_IN21, COMP1_INP and RTC_REFIN. |+| 37 | PC6 | bidirectional | 5 V tolerant (FT) I/O PC6 with TIM3_CH1 and LCD_SEG24 alternate functions. |+| 38 | PC7 | bidirectional | 5 V tolerant (FT) I/O PC7 with TIM3_CH2 and LCD_SEG25 alternate functions. |+| 39 | PC8 | bidirectional | 5 V tolerant (FT) I/O PC8 with TIM3_CH3 and LCD_SEG26 alternate functions. |+| 40 | PC9 | bidirectional | 5 V tolerant (FT) I/O PC9 with TIM3_CH4 and LCD_SEG27 alternate functions. |+| 41 | PA8 | bidirectional | 5 V tolerant (FT) I/O PA8 with USART1_CK, MCO and LCD_COM0 alternate functions. |+| 42 | PA9 | bidirectional | 5 V tolerant (FT) I/O PA9 with USART1_TX and LCD_COM1 alternate functions. |+| 43 | PA10 | bidirectional | 5 V tolerant (FT) I/O PA10 with USART1_RX and LCD_COM2 alternate functions. |+| 44 | PA11 | bidirectional | 5 V tolerant (FT) I/O PA11 with USART1_CTS and SPI1_MISO alternate functions, and USB_DM as additional function. |+| 45 | PA12 | bidirectional | 5 V tolerant (FT) I/O PA12 with USART1_RTS and SPI1_MOSI alternate functions, and USB_DP as additional function. |+| 46 | PA13 | bidirectional | 5 V tolerant (FT) I/O PA13 with JTMS-SWDIO debug function. |+| 47 | VSS_2 | power_in | Digital ground pin. |+| 48 | VDD_2 | power_in | Digital supply pin; for this ordering option the VDD range is 1.8 V to 3.6 V with BOR enabled. |+| 49 | PA14 | bidirectional | 5 V tolerant (FT) I/O PA14 with JTCK-SWCLK debug function. |+| 50 | PA15 | bidirectional | 5 V tolerant (FT) I/O PA15 with JTDI, TIM2_CH1_ETR, SPI1_NSS and LCD_SEG17 alternate functions. |+| 51 | PC10 | bidirectional | 5 V tolerant (FT) I/O PC10 with USART3_TX, LCD_SEG28, LCD_SEG40 and LCD_COM4 alternate functions as printed. |+| 52 | PC11 | bidirectional | 5 V tolerant (FT) I/O PC11 with USART3_RX, LCD_SEG29, LCD_SEG41 and LCD_COM5 alternate functions as printed. |+| 53 | PC12 | bidirectional | 5 V tolerant (FT) I/O PC12 with USART3_CK, LCD_SEG30, LCD_SEG42 and LCD_COM6 alternate functions as printed. |+| 54 | PD2 | bidirectional | 5 V tolerant (FT) I/O PD2 with TIM3_ETR, LCD_SEG31, LCD_SEG43 and LCD_COM7 alternate functions as printed. |+| 55 | PB3 | bidirectional | 5 V tolerant (FT) I/O PB3 with JTDO, TIM2_CH2, SPI1_SCK and LCD_SEG7 alternate functions, plus COMP2_INM. |+| 56 | PB4 | bidirectional | 5 V tolerant (FT) I/O PB4 with NJTRST, TIM3_CH1, SPI1_MISO and LCD_SEG8 alternate functions, plus COMP2_INP. |+| 57 | PB5 | bidirectional | 5 V tolerant (FT) I/O PB5 with I2C1_SMBA, TIM3_CH2, SPI1_MOSI and LCD_SEG9 alternate functions, plus COMP2_INP. |+| 58 | PB6 | bidirectional | 5 V tolerant (FT) I/O PB6 with I2C1_SCL, TIM4_CH1 and USART1_TX alternate functions. |+| 59 | PB7 | bidirectional | 5 V tolerant (FT) I/O PB7 with I2C1_SDA, TIM4_CH2 and USART1_RX alternate functions, and PVD_IN as additional function. |+| 60 | BOOT0 | input | Dedicated BOOT0 boot-mode selection pin (input only, dedicated structure). |+| 61 | PB8 | bidirectional | 5 V tolerant (FT) I/O PB8 with TIM4_CH3, I2C1_SCL, LCD_SEG16 and TIM10_CH1 alternate functions. |+| 62 | PB9 | bidirectional | 5 V tolerant (FT) I/O PB9 with TIM4_CH4, I2C1_SDA, LCD_COM3 and TIM11_CH1 alternate functions. |+| 63 | VSS_3 | power_in | Digital ground pin. |+| 64 | VDD_3 | power_in | Digital supply pin; for this ordering option the VDD range is 1.8 V to 3.6 V with BOR enabled. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-64(10x10) |+| Category | Embedded Processors & Controllers |+| Pins | 64 |++## CAD (KiCad official)++- Symbol: `STM32L151RBT6TR`+- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`+- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)+- 3D model files: `stm32l151rbt6tr-etched.step` / `stm32l151rbt6tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32l151rbt6tr.step` / `stm32l151rbt6tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588941195808813056) (133 pp, sha256 `5223296de36fe904`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32l151rbt6tr-datasheet.pdf)
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Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32l151rbt6tr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32l151rbt6tr.kicad_sym",+ "stm32l151rbt6tr.kicad_mod",+ "stm32l151rbt6tr.glb",+ "stm32l151rbt6tr.step",+ "stm32l151rbt6tr.lbr",+ "docs/hero.png",+ "docs/stm32l151rbt6tr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm32l151rbt6tr-hero.glb",+ "stm32l151rbt6tr-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM32L151RBT6TR",+ "manufacturer": "STMicroelectronics",+ "package": "LQFP-64(10x10)",+ "pin_count": 64,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588941195808813056",+ "parts": {+ "symbol": "stm32l151rbt6tr.kicad_sym",+ "footprint": "stm32l151rbt6tr.kicad_mod",+ "model_3d": "stm32l151rbt6tr-hero.glb",+ "model_3d_plain": "stm32l151rbt6tr.glb",+ "model_3d_step": "stm32l151rbt6tr-etched.step",+ "model_3d_step_plain": "stm32l151rbt6tr.step",+ "lbr": "stm32l151rbt6tr.lbr"+ },+ "distributor_links": {+ "lcsc": "C1518614",+ "digikey": "497-STM32L151RBT6TR-ND",+ "mouser": "511-STM32L151RBT6TR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T14:36:52Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-STM32L151RBT6TR-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32L151RBT6TR",+ "status": "found",+ "lifecycle": "Not Recommended for New Designs"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VLCD",+ "type": "power_in",+ "description": "LCD power supply pin; note 3 states that for STM32L151xx devices this pin should be connected to VDD."+ },+ {+ "number": "2",+ "name": "PC13-WKUP2",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) general-purpose I/O PC13, also RTC_TAMP1, RTC_TS, RTC_OUT and WKUP2 wakeup function."+ },+ {+ "number": "3",+ "name": "PC14-OSC32_IN",+ "type": "bidirectional",+ "description": "Standard 3.3 V (TC) I/O PC14, used as OSC32_IN only when the LSE oscillator is on (LSEON in RCC_CSR), otherwise usable as GPIO with LSE having priority."+ },+ {+ "number": "4",+ "name": "PC15-OSC32_OUT",+ "type": "bidirectional",+ "description": "Standard 3.3 V (TC) I/O PC15, used as OSC32_OUT only when the LSE oscillator is on (LSEON in RCC_CSR), otherwise usable as GPIO with LSE having priority."+ },+ {+ "number": "5",+ "name": "PH0-OSC_IN",+ "type": "bidirectional",+ "description": "Standard 3.3 V (TC) I/O PH0, used as OSC_IN only when the HSE oscillator is on (HSEON in RCC_CR), otherwise usable as GPIO with HSE having priority."+ },+ {+ "number": "6",+ "name": "PH1-OSC_OUT",+ "type": "bidirectional",+ "description": "Standard 3.3 V (TC) I/O PH1, used as OSC_OUT only when the HSE oscillator is on (HSEON in RCC_CR), otherwise usable as GPIO with HSE having priority."+ },+ {+ "number": "7",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Bidirectional reset pin with embedded weak pull-up resistor."+ },+ {+ "number": "8",+ "name": "PC0",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PC0 with analog inputs ADC_IN10 and COMP1_INP and alternate function LCD_SEG18 as printed."+ },+ {+ "number": "9",+ "name": "PC1",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PC1 with analog inputs ADC_IN11 and COMP1_INP and alternate function LCD_SEG19 as printed."+ },+ {+ "number": "10",+ "name": "PC2",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PC2 with analog inputs ADC_IN12 and COMP1_INP and alternate function LCD_SEG20 as printed."+ },+ {+ "number": "11",+ "name": "PC3",+ "type": "bidirectional",+ "description": "Standard 3.3 V (TC) I/O PC3 with analog inputs ADC_IN13 and COMP1_INP and alternate function LCD_SEG21 as printed."+ },+ {+ "number": "12",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground pin; VSSA must be tied to ground."+ },+ {+ "number": "13",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog supply pin; ADC characteristics specify VDDA from 1.8 V to 3.6 V."+ },+ {+ "number": "14",+ "name": "PA0-WKUP1",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PA0 with USART2_CTS and TIM2_CH1_ETR alternate functions, plus WKUP1, ADC_IN0 and COMP1_INP."+ },+ {+ "number": "15",+ "name": "PA1",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PA1 with USART2_RTS, TIM2_CH2 and LCD_SEG0 alternate functions, plus ADC_IN1 and COMP1_INP."+ },+ {+ "number": "16",+ "name": "PA2",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PA2 with USART2_TX, TIM2_CH3, TIM9_CH1 and LCD_SEG1 alternate functions, plus ADC_IN2 and COMP1_INP."+ },+ {+ "number": "17",+ "name": "PA3",+ "type": "bidirectional",+ "description": "Standard 3.3 V (TC) I/O PA3 with USART2_RX, TIM2_CH4, TIM9_CH2 and LCD_SEG2 alternate functions, plus ADC_IN3 and COMP1_INP."+ },+ {+ "number": "18",+ "name": "VSS_4",+ "type": "power_in",+ "description": "Digital ground pin."+ },+ {+ "number": "19",+ "name": "VDD_4",+ "type": "power_in",+ "description": "Digital supply pin; for this ordering option (no T option character) the VDD range is 1.8 V to 3.6 V with BOR enabled."+ },+ {+ "number": "20",+ "name": "PA4",+ "type": "bidirectional",+ "description": "Standard 3.3 V (TC) I/O PA4 with SPI1_NSS and USART2_CK alternate functions, plus ADC_IN4, DAC_OUT1 and COMP1_INP."+ },+ {+ "number": "21",+ "name": "PA5",+ "type": "bidirectional",+ "description": "Standard 3.3 V (TC) I/O PA5 with SPI1_SCK and TIM2_CH1_ETR alternate functions, plus ADC_IN5, DAC_OUT2 and COMP1_INP."+ },+ {+ "number": "22",+ "name": "PA6",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PA6 with SPI1_MISO, TIM3_CH1, LCD_SEG3 and TIM10_CH1 alternate functions, plus ADC_IN6 and COMP1_INP."+ },+ {+ "number": "23",+ "name": "PA7",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PA7 with SPI1_MOSI, TIM3_CH2, LCD_SEG4 and TIM11_CH1 alternate functions, plus ADC_IN7 and COMP1_INP."+ },+ {+ "number": "24",+ "name": "PC4",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PC4 with alternate function LCD_SEG22 as printed, plus ADC_IN14 and COMP1_INP."+ },+ {+ "number": "25",+ "name": "PC5",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PC5 with alternate function LCD_SEG23 as printed, plus ADC_IN15 and COMP1_INP."+ },+ {+ "number": "26",+ "name": "PB0",+ "type": "bidirectional",+ "description": "Standard 3.3 V (TC) I/O PB0 with TIM3_CH3 and LCD_SEG5 alternate functions, plus ADC_IN8, COMP1_INP and VREF_OUT."+ },+ {+ "number": "27",+ "name": "PB1",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PB1 with TIM3_CH4 and LCD_SEG6 alternate functions, plus ADC_IN9, COMP1_INP and VREF_OUT."+ },+ {+ "number": "28",+ "name": "PB2/BOOT1",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PB2 that is also the BOOT1 boot-mode pin."+ },+ {+ "number": "29",+ "name": "PB10",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PB10 with I2C2_SCL, USART3_TX, TIM2_CH3 and LCD_SEG10 alternate functions."+ },+ {+ "number": "30",+ "name": "PB11",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PB11 with I2C2_SDA, USART3_RX, TIM2_CH4 and LCD_SEG11 alternate functions."+ },+ {+ "number": "31",+ "name": "VSS_1",+ "type": "power_in",+ "description": "Digital ground pin."+ },+ {+ "number": "32",+ "name": "VDD_1",+ "type": "power_in",+ "description": "Digital supply pin; for this ordering option the VDD range is 1.8 V to 3.6 V with BOR enabled."+ },+ {+ "number": "33",+ "name": "PB12",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PB12 with SPI2_NSS, I2C2_SMBA, USART3_CK, LCD_SEG12 and TIM10_CH1 alternate functions, plus ADC_IN18 and COMP1_INP."+ },+ {+ "number": "34",+ "name": "PB13",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PB13 with SPI2_SCK, USART3_CTS, LCD_SEG13 and TIM9_CH1 alternate functions, plus ADC_IN19 and COMP1_INP."+ },+ {+ "number": "35",+ "name": "PB14",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PB14 with SPI2_MISO, USART3_RTS, LCD_SEG14 and TIM9_CH2 alternate functions, plus ADC_IN20 and COMP1_INP."+ },+ {+ "number": "36",+ "name": "PB15",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PB15 with SPI2_MOSI, LCD_SEG15 and TIM11_CH1 alternate functions, plus ADC_IN21, COMP1_INP and RTC_REFIN."+ },+ {+ "number": "37",+ "name": "PC6",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PC6 with TIM3_CH1 and LCD_SEG24 alternate functions."+ },+ {+ "number": "38",+ "name": "PC7",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PC7 with TIM3_CH2 and LCD_SEG25 alternate functions."+ },+ {+ "number": "39",+ "name": "PC8",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PC8 with TIM3_CH3 and LCD_SEG26 alternate functions."+ },+ {+ "number": "40",+ "name": "PC9",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PC9 with TIM3_CH4 and LCD_SEG27 alternate functions."+ },+ {+ "number": "41",+ "name": "PA8",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PA8 with USART1_CK, MCO and LCD_COM0 alternate functions."+ },+ {+ "number": "42",+ "name": "PA9",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PA9 with USART1_TX and LCD_COM1 alternate functions."+ },+ {+ "number": "43",+ "name": "PA10",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PA10 with USART1_RX and LCD_COM2 alternate functions."+ },+ {+ "number": "44",+ "name": "PA11",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PA11 with USART1_CTS and SPI1_MISO alternate functions, and USB_DM as additional function."+ },+ {+ "number": "45",+ "name": "PA12",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PA12 with USART1_RTS and SPI1_MOSI alternate functions, and USB_DP as additional function."+ },+ {+ "number": "46",+ "name": "PA13",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PA13 with JTMS-SWDIO debug function."+ },+ {+ "number": "47",+ "name": "VSS_2",+ "type": "power_in",+ "description": "Digital ground pin."+ },+ {+ "number": "48",+ "name": "VDD_2",+ "type": "power_in",+ "description": "Digital supply pin; for this ordering option the VDD range is 1.8 V to 3.6 V with BOR enabled."+ },+ {+ "number": "49",+ "name": "PA14",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PA14 with JTCK-SWCLK debug function."+ },+ {+ "number": "50",+ "name": "PA15",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PA15 with JTDI, TIM2_CH1_ETR, SPI1_NSS and LCD_SEG17 alternate functions."+ },+ {+ "number": "51",+ "name": "PC10",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PC10 with USART3_TX, LCD_SEG28, LCD_SEG40 and LCD_COM4 alternate functions as printed."+ },+ {+ "number": "52",+ "name": "PC11",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PC11 with USART3_RX, LCD_SEG29, LCD_SEG41 and LCD_COM5 alternate functions as printed."+ },+ {+ "number": "53",+ "name": "PC12",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PC12 with USART3_CK, LCD_SEG30, LCD_SEG42 and LCD_COM6 alternate functions as printed."+ },+ {+ "number": "54",+ "name": "PD2",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PD2 with TIM3_ETR, LCD_SEG31, LCD_SEG43 and LCD_COM7 alternate functions as printed."+ },+ {+ "number": "55",+ "name": "PB3",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PB3 with JTDO, TIM2_CH2, SPI1_SCK and LCD_SEG7 alternate functions, plus COMP2_INM."+ },+ {+ "number": "56",+ "name": "PB4",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PB4 with NJTRST, TIM3_CH1, SPI1_MISO and LCD_SEG8 alternate functions, plus COMP2_INP."+ },+ {+ "number": "57",+ "name": "PB5",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PB5 with I2C1_SMBA, TIM3_CH2, SPI1_MOSI and LCD_SEG9 alternate functions, plus COMP2_INP."+ },+ {+ "number": "58",+ "name": "PB6",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PB6 with I2C1_SCL, TIM4_CH1 and USART1_TX alternate functions."+ },+ {+ "number": "59",+ "name": "PB7",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PB7 with I2C1_SDA, TIM4_CH2 and USART1_RX alternate functions, and PVD_IN as additional function."+ },+ {+ "number": "60",+ "name": "BOOT0",+ "type": "input",+ "description": "Dedicated BOOT0 boot-mode selection pin (input only, dedicated structure)."+ },+ {+ "number": "61",+ "name": "PB8",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PB8 with TIM4_CH3, I2C1_SCL, LCD_SEG16 and TIM10_CH1 alternate functions."+ },+ {+ "number": "62",+ "name": "PB9",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O PB9 with TIM4_CH4, I2C1_SDA, LCD_COM3 and TIM11_CH1 alternate functions."+ },+ {+ "number": "63",+ "name": "VSS_3",+ "type": "power_in",+ "description": "Digital ground pin."+ },+ {+ "number": "64",+ "name": "VDD_3",+ "type": "power_in",+ "description": "Digital supply pin; for this ordering option the VDD range is 1.8 V to 3.6 V with BOR enabled."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: LQFP64 pin list taken from the LQFP64 column of Table 8 (pin definitions). The MPN STM32L151RBT6TR m; Pin 1 (VLCD): footnote 3 applies to STM32L152xx only and says that on STM32L151xx devices this pin s; LCD functions (LCD_SEG*, LCD_COM*) are listed as printed in Table 8 and Table 9, but the datasheet s"+ ],+ "pages_sent": 62,+ "cost_usd": 0.3007,+ "at": "2026-10-08T14:36:19"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588941195808813056",+ "pages": 133,+ "sha256": "5223296de36fe904",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 64,+ "described": 64,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm32l151rbt6tr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b0c827bc5c05552175d28affe44a5bd2ab45c9c36efff6ff07a74cc449b13db4",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm32l151rbt6tr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "6f0cb98f08e20e7ccd1658c3c106ab5ffe8e10ac1d6bed4eb191e2ad9392af7b",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}