component
STM32H743IIK6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFBGA-201. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
← Commit history
Publish 0.1.1
5 files changed
+701−686
README.md+81−80@@ -16,13 +16,7 @@ STM32H743IIK6 from STMicroelectronics, in a UFBGA-201. Pinout and pin descriptio | A6 | PB5 | bidirectional | PB5 I/O port pin with 5V-tolerant structure; alternate functions: TIM17_BKIN, TIM3_CH2, HRTIM_EEV7, I2C1_SMBA, SPI1_MOSI/I2S1_SDO, I2C4_SMBA, SPI3_MOSI/I2S3_SDO, SPI6_MOSI, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1, DCMI_D10, UART5_RX, EVENTOUT | | A7 | PG14 | bidirectional | PG14 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TRACED1, LPTIM1_ETR, SPI6_MOSI, USART6_TX, QUADSPI_BK2_IO3, ETH_MII_TXD1/ETH_RMII_TXD1, FMC_A25, LCD_B0, EVENTOUT | | A8 | PG13 | bidirectional | PG13 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TRACED0, LPTIM1_OUT, HRTIM_EEV10, SPI6_SCK, USART6_CTS_NSS, ETH_MII_TXD0/ETH_RMII_TXD0, FMC_A24, LCD_R0, EVENTOUT |-| A9 | PB4 | bidirectional | PB4 NJTRST I/O port pin with 5V-tolerant structure; alternate functions: NJTRST, TIM16_BKIN, TIM3_CH1, HRTIM_EEV6, SPI1_MISO/I2S1_SDI, SPI3_MISO/I2S3_SDI, SPI2_NSS/I2S2_WS, SPI6_MISO, SDMMC2_D3, UART7_TX, EVENTOUT |-| A10 | PB3 | bidirectional | PB3 JTDO/TRACESWO I/O port pin with 5V-tolerant structure; alternate functions: JTDO/TRACESWO, TIM2_CH2, HRTIM_FLT4, SPI1_SCK/I2S1_CK, SPI3_SCK/I2S3_CK, SPI6_SCK, SDMMC2_D2, UART7_RX, EVENTOUT |-| A11 | PD7 | bidirectional | PD7 I/O port pin with 5V-tolerant high-speed structure; alternate functions: DFSDM_DATIN4, SPI1_MOSI/I2S1_SDO, DFSDM_CKIN1, USART2_CK, SPDIFRX_IN0, SDMMC2_CMD, FMC_NE1, EVENTOUT |-| A12 | PC12 | bidirectional | PC12 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TRACED3, HRTIM_EEV2, SPI3_MOSI/I2S3_SDO, USART3_CK, UART5_TX, SDMMC1_CK, DCMI_D9, EVENTOUT |-| A13 | PA15 | bidirectional | PA15 JTDI I/O port pin with 5V-tolerant structure; alternate functions: JTDI, TIM2_CH1/TIM2_ETR, HRTIM_FLT1, HDMI_CEC, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, SPI6_NSS, UART4_RTS, UART7_TX, EVENTOUT |-| A14 | PA14 | bidirectional | PA14 JTCK-SWCLK I/O port pin with 5V-tolerant structure; alternate functions: JTCK-SWCLK, EVENTOUT; used for JTAG/SWD debug interface |-| A15 | PA13 | bidirectional | PA13 JTMS-SWDIO I/O port pin with 5V-tolerant structure; alternate functions: JTMS-SWDIO, EVENTOUT; used for JTAG/SWD debug interface |+| A9 | PB4 (NJTRST) | bidirectional | PB4 NJTRST I/O port pin with 5V-tolerant structure; alternate functions: NJTRST, TIM16_BKIN, TIM3_CH1, HRTIM_EEV6, SPI1_MISO/I2S1_SDI, SPI3_MISO/I2S3_SDI, SPI2_NSS/I2S2_WS, SPI6_MISO, SDMMC2_D3, UART7_TX, EVENTOUT | | B1 | PE4 | bidirectional | PE4 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TRACED1, SAI1_D2, DFSDM_DATIN3, TIM15_CH1N, SPI4_NSS, SAI1_FS_A, SAI4_FS_A, SAI4_D2, FMC_A20, DCMI_D4, LCD_B0, EVENTOUT | | B2 | PE5 | bidirectional | PE5 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TRACED2, SAI1_CK2, DFSDM_CKIN3, TIM15_CH1, SPI4_MISO, SAI1_SCK_A, SAI4_SCK_A, SAI4_CK2, FMC_A21, DCMI_D6, LCD_G0, EVENTOUT | | B3 | PE6 | bidirectional | PE6 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TRACED3, TIM1_BKIN2, SAI1_D1, TIM15_CH2, SPI4_MOSI, SAI1_SD_A, SAI4_SD_A, SAI4_D1, SAI2_MCK_B, TIM1_BKIN2_COMP12, FMC_A22, DCMI_D7, LCD_G1, EVENTOUT |@@ -32,12 +26,6 @@ STM32H743IIK6 from STMicroelectronics, in a UFBGA-201. Pinout and pin descriptio | B7 | PG15 | bidirectional | PG15 I/O port pin with 5V-tolerant high-speed structure; alternate functions: USART6_CTS_NSS, FMC_SDNCAS, DCMI_D13, EVENTOUT | | B8 | PG12 | bidirectional | PG12 I/O port pin with 5V-tolerant high-speed structure; alternate functions: LPTIM1_IN1, HRTIM_EEV5, SPI6_MISO, USART6_RTS, SPDIFRX_IN1, LCD_B4, ETH_MII_TXD1/ETH_RMII_TXD1, FMC_NE4, LCD_B1, EVENTOUT | | B9 | PG11 | bidirectional | PG11 I/O port pin with 5V-tolerant high-speed structure; alternate functions: HRTIM_EEV4, SPI1_SCK/I2S1_CK, SPDIFRX_IN0, SDMMC2_D2, ETH_MII_TX_EN/ETH_RMII_TX_EN, DCMI_D3, LCD_B3, EVENTOUT |-| B10 | PG10 | bidirectional | PG10 I/O port pin with 5V-tolerant high-speed structure; alternate functions: HRTIM_FLT5, SPI1_NSS/I2S1_WS, LCD_G3, SAI2_SD_B, FMC_NE3, DCMI_D2, LCD_B2, EVENTOUT |-| B11 | PD6 | bidirectional | PD6 I/O port pin with 5V-tolerant high-speed structure; alternate functions: SAI1_D1, DFSDM_CKIN4, DFSDM_DATIN1, SPI3_MOSI/I2S3_SDO, SAI1_SD_A, USART2_RX, SAI4_SD_A, CAN2_RXFD, SAI4_D1, SDMMC2_CK, FMC_NWAIT, DCMI_D10, LCD_B2, EVENTOUT |-| B12 | PD0 | bidirectional | PD0 I/O port pin with 5V-tolerant high-speed structure; alternate functions: DFSDM_CKIN6, SAI3_SCK_A, UART4_RX, CAN1_RX, FMC_D2/FMC_DA2, EVENTOUT |-| B13 | PC11 | bidirectional | PC11 I/O port pin with 5V-tolerant high-speed structure; alternate functions: HRTIM_FLT2, DFSDM_DATIN5, SPI3_MISO/I2S3_SDI, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDMMC1_D3, DCMI_D4, EVENTOUT |-| B14 | PC10 | bidirectional | PC10 I/O port pin with 5V-tolerant high-speed structure; alternate functions: HRTIM_EEV1, DFSDM_CKIN5, SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDMMC1_D2, DCMI_D8, LCD_R2, EVENTOUT |-| B15 | PA12 | bidirectional | PA12 I/O port pin with 5V-tolerant USB structure; alternate functions: TIM1_ETR, HRTIM_CHD2, LPUART1_RTS, SPI2_SCK/I2S2_CK, UART4_TX, USART1_RTS, SAI2_FS_B, CAN1_TX, OTG_FS_DP, LCD_R5, EVENTOUT | | C1 | VBAT | power_in | Battery backup supply voltage pin; 1.2 to 3.6 V for backup domain power | | C2 | PI7 | bidirectional | PI7 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_CH3, SAI2_FS_A, FMC_D29, DCMI_D7, LCD_B7, EVENTOUT | | C3 | PI6 | bidirectional | PI6 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_CH2, SAI2_SD_A, FMC_D28, DCMI_D6, LCD_B6, EVENTOUT |@@ -47,12 +35,6 @@ STM32H743IIK6 from STMicroelectronics, in a UFBGA-201. Pinout and pin descriptio | C7 | VDD | power_in | Main 3.3 V supply voltage pin; must be decoupled with 100 nF capacitor close to pin | | C8 | VDD | power_in | Main 3.3 V supply voltage pin; must be decoupled with 100 nF capacitor close to pin | | C9 | VDD | power_in | Main 3.3 V supply voltage pin; must be decoupled with 100 nF capacitor close to pin |-| C10 | PG9 | bidirectional | PG9 I/O port pin with 5V-tolerant high-speed structure; alternate functions: SPI1_MISO/I2S1_SDI, USART6_RX, SPDIFRX_IN3, QUADSPI_BK2_IO2, SAI2_FS_B, FMC_NE2/FMC_NCE, DCMI_VSYNC, EVENTOUT |-| C11 | PD5 | bidirectional | PD5 I/O port pin with 5V-tolerant high-speed structure; alternate functions: HRTIM_EEV3, USART2_TX, CAN1_TXFD, FMC_NWE, EVENTOUT |-| C12 | PD1 | bidirectional | PD1 I/O port pin with 5V-tolerant high-speed structure; alternate functions: DFSDM_DATIN6, SAI3_SD_A, UART4_TX, CAN1_TX, FMC_D3/FMC_DA3, EVENTOUT |-| C13 | PI3 | bidirectional | PI3 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_ETR, SPI2_MOSI/I2S2_SDO, FMC_D27, DCMI_D10, EVENTOUT |-| C14 | PI2 | bidirectional | PI2 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_CH4, SPI2_MISO/I2S2_SDI, FMC_D26, DCMI_D9, LCD_G7, EVENTOUT |-| C15 | PA11 | bidirectional | PA11 I/O port pin with 5V-tolerant USB structure; alternate functions: TIM1_CH4, HRTIM_CHD1, LPUART1_CTS, SPI2_NSS/I2S2_WS, UART4_RX, USART1_CTS_NSS, CAN1_RX, OTG_FS_DM, LCD_R4, EVENTOUT | | D1 | PC13 | bidirectional | PC13 I/O port pin with 5V-tolerant structure; alternate functions: EVENTOUT; RTC tamper or wakeup input RTC_TAMP_1/RTC_TS/WKUP2 | | D2 | PI8 | bidirectional | PI8 I/O port pin with 5V-tolerant structure; alternate functions: EVENTOUT; RTC tamper or wakeup input RTC_TAMP_2/RTC_TS/WKUP3 | | D3 | PI9 | bidirectional | PI9 I/O port pin with 5V-tolerant high-speed structure; alternate functions: UART4_RX, CAN1_RX, FMC_D30, LCD_VSYNC, EVENTOUT |@@ -62,92 +44,54 @@ STM32H743IIK6 from STMicroelectronics, in a UFBGA-201. Pinout and pin descriptio | D7 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | D8 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | D9 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |-| D10 | PD4 | bidirectional | PD4 I/O port pin with 5V-tolerant high-speed structure; alternate functions: HRTIM_FLT3, SAI3_FS_A, USART2_RTS, CAN1_RXFD, FMC_NOE, EVENTOUT |-| D11 | PD3 | bidirectional | PD3 I/O port pin with 5V-tolerant high-speed structure; alternate functions: DFSDM_CKOUT, SPI2_SCK/I2S2_CK, USART2_CTS_NSS, FMC_CLK, DCMI_D5, LCD_G7, EVENTOUT |-| D12 | PD2 | bidirectional | PD2 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TRACED2, TIM3_ETR, UART5_RX, SDMMC1_CMD, DCMI_D11, EVENTOUT |-| D13 | PH15 | bidirectional | PH15 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_CH3N, CAN1_TXFD, FMC_D23, DCMI_D11, LCD_G4, EVENTOUT |-| D14 | PI1 | bidirectional | PI1 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_BKIN2, SPI2_SCK/I2S2_CK, TIM8_BKIN2_COMP12, FMC_D25, DCMI_D8, LCD_G6, EVENTOUT |-| D15 | PA10 | bidirectional | PA10 I/O port pin with 5V-tolerant USB structure; alternate functions: TIM1_CH3, HRTIM_CHC2, LPUART1_RX, USART1_RX, CAN1_TXFD, OTG_FS_ID, MDIOS_MDIO, LCD_B4, DCMI_D1, LCD_B1, EVENTOUT |-| E1 | PC14-OSC32_IN | bidirectional | PC14 I/O port pin with 5V-tolerant structure for 32 kHz oscillator input; alternate functions: EVENTOUT; OSC32_IN for low-speed external clock |+| E1 | PC14-OSC32_IN (OSC32_IN) | bidirectional | PC14 I/O port pin with 5V-tolerant structure for 32 kHz oscillator input; alternate functions: EVENTOUT; OSC32_IN for low-speed external clock | | E2 | PF0 | bidirectional | PF0 I/O port pin with 5V-tolerant I2C FM+ structure; alternate functions: I2C2_SDA, FMC_A0, EVENTOUT; analog: ADC3_INP5 | | E3 | PI10 | bidirectional | PI10 I/O port pin with 5V-tolerant high-speed structure; alternate functions: CAN1_RXFD, ETH_MII_RX_ER, FMC_D31, LCD_HSYNC, EVENTOUT | | E4 | PI11 | bidirectional | PI11 I/O port pin with 5V-tolerant structure; alternate functions: LCD_G6, OTG_HS_ULPI_DIR, EVENTOUT; wakeup: WKUP4 |-| E5 | PH13 | bidirectional | PH13 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_CH1N, UART4_TX, CAN1_TX, FMC_D21, LCD_G2, EVENTOUT |-| E6 | PH14 | bidirectional | PH14 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_CH2N, UART4_RX, CAN1_RX, FMC_D22, DCMI_D4, LCD_G3, EVENTOUT |-| E7 | PI0 | bidirectional | PI0 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM5_CH4, SPI2_NSS/I2S2_WS, CAN1_RXFD, FMC_D24, DCMI_D13, LCD_G5, EVENTOUT |-| E8 | PA9 | bidirectional | PA9 I/O port pin with 5V-tolerant USB structure; alternate functions: TIM1_CH2, HRTIM_CHC1, LPUART1_TX, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX, CAN1_RXFD, ETH_TX_ER, DCMI_D0, LCD_R5, EVENTOUT; OTG_FS_VBUS |-| F1 | PC15-OSC32_OUT | bidirectional | PC15 I/O port pin with 5V-tolerant structure for 32 kHz oscillator output; alternate functions: EVENTOUT; OSC32_OUT for low-speed external clock |+| F1 | PC15-OSC32_OUT (OSC32_OUT) | bidirectional | PC15 I/O port pin with 5V-tolerant structure for 32 kHz oscillator output; alternate functions: EVENTOUT; OSC32_OUT for low-speed external clock | | F2 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | F3 | VDD | power_in | Main 3.3 V supply voltage pin; must be decoupled with 100 nF capacitor close to pin | | F4 | PH2 | bidirectional | PH2 I/O port pin with 5V-tolerant high-speed structure; alternate functions: LPTIM1_IN2, QUADSPI_BK2_IO0, SAI2_SCK_B, ETH_MII_CRS, FMC_SDCKE0, LCD_R0, EVENTOUT; analog: ADC3_INP13 |-| F5 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | F6 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | F7 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | F8 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | F9 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |-| F10 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |-| F11 | VCAP2 | passive | Regulator stabilization capacitor pin; connect 2.2 μF external capacitor with <100 mΩ ESR |-| F12 | PC9 | bidirectional | PC9 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, UART5_CTS, QUADSPI_BK1_IO0, LCD_G3, SWPMI_SUSPEND, SDMMC1_D1, DCMI_D3, LCD_B2, EVENTOUT |-| F13 | PA8 | bidirectional | PA8 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: MCO1, TIM1_CH1, HRTIM_CHB2, TIM8_BKIN2, I2C3_SCL, USART1_CK, OTG_FS_SOF, UART7_RX, TIM8_BKIN2_COMP12, LCD_B3, LCD_R6, EVENTOUT |-| G1 | PH0-OSC_IN | bidirectional | PH0 I/O port pin with 5V-tolerant structure for high-speed oscillator input; alternate functions: EVENTOUT; OSC_IN for external clock |+| G1 | PH0-OSC_IN (PH0) | bidirectional | PH0 I/O port pin with 5V-tolerant structure for high-speed oscillator input; alternate functions: EVENTOUT; OSC_IN for external clock | | G2 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | G3 | VDD | power_in | Main 3.3 V supply voltage pin; must be decoupled with 100 nF capacitor close to pin | | G4 | PH3 | bidirectional | PH3 I/O port pin with 5V-tolerant high-speed structure; alternate functions: QUADSPI_BK2_IO1, SAI2_MCK_B, ETH_MII_COL, FMC_SDNE0, LCD_R1, EVENTOUT; analog: ADC3_INN13, ADC3_INP14 |-| G5 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | G6 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | G7 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | G8 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | G9 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |-| G10 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |-| G11 | VDD | power_in | Main 3.3 V supply voltage pin; must be decoupled with 100 nF capacitor close to pin |-| G12 | PC8 | bidirectional | PC8 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TRACED1, HRTIM_CHB1, TIM3_CH3, TIM8_CH3, USART6_CK, UART5_RTS, FMC_NE2/FMC_NCE, SWPMI_RX, SDMMC1_D0, DCMI_D2, EVENTOUT |-| G13 | PC7 | bidirectional | PC7 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TRGIO, HRTIM_CHA2, TIM3_CH2, TIM8_CH2, DFSDM_DATIN3, I2S3_MCK, USART6_RX, SDMMC1_D123DIR, FMC_NE1, SDMMC2_D7, SWPMI_TX, SDMMC1_D7, DCMI_D1, LCD_G6, EVENTOUT |-| H1 | PH1-OSC_OUT | bidirectional | PH1 I/O port pin with 5V-tolerant structure for high-speed oscillator output; alternate functions: EVENTOUT; OSC_OUT for external clock |+| H1 | PH1-OSC_OUT (PH1) | bidirectional | PH1 I/O port pin with 5V-tolerant structure for high-speed oscillator output; alternate functions: EVENTOUT; OSC_OUT for external clock | | H2 | PF2 | bidirectional | PF2 I/O port pin with 5V-tolerant structure; alternate functions: I2C2_SMBA, FMC_A2, EVENTOUT | | H3 | PF1 | bidirectional | PF1 I/O port pin with 5V-tolerant I2C FM+ structure; alternate functions: I2C2_SCL, FMC_A1, EVENTOUT | | H4 | PH4 | bidirectional | PH4 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: I2C2_SCL, LCD_G5, OTG_HS_ULPI_NXT, LCD_G4, EVENTOUT; analog: ADC3_INN14, ADC3_INP15 |-| H5 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | H6 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | H7 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | H8 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | H9 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |-| H10 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |-| H11 | VDD33USB | power_in | USB power domain 3.3 V supply pin with internal regulator; voltage range 3.0-3.6 V when USB used |-| H12 | PG8 | bidirectional | PG8 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_ETR, SPI6_NSS, USART6_RTS, SPDIFRX_IN2, ETH_PPS_OUT, FMC_SDCLK, LCD_G7, EVENTOUT |-| H13 | PC6 | bidirectional | PC6 I/O port pin with 5V-tolerant high-speed structure; alternate functions: HRTIM_CHA1, TIM3_CH1, TIM8_CH1, DFSDM_CKIN3, I2S2_MCK, USART6_TX, SDMMC1_D0DIR, FMC_NWAIT, SDMMC2_D6, SDMMC1_D6, DCMI_D0, LCD_HSYNC, EVENTOUT; additional: SWPMI_IO | | J1 | NRST | input | External reset input pin with embedded weak pull-up resistor; active-low reset for device; RST bidirectional type in KiCad | | J2 | PF3 | bidirectional | PF3 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: FMC_A3, EVENTOUT; analog: ADC3_INP5 | | J3 | PF4 | bidirectional | PF4 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: FMC_A4, EVENTOUT; analog: ADC3_INN5, ADC3_INP9 | | J4 | PH5 | bidirectional | PH5 I/O port pin with 5V-tolerant I2C FM+ structure; alternate functions: I2C2_SDA, SPI5_NSS, FMC_SDNWE, EVENTOUT; analog: ADC3_INN15, ADC3_INP16 |-| J5 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | J6 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | J7 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | J8 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | J9 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |-| J10 | VDD | power_in | Main 3.3 V supply voltage pin; must be decoupled with 100 nF capacitor close to pin |-| J11 | VDD | power_in | Main 3.3 V supply voltage pin; must be decoupled with 100 nF capacitor close to pin |-| J12 | PG7 | bidirectional | PG7 I/O port pin with 5V-tolerant high-speed structure; alternate functions: HRTIM_CHE2, SAI1_MCLK_A, USART6_CK, FMC_INT, DCMI_D13, LCD_CLK, EVENTOUT |-| J13 | PG6 | bidirectional | PG6 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM17_BKIN, HRTIM_CHE1, QUADSPI_BK1_NCS, FMC_NE3, DCMI_D12, LCD_R7, EVENTOUT | | K1 | PF7 | bidirectional | PF7 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: TIM17_CH1, SPI5_SCK, SAI1_MCLK_B, UART7_TX, SAI4_MCLK_B, QUADSPI_BK1_IO2, EVENTOUT; analog: ADC3_INP3 | | K2 | PF6 | bidirectional | PF6 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: TIM16_CH1, SPI5_NSS, SAI1_SD_B, UART7_RX, SAI4_SD_B, QUADSPI_BK1_IO3, EVENTOUT; analog: ADC3_INN4, ADC3_INP8 | | K3 | PF5 | bidirectional | PF5 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: FMC_A5, EVENTOUT; analog: ADC3_INP4 | | K4 | VDD | power_in | Main 3.3 V supply voltage pin; must be decoupled with 100 nF capacitor close to pin |-| K5 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | K6 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | K7 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | K8 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | K9 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |-| K10 | PH12 | bidirectional | PH12 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: TIM5_CH3, I2C4_SDA, FMC_D20, DCMI_D3, LCD_R6, EVENTOUT |-| K11 | PG5 | bidirectional | PG5 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM1_ETR, FMC_A15/FMC_BA1, EVENTOUT |-| K12 | PG4 | bidirectional | PG4 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM1_BKIN2, TIM1_BKIN2_COMP12, FMC_A14/FMC_BA0, EVENTOUT |-| K13 | PG3 | bidirectional | PG3 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_BKIN2, TIM8_BKIN2_COMP12, FMC_A13, EVENTOUT | | L1 | PF10 | bidirectional | PF10 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: TIM16_BKIN, SAI1_D3, QUADSPI_CLK, SAI4_D3, DCMI_D11, LCD_DE, EVENTOUT; analog: ADC3_INN2, ADC3_INP6 | | L2 | PF9 | bidirectional | PF9 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: TIM17_CH1N, SPI5_MOSI, SAI1_FS_B, UART7_CTS, SAI4_FS_B, TIM14_CH1, QUADSPI_BK1_IO1, EVENTOUT; analog: ADC3_INP2 | | L3 | PF8 | bidirectional | PF8 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: TIM16_CH1N, SPI5_MISO, SAI1_SCK_B, UART7_RTS, SAI4_SCK_B, TIM13_CH1, QUADSPI_BK1_IO0, EVENTOUT; analog: ADC3_INN3, ADC3_INP7 |-| L4 | PH11 | bidirectional | PH11 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: TIM5_CH2, I2C4_SCL, FMC_D19, DCMI_D2, LCD_R5, EVENTOUT |-| L5 | PH10 | bidirectional | PH10 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM5_CH1, I2C4_SMBA, FMC_D18, DCMI_D1, LCD_R4, EVENTOUT |-| L6 | PD15 | bidirectional | PD15 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM4_CH4, SAI3_MCLK_A, UART8_RTS, FMC_D1/FMC_DA1, EVENTOUT |-| L7 | PG2 | bidirectional | PG2 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_BKIN, TIM8_BKIN_COMP12, FMC_A12, EVENTOUT |+| L4 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | M1 | VSSA | power_in | Analog ground return pin; must have low impedance connection to analog ground plane, separate from digital ground if possible | | M2 | PC0 | bidirectional | PC0 I/O port pin with 5V-tolerant analog structure; alternate functions: DFSDM_CKIN0, DFSDM_DATIN4, SAI2_FS_B, OTG_HS_ULPI_STP, FMC_SDNWE, LCD_R5, EVENTOUT; analog: ADC123_INP10 | | M3 | PC1 | bidirectional | PC1 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: TRACED0, SAI1_D1, DFSDM_DATIN0, DFSDM_CKIN4, SPI2_MOSI/I2S2_SDO, SAI1_SD_A, SAI4_SD_A, SDMMC2_CK, SAI4_D1, ETH_MDC, MDIOS_MDC, EVENTOUT; analog: ADC123_INN10, ADC123_INP11, RTC_TAMP_3/WKUP5 |@@ -157,12 +101,6 @@ STM32H743IIK6 from STMicroelectronics, in a UFBGA-201. Pinout and pin descriptio | M7 | PG1 | bidirectional | PG1 I/O port pin with 5V-tolerant high-speed structure; alternate functions: FMC_A11, EVENTOUT; additional: OPAMP2_VINM | | M8 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane | | M9 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |-| M10 | VCAP1 | passive | Regulator stabilization capacitor pin; connect 2.2 μF external capacitor with <100 mΩ ESR for voltage regulator output |-| M11 | PH6 | bidirectional | PH6 I/O port pin with 5V-tolerant structure; alternate functions: TIM12_CH1, I2C2_SMBA, SPI5_SCK, ETH_MII_RXD2, FMC_SDNE1, DCMI_D8, EVENTOUT |-| M12 | PH8 | bidirectional | PH8 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: TIM5_ETR, I2C3_SDA, FMC_D16, DCMI_HSYNC, LCD_R2, EVENTOUT |-| M13 | PH9 | bidirectional | PH9 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM12_CH2, I2C3_SMBA, FMC_D17, DCMI_D0, LCD_R3, EVENTOUT |-| M14 | PD14 | bidirectional | PD14 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM4_CH3, SAI3_MCLK_B, UART8_CTS, FMC_D0/FMC_DA0, EVENTOUT |-| M15 | PD13 | bidirectional | PD13 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: LPTIM1_OUT, TIM4_CH2, I2C4_SDA, QUADSPI_BK1_IO3, SAI2_SCK_A, FMC_A18, EVENTOUT | | N1 | VREF- | power_in | Analog reference ground pin for ADC/DAC; must be connected close to VREF+ with 100nF decoupling capacitor | | N2 | PA1 | bidirectional | PA1 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: TIM2_CH2, TIM5_CH2, LPTIM3_OUT, TIM15_CH1N, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, SAI2_MCK_B, ETH_MII_RX_CLK/ETH_RMII_REF_CLK, LCD_R2, EVENTOUT; analog: ADC1_INN16, ADC1_INP17 | | N3 | PA0 | bidirectional | PA0 WKUP I/O port pin with 5V-tolerant analog structure; alternate functions: TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, TIM15_BKIN, USART2_CTS_NSS, UART4_TX, SDMMC2_CMD, SAI2_SD_B, ETH_MII_CRS, EVENTOUT; analog: ADC1_INP16; wakeup: WKUP0 |@@ -172,12 +110,6 @@ STM32H743IIK6 from STMicroelectronics, in a UFBGA-201. Pinout and pin descriptio | N7 | PG0 | bidirectional | PG0 I/O port pin with 5V-tolerant high-speed structure; alternate functions: FMC_A10, EVENTOUT | | N8 | VDD | power_in | Main 3.3 V supply voltage pin; must be decoupled with 100 nF capacitor close to pin | | N9 | VDD | power_in | Main 3.3 V supply voltage pin; must be decoupled with 100 nF capacitor close to pin |-| N10 | VDD | power_in | Main 3.3 V supply voltage pin; must be decoupled with 100 nF capacitor close to pin |-| N11 | PE13 | bidirectional | PE13 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM1_CH3, DFSDM_CKIN5, SPI4_MISO, SAI2_FS_B, FMC_D10/FMC_DA10, COMP_2_OUT, LCD_DE, EVENTOUT |-| N12 | PH7 | bidirectional | PH7 I/O port pin with 5V-tolerant I2C FM+ structure; alternate functions: I2C3_SCL, SPI5_MISO, ETH_MII_RXD3, FMC_SDCKE1, DCMI_D9, EVENTOUT |-| N13 | PD12 | bidirectional | PD12 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: LPTIM1_IN1, TIM4_CH1, LPTIM2_IN1, I2C4_SCL, USART3_RTS, QUADSPI_BK1_IO1, SAI2_FS_A, FMC_A17, EVENTOUT |-| N14 | PD11 | bidirectional | PD11 I/O port pin with 5V-tolerant high-speed structure; alternate functions: LPTIM2_IN2, I2C4_SMBA, USART3_CTS_NSS, QUADSPI_BK1_IO0, SAI2_SD_A, FMC_A16, EVENTOUT |-| N15 | PD10 | bidirectional | PD10 I/O port pin with 5V-tolerant high-speed structure; alternate functions: DFSDM_CKOUT, SAI3_FS_B, USART3_CK, CAN2_TXFD, FMC_D15/FMC_DA15, LCD_B3, EVENTOUT | | P1 | VREF+ | power_in | Analog reference positive supply pin for ADC/DAC; 1.62-3.6V, must be decoupled with 100nF + 1μF capacitors; internal voltage reference buffer may use this pin | | P2 | PA2 | bidirectional | PA2 I/O port pin with 5V-tolerant analog structure; alternate functions: TIM2_CH3, TIM5_CH3, LPTIM4_OUT, TIM15_CH1, USART2_TX, SAI2_SCK_B, ETH_MDIO, MDIOS_MDIO, LCD_R1, EVENTOUT; analog: ADC12_INP14; wakeup: WKUP1 | | P3 | PA6 | bidirectional | PA6 I/O port pin with 5V-tolerant analog structure; alternate functions: TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO/I2S1_SDI, SPI6_MISO, TIM13_CH1, TIM8_BKIN_COMP12, MDIOS_MDC, TIM1_BKIN_COMP12, DCMI_PIXCLK, LCD_G2, EVENTOUT; analog: ADC12_INP3 |@@ -187,12 +119,6 @@ STM32H743IIK6 from STMicroelectronics, in a UFBGA-201. Pinout and pin descriptio | P7 | PF15 | bidirectional | PF15 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: I2C4_SDA, FMC_A9, EVENTOUT | | P8 | PE8 | bidirectional | PE8 I/O port pin with 3.3V-tolerant I2C FM+ high-speed structure; alternate functions: TIM1_CH1N, DFSDM_CKIN2, UART7_TX, QUADSPI_BK2_IO1, FMC_D5/FMC_DA5, COMP_2_OUT, EVENTOUT; additional: OPAMP2_VINM | | P9 | PE9 | bidirectional | PE9 I/O port pin with 3.3V-tolerant I2C FM+ high-speed structure; alternate functions: TIM1_CH1, DFSDM_CKOUT, UART7_RTS, QUADSPI_BK2_IO2, FMC_D6/FMC_DA6, EVENTOUT; additional: OPAMP2_VINP, COMP_2_INP |-| P10 | PE11 | bidirectional | PE11 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: TIM1_CH2, DFSDM_CKIN4, SPI4_NSS, SAI2_SD_B, FMC_D8/FMC_DA8, LCD_G3, EVENTOUT; additional: COMP_2_INP |-| P11 | PE14 | bidirectional | PE14 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM1_CH4, SPI4_MOSI, SAI2_MCK_B, FMC_D11/FMC_DA11, LCD_CLK, EVENTOUT |-| P12 | PB12 | bidirectional | PB12 I/O port pin with 5V-tolerant USB structure; alternate functions: TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, DFSDM_DATIN1, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0, OTG_HS_ID, TIM1_BKIN_COMP12, UART5_RX, EVENTOUT |-| P13 | PB13 | bidirectional | PB13 I/O port pin with 5V-tolerant USB structure; alternate functions: TIM1_CH1N, LPTIM2_OUT, SPI2_SCK/I2S2_CK, DFSDM_CKIN1, USART3_CTS_NSS, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1, UART5_TX, EVENTOUT; additional: OTG_HS_VBUS |-| P14 | PD9 | bidirectional | PD9 I/O port pin with 5V-tolerant high-speed structure; alternate functions: DFSDM_DATIN3, SAI3_SD_B, USART3_RX, CAN2_RXFD, FMC_D14/FMC_DA14, EVENTOUT |-| P15 | PD8 | bidirectional | PD8 I/O port pin with 5V-tolerant high-speed structure; alternate functions: DFSDM_CKIN3, SAI3_SCK_B, USART3_TX, SPDIFRX_IN1, FMC_D13/FMC_DA13, EVENTOUT | | R1 | VDDA | power_in | Analog 1.62-3.6 V supply voltage pin; must be decoupled with 100nF + 1μF capacitors separate from digital power if possible | | R2 | PA3 | bidirectional | PA3 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: TIM2_CH4, TIM5_CH4, LPTIM5_OUT, TIM15_CH2, USART2_RX, LCD_B2, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5, EVENTOUT; analog: ADC12_INP15 | | R3 | PA7 | bidirectional | PA7 I/O port pin with 3.3V-tolerant analog structure; alternate functions: TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI/I2S1_SDO, SPI6_MOSI, TIM14_CH1, ETH_MII_RX_DV/ETH_RMII_CRS_DV, FMC_SDNWE, EVENTOUT; analog: ADC12_INN3, ADC12_INP7, OPAMP1_VINM |@@ -202,6 +128,81 @@ STM32H743IIK6 from STMicroelectronics, in a UFBGA-201. Pinout and pin descriptio | R7 | PF14 | bidirectional | PF14 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: DFSDM_CKIN6, I2C4_SCL, FMC_A8, EVENTOUT; analog: ADC2_INN2, ADC2_INP6 | | R8 | PE7 | bidirectional | PE7 I/O port pin with 3.3V-tolerant I2C FM+ high-speed structure; alternate functions: TIM1_ETR, DFSDM_DATIN2, UART7_RX, QUADSPI_BK2_IO0, FMC_D4/FMC_DA4, EVENTOUT; additional: OPAMP2_VOUT, COMP_2_INM | | R9 | PE10 | bidirectional | PE10 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: TIM1_CH2N, DFSDM_DATIN4, UART7_CTS, QUADSPI_BK2_IO3, FMC_D7/FMC_DA7, EVENTOUT; additional: COMP_2_INM |+| A10 | PB3 (JTDO/TRACESWO) | bidirectional | PB3 JTDO/TRACESWO I/O port pin with 5V-tolerant structure; alternate functions: JTDO/TRACESWO, TIM2_CH2, HRTIM_FLT4, SPI1_SCK/I2S1_CK, SPI3_SCK/I2S3_CK, SPI6_SCK, SDMMC2_D2, UART7_RX, EVENTOUT |+| A11 | PD7 | bidirectional | PD7 I/O port pin with 5V-tolerant high-speed structure; alternate functions: DFSDM_DATIN4, SPI1_MOSI/I2S1_SDO, DFSDM_CKIN1, USART2_CK, SPDIFRX_IN0, SDMMC2_CMD, FMC_NE1, EVENTOUT |+| A12 | PC12 | bidirectional | PC12 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TRACED3, HRTIM_EEV2, SPI3_MOSI/I2S3_SDO, USART3_CK, UART5_TX, SDMMC1_CK, DCMI_D9, EVENTOUT |+| A13 | PA15 (JTDI) | bidirectional | PA15 JTDI I/O port pin with 5V-tolerant structure; alternate functions: JTDI, TIM2_CH1/TIM2_ETR, HRTIM_FLT1, HDMI_CEC, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, SPI6_NSS, UART4_RTS, UART7_TX, EVENTOUT |+| A14 | PA14 (JTCK/SWCLK) | bidirectional | PA14 JTCK-SWCLK I/O port pin with 5V-tolerant structure; alternate functions: JTCK-SWCLK, EVENTOUT; used for JTAG/SWD debug interface |+| A15 | PA13 (JTMS/SWDIO) | bidirectional | PA13 JTMS-SWDIO I/O port pin with 5V-tolerant structure; alternate functions: JTMS-SWDIO, EVENTOUT; used for JTAG/SWD debug interface |+| B10 | PG10 | bidirectional | PG10 I/O port pin with 5V-tolerant high-speed structure; alternate functions: HRTIM_FLT5, SPI1_NSS/I2S1_WS, LCD_G3, SAI2_SD_B, FMC_NE3, DCMI_D2, LCD_B2, EVENTOUT |+| B11 | PD6 | bidirectional | PD6 I/O port pin with 5V-tolerant high-speed structure; alternate functions: SAI1_D1, DFSDM_CKIN4, DFSDM_DATIN1, SPI3_MOSI/I2S3_SDO, SAI1_SD_A, USART2_RX, SAI4_SD_A, CAN2_RXFD, SAI4_D1, SDMMC2_CK, FMC_NWAIT, DCMI_D10, LCD_B2, EVENTOUT |+| B12 | PD0 | bidirectional | PD0 I/O port pin with 5V-tolerant high-speed structure; alternate functions: DFSDM_CKIN6, SAI3_SCK_A, UART4_RX, CAN1_RX, FMC_D2/FMC_DA2, EVENTOUT |+| B13 | PC11 | bidirectional | PC11 I/O port pin with 5V-tolerant high-speed structure; alternate functions: HRTIM_FLT2, DFSDM_DATIN5, SPI3_MISO/I2S3_SDI, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDMMC1_D3, DCMI_D4, EVENTOUT |+| B14 | PC10 | bidirectional | PC10 I/O port pin with 5V-tolerant high-speed structure; alternate functions: HRTIM_EEV1, DFSDM_CKIN5, SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDMMC1_D2, DCMI_D8, LCD_R2, EVENTOUT |+| B15 | PA12 | bidirectional | PA12 I/O port pin with 5V-tolerant USB structure; alternate functions: TIM1_ETR, HRTIM_CHD2, LPUART1_RTS, SPI2_SCK/I2S2_CK, UART4_TX, USART1_RTS, SAI2_FS_B, CAN1_TX, OTG_FS_DP, LCD_R5, EVENTOUT |+| C10 | PG9 | bidirectional | PG9 I/O port pin with 5V-tolerant high-speed structure; alternate functions: SPI1_MISO/I2S1_SDI, USART6_RX, SPDIFRX_IN3, QUADSPI_BK2_IO2, SAI2_FS_B, FMC_NE2/FMC_NCE, DCMI_VSYNC, EVENTOUT |+| C11 | PD5 | bidirectional | PD5 I/O port pin with 5V-tolerant high-speed structure; alternate functions: HRTIM_EEV3, USART2_TX, CAN1_TXFD, FMC_NWE, EVENTOUT |+| C12 | PD1 | bidirectional | PD1 I/O port pin with 5V-tolerant high-speed structure; alternate functions: DFSDM_DATIN6, SAI3_SD_A, UART4_TX, CAN1_TX, FMC_D3/FMC_DA3, EVENTOUT |+| C13 | PI3 | bidirectional | PI3 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_ETR, SPI2_MOSI/I2S2_SDO, FMC_D27, DCMI_D10, EVENTOUT |+| C14 | PI2 | bidirectional | PI2 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_CH4, SPI2_MISO/I2S2_SDI, FMC_D26, DCMI_D9, LCD_G7, EVENTOUT |+| C15 | PA11 | bidirectional | PA11 I/O port pin with 5V-tolerant USB structure; alternate functions: TIM1_CH4, HRTIM_CHD1, LPUART1_CTS, SPI2_NSS/I2S2_WS, UART4_RX, USART1_CTS_NSS, CAN1_RX, OTG_FS_DM, LCD_R4, EVENTOUT |+| D10 | PD4 | bidirectional | PD4 I/O port pin with 5V-tolerant high-speed structure; alternate functions: HRTIM_FLT3, SAI3_FS_A, USART2_RTS, CAN1_RXFD, FMC_NOE, EVENTOUT |+| D11 | PD3 | bidirectional | PD3 I/O port pin with 5V-tolerant high-speed structure; alternate functions: DFSDM_CKOUT, SPI2_SCK/I2S2_CK, USART2_CTS_NSS, FMC_CLK, DCMI_D5, LCD_G7, EVENTOUT |+| D12 | PD2 | bidirectional | PD2 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TRACED2, TIM3_ETR, UART5_RX, SDMMC1_CMD, DCMI_D11, EVENTOUT |+| D13 | PH15 | bidirectional | PH15 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_CH3N, CAN1_TXFD, FMC_D23, DCMI_D11, LCD_G4, EVENTOUT |+| D14 | PI1 | bidirectional | PI1 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_BKIN2, SPI2_SCK/I2S2_CK, TIM8_BKIN2_COMP12, FMC_D25, DCMI_D8, LCD_G6, EVENTOUT |+| D15 | PA10 | bidirectional | PA10 I/O port pin with 5V-tolerant USB structure; alternate functions: TIM1_CH3, HRTIM_CHC2, LPUART1_RX, USART1_RX, CAN1_TXFD, OTG_FS_ID, MDIOS_MDIO, LCD_B4, DCMI_D1, LCD_B1, EVENTOUT |+| E12 | PH13 | bidirectional | PH13 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_CH1N, UART4_TX, CAN1_TX, FMC_D21, LCD_G2, EVENTOUT |+| E13 | PH14 | bidirectional | PH14 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_CH2N, UART4_RX, CAN1_RX, FMC_D22, DCMI_D4, LCD_G3, EVENTOUT |+| E14 | PI0 | bidirectional | PI0 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM5_CH4, SPI2_NSS/I2S2_WS, CAN1_RXFD, FMC_D24, DCMI_D13, LCD_G5, EVENTOUT |+| E15 | PA9 | bidirectional | PA9 I/O port pin with 5V-tolerant USB structure; alternate functions: TIM1_CH2, HRTIM_CHC1, LPUART1_TX, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX, CAN1_RXFD, ETH_TX_ER, DCMI_D0, LCD_R5, EVENTOUT; OTG_FS_VBUS |+| F10 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |+| F12 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |+| F13 | VCAP | power_in | |+| F14 | PC9 | bidirectional | PC9 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, UART5_CTS, QUADSPI_BK1_IO0, LCD_G3, SWPMI_SUSPEND, SDMMC1_D1, DCMI_D3, LCD_B2, EVENTOUT |+| F15 | PA8 | bidirectional | PA8 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: MCO1, TIM1_CH1, HRTIM_CHB2, TIM8_BKIN2, I2C3_SCL, USART1_CK, OTG_FS_SOF, UART7_RX, TIM8_BKIN2_COMP12, LCD_B3, LCD_R6, EVENTOUT |+| G10 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |+| G12 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |+| G13 | VDD | power_in | Main 3.3 V supply voltage pin; must be decoupled with 100 nF capacitor close to pin |+| G14 | PC8 | bidirectional | PC8 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TRACED1, HRTIM_CHB1, TIM3_CH3, TIM8_CH3, USART6_CK, UART5_RTS, FMC_NE2/FMC_NCE, SWPMI_RX, SDMMC1_D0, DCMI_D2, EVENTOUT |+| G15 | PC7 | bidirectional | PC7 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TRGIO, HRTIM_CHA2, TIM3_CH2, TIM8_CH2, DFSDM_DATIN3, I2S3_MCK, USART6_RX, SDMMC1_D123DIR, FMC_NE1, SDMMC2_D7, SWPMI_TX, SDMMC1_D7, DCMI_D1, LCD_G6, EVENTOUT |+| H10 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |+| H12 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |+| H13 | VDD33_USB | power_in | USB power domain 3.3 V supply pin with internal regulator; voltage range 3.0-3.6 V when USB used |+| H14 | PG8 | bidirectional | PG8 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_ETR, SPI6_NSS, USART6_RTS, SPDIFRX_IN2, ETH_PPS_OUT, FMC_SDCLK, LCD_G7, EVENTOUT |+| H15 | PC6 | bidirectional | PC6 I/O port pin with 5V-tolerant high-speed structure; alternate functions: HRTIM_CHA1, TIM3_CH1, TIM8_CH1, DFSDM_CKIN3, I2S2_MCK, USART6_TX, SDMMC1_D0DIR, FMC_NWAIT, SDMMC2_D6, SDMMC1_D6, DCMI_D0, LCD_HSYNC, EVENTOUT; additional: SWPMI_IO |+| J10 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |+| J12 | VDD | power_in | Main 3.3 V supply voltage pin; must be decoupled with 100 nF capacitor close to pin |+| J13 | VDD | power_in | Main 3.3 V supply voltage pin; must be decoupled with 100 nF capacitor close to pin |+| J14 | PG7 | bidirectional | PG7 I/O port pin with 5V-tolerant high-speed structure; alternate functions: HRTIM_CHE2, SAI1_MCLK_A, USART6_CK, FMC_INT, DCMI_D13, LCD_CLK, EVENTOUT |+| J15 | PG6 | bidirectional | PG6 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM17_BKIN, HRTIM_CHE1, QUADSPI_BK1_NCS, FMC_NE3, DCMI_D12, LCD_R7, EVENTOUT |+| K10 | VSS | power_in | Ground return path pin; must have low impedance connection to system ground plane |+| K12 | PH12 | bidirectional | PH12 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: TIM5_CH3, I2C4_SDA, FMC_D20, DCMI_D3, LCD_R6, EVENTOUT |+| K13 | PG5 | bidirectional | PG5 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM1_ETR, FMC_A15/FMC_BA1, EVENTOUT |+| K14 | PG4 | bidirectional | PG4 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM1_BKIN2, TIM1_BKIN2_COMP12, FMC_A14/FMC_BA0, EVENTOUT |+| K15 | PG3 | bidirectional | PG3 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_BKIN2, TIM8_BKIN2_COMP12, FMC_A13, EVENTOUT |+| L12 | PH11 | bidirectional | PH11 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: TIM5_CH2, I2C4_SCL, FMC_D19, DCMI_D2, LCD_R5, EVENTOUT |+| L13 | PH10 | bidirectional | PH10 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM5_CH1, I2C4_SMBA, FMC_D18, DCMI_D1, LCD_R4, EVENTOUT |+| L14 | PD15 | bidirectional | PD15 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM4_CH4, SAI3_MCLK_A, UART8_RTS, FMC_D1/FMC_DA1, EVENTOUT |+| L15 | PG2 | bidirectional | PG2 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM8_BKIN, TIM8_BKIN_COMP12, FMC_A12, EVENTOUT |+| M10 | VCAP | power_in | |+| M11 | PH6 | bidirectional | PH6 I/O port pin with 5V-tolerant structure; alternate functions: TIM12_CH1, I2C2_SMBA, SPI5_SCK, ETH_MII_RXD2, FMC_SDNE1, DCMI_D8, EVENTOUT |+| M12 | PH8 | bidirectional | PH8 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: TIM5_ETR, I2C3_SDA, FMC_D16, DCMI_HSYNC, LCD_R2, EVENTOUT |+| M13 | PH9 | bidirectional | PH9 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM12_CH2, I2C3_SMBA, FMC_D17, DCMI_D0, LCD_R3, EVENTOUT |+| M14 | PD14 | bidirectional | PD14 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM4_CH3, SAI3_MCLK_B, UART8_CTS, FMC_D0/FMC_DA0, EVENTOUT |+| M15 | PD13 | bidirectional | PD13 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: LPTIM1_OUT, TIM4_CH2, I2C4_SDA, QUADSPI_BK1_IO3, SAI2_SCK_A, FMC_A18, EVENTOUT |+| N10 | VDD | power_in | Main 3.3 V supply voltage pin; must be decoupled with 100 nF capacitor close to pin |+| N11 | PE13 | bidirectional | PE13 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM1_CH3, DFSDM_CKIN5, SPI4_MISO, SAI2_FS_B, FMC_D10/FMC_DA10, COMP_2_OUT, LCD_DE, EVENTOUT |+| N12 | PH7 | bidirectional | PH7 I/O port pin with 5V-tolerant I2C FM+ structure; alternate functions: I2C3_SCL, SPI5_MISO, ETH_MII_RXD3, FMC_SDCKE1, DCMI_D9, EVENTOUT |+| N13 | PD12 | bidirectional | PD12 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: LPTIM1_IN1, TIM4_CH1, LPTIM2_IN1, I2C4_SCL, USART3_RTS, QUADSPI_BK1_IO1, SAI2_FS_A, FMC_A17, EVENTOUT |+| N14 | PD11 | bidirectional | PD11 I/O port pin with 5V-tolerant high-speed structure; alternate functions: LPTIM2_IN2, I2C4_SMBA, USART3_CTS_NSS, QUADSPI_BK1_IO0, SAI2_SD_A, FMC_A16, EVENTOUT |+| N15 | PD10 | bidirectional | PD10 I/O port pin with 5V-tolerant high-speed structure; alternate functions: DFSDM_CKOUT, SAI3_FS_B, USART3_CK, CAN2_TXFD, FMC_D15/FMC_DA15, LCD_B3, EVENTOUT |+| P10 | PE11 | bidirectional | PE11 I/O port pin with 5V-tolerant I2C FM+ high-speed structure; alternate functions: TIM1_CH2, DFSDM_CKIN4, SPI4_NSS, SAI2_SD_B, FMC_D8/FMC_DA8, LCD_G3, EVENTOUT; additional: COMP_2_INP |+| P11 | PE14 | bidirectional | PE14 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM1_CH4, SPI4_MOSI, SAI2_MCK_B, FMC_D11/FMC_DA11, LCD_CLK, EVENTOUT |+| P12 | PB12 | bidirectional | PB12 I/O port pin with 5V-tolerant USB structure; alternate functions: TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, DFSDM_DATIN1, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0, OTG_HS_ID, TIM1_BKIN_COMP12, UART5_RX, EVENTOUT |+| P13 | PB13 | bidirectional | PB13 I/O port pin with 5V-tolerant USB structure; alternate functions: TIM1_CH1N, LPTIM2_OUT, SPI2_SCK/I2S2_CK, DFSDM_CKIN1, USART3_CTS_NSS, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1, UART5_TX, EVENTOUT; additional: OTG_HS_VBUS |+| P14 | PD9 | bidirectional | PD9 I/O port pin with 5V-tolerant high-speed structure; alternate functions: DFSDM_DATIN3, SAI3_SD_B, USART3_RX, CAN2_RXFD, FMC_D14/FMC_DA14, EVENTOUT |+| P15 | PD8 | bidirectional | PD8 I/O port pin with 5V-tolerant high-speed structure; alternate functions: DFSDM_CKIN3, SAI3_SCK_B, USART3_TX, SPDIFRX_IN1, FMC_D13/FMC_DA13, EVENTOUT | | R10 | PE12 | bidirectional | PE12 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM1_CH3N, DFSDM_DATIN5, SPI4_SCK, SAI2_SCK_B, FMC_D9/FMC_DA9, COMP_1_OUT, LCD_B4, EVENTOUT | | R11 | PE15 | bidirectional | PE15 I/O port pin with 5V-tolerant high-speed structure; alternate functions: TIM1_BKIN, HDMI_TIM1_BKIN, FMC_D12/FMC_DA12, TIM1_BKIN_COMP12, LCD_R7, EVENTOUT | | R12 | PB10 | bidirectional | PB10 I/O port pin with 5V-tolerant I2C FM+ structure; alternate functions: TIM2_CH3, HRTIM_SCOUT, LPTIM2_IN1, I2C2_SCL, SPI2_SCK/I2S2_CK, DFSDM_DATIN7, USART3_TX, QUADSPI_BK1_NCS, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4, EVENTOUT |
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length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@26" x="17.78" y="-60.96" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@27" x="17.78" y="-63.5" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@28" x="17.78" y="-66.04" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@29" x="17.78" y="-68.58" length="middle" direction="pwr" rot="R180"/>+ <pin name="VDD@11" x="17.78" y="-71.12" length="middle" direction="pwr" rot="R180"/>+ <pin name="PF5" x="17.78" y="-73.66" length="middle" direction="io" rot="R180"/>+ <pin name="PF6" x="17.78" y="-76.2" length="middle" direction="io" rot="R180"/>+ <pin name="PF7" x="17.78" y="-78.74" length="middle" direction="io" rot="R180"/>+ <pin name="PG6" x="17.78" y="-81.28" length="middle" direction="io" rot="R180"/>+ <pin name="PG7" x="17.78" y="-83.82" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@12" x="17.78" y="-86.36" length="middle" direction="pwr" rot="R180"/>+ <pin name="VDD@13" x="17.78" y="-88.9" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@30" x="17.78" y="-91.44" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@31" x="17.78" y="-93.98" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@32" x="17.78" y="-96.52" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@33" x="17.78" y="-99.06" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@34" x="17.78" y="-101.6" length="middle" direction="pwr" rot="R180"/>+ <pin name="PH5" x="17.78" y="-104.14" length="middle" direction="io" rot="R180"/>+ <pin name="PF4" x="17.78" y="-106.68" length="middle" direction="io" rot="R180"/>+ <pin name="PF3" x="17.78" y="-109.22" length="middle" direction="io" rot="R180"/>+ <pin name="NRST" x="17.78" y="-111.76" length="middle" direction="in" rot="R180"/>+ <pin name="PC6" x="17.78" y="-114.3" length="middle" direction="io" rot="R180"/>+ <pin name="PG8" x="17.78" y="-116.84" length="middle" direction="io" rot="R180"/>+ <pin name="VDD33_USB" x="17.78" y="-119.38" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@35" x="17.78" y="-121.92" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@36" x="17.78" y="-124.46" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@37" x="17.78" y="-127" length="middle" direction="pwr" rot="R180"/> </symbol> </symbols> <devicesets>-<deviceset name="UFBGA-201_10x10mm_Layout15x15_P0.65mm" prefix="U">- <description>UFBGA-201_10x10mm_Layout15x15_P0.65mm (symbol synthesized from footprint pads)</description>+<deviceset name="STM32H743IIK6" prefix="U">+ <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFBGA-201. Pinout checked against ST's open pin data</description> <gates>- <gate name="G$1" symbol="UFBGA-201_10x10mm_Layout15x15_P0.65mm" x="0" y="0"/>+ <gate name="G$1" symbol="STM32H743IIK6" x="0" y="0"/> </gates> <devices> <device name="" package="UFBGA-201_10x10mm_Layout15x15_P0.65mm"> <connects>- <connect gate="G$1" pin="A1" pad="A1"/>- <connect gate="G$1" pin="A2" pad="A2"/>- <connect gate="G$1" pin="A3" pad="A3"/>- <connect gate="G$1" pin="A4" pad="A4"/>- <connect gate="G$1" pin="A5" pad="A5"/>- <connect gate="G$1" pin="A6" pad="A6"/>- <connect gate="G$1" pin="A7" pad="A7"/>- <connect gate="G$1" pin="A8" pad="A8"/>- <connect gate="G$1" pin="A9" pad="A9"/>- <connect gate="G$1" pin="A10" pad="A10"/>- <connect gate="G$1" pin="A11" pad="A11"/>- <connect gate="G$1" pin="A12" pad="A12"/>- <connect gate="G$1" pin="A13" pad="A13"/>- <connect gate="G$1" pin="A14" pad="A14"/>- <connect gate="G$1" pin="A15" pad="A15"/>- <connect gate="G$1" pin="B1" pad="B1"/>- <connect gate="G$1" pin="B2" pad="B2"/>- <connect gate="G$1" pin="B3" pad="B3"/>- <connect gate="G$1" pin="B4" pad="B4"/>- <connect gate="G$1" pin="B5" pad="B5"/>- <connect gate="G$1" pin="B6" pad="B6"/>- <connect gate="G$1" pin="B7" pad="B7"/>- <connect gate="G$1" pin="B8" pad="B8"/>- <connect gate="G$1" pin="B9" pad="B9"/>- <connect gate="G$1" pin="B10" pad="B10"/>- <connect gate="G$1" pin="B11" pad="B11"/>- <connect gate="G$1" pin="B12" pad="B12"/>- <connect gate="G$1" pin="B13" pad="B13"/>- <connect gate="G$1" pin="B14" pad="B14"/>- <connect gate="G$1" pin="B15" pad="B15"/>- <connect gate="G$1" pin="C1" pad="C1"/>- <connect gate="G$1" pin="C2" pad="C2"/>- <connect gate="G$1" pin="C3" pad="C3"/>- <connect gate="G$1" pin="C4" pad="C4"/>- <connect gate="G$1" pin="C5" pad="C5"/>- <connect gate="G$1" pin="C6" pad="C6"/>- <connect gate="G$1" pin="C7" pad="C7"/>- <connect gate="G$1" pin="C8" pad="C8"/>- <connect gate="G$1" pin="C9" pad="C9"/>- <connect gate="G$1" pin="C10" pad="C10"/>- <connect gate="G$1" pin="C11" pad="C11"/>- <connect gate="G$1" pin="C12" pad="C12"/>- <connect gate="G$1" pin="C13" pad="C13"/>- <connect gate="G$1" pin="C14" pad="C14"/>- <connect gate="G$1" pin="C15" pad="C15"/>- <connect gate="G$1" pin="D1" pad="D1"/>- <connect gate="G$1" pin="D2" pad="D2"/>- <connect gate="G$1" pin="D3" pad="D3"/>- <connect gate="G$1" pin="D4" pad="D4"/>- <connect gate="G$1" pin="D5" pad="D5"/>- <connect gate="G$1" pin="D6" pad="D6"/>- <connect gate="G$1" pin="D7" pad="D7"/>- <connect gate="G$1" pin="D8" pad="D8"/>- <connect gate="G$1" pin="D9" pad="D9"/>- <connect gate="G$1" pin="D10" pad="D10"/>- <connect gate="G$1" pin="D11" pad="D11"/>- <connect gate="G$1" pin="D12" pad="D12"/>- <connect gate="G$1" pin="D13" pad="D13"/>- <connect gate="G$1" pin="D14" pad="D14"/>- <connect gate="G$1" pin="D15" pad="D15"/>- <connect gate="G$1" pin="E1" pad="E1"/>- <connect gate="G$1" pin="E2" pad="E2"/>- <connect gate="G$1" pin="E3" pad="E3"/>- <connect gate="G$1" pin="E4" pad="E4"/>- <connect gate="G$1" pin="E12" pad="E12"/>- <connect gate="G$1" pin="E13" pad="E13"/>- <connect gate="G$1" pin="E14" pad="E14"/>- <connect gate="G$1" pin="E15" pad="E15"/>- <connect gate="G$1" pin="F1" pad="F1"/>- <connect gate="G$1" pin="F2" pad="F2"/>- <connect gate="G$1" pin="F3" pad="F3"/>- <connect gate="G$1" pin="F4" pad="F4"/>- <connect gate="G$1" pin="F6" pad="F6"/>- <connect gate="G$1" pin="F7" pad="F7"/>- <connect gate="G$1" pin="F8" pad="F8"/>- <connect gate="G$1" pin="F9" pad="F9"/>- <connect gate="G$1" pin="F10" pad="F10"/>- <connect gate="G$1" pin="F12" pad="F12"/>- <connect gate="G$1" pin="F13" pad="F13"/>- <connect gate="G$1" pin="F14" pad="F14"/>- <connect gate="G$1" pin="F15" pad="F15"/>- <connect gate="G$1" pin="G1" pad="G1"/>- <connect gate="G$1" pin="G2" pad="G2"/>- <connect gate="G$1" pin="G3" pad="G3"/>- <connect gate="G$1" pin="G4" pad="G4"/>- <connect gate="G$1" pin="G6" pad="G6"/>- <connect gate="G$1" pin="G7" pad="G7"/>- <connect gate="G$1" pin="G8" pad="G8"/>- <connect gate="G$1" pin="G9" pad="G9"/>- <connect gate="G$1" pin="G10" pad="G10"/>- <connect gate="G$1" pin="G12" pad="G12"/>- <connect gate="G$1" pin="G13" pad="G13"/>- <connect gate="G$1" pin="G14" pad="G14"/>- <connect gate="G$1" pin="G15" pad="G15"/>- <connect gate="G$1" pin="H1" pad="H1"/>- <connect gate="G$1" pin="H2" pad="H2"/>- <connect gate="G$1" pin="H3" pad="H3"/>- <connect gate="G$1" pin="H4" pad="H4"/>- <connect gate="G$1" pin="H6" pad="H6"/>- <connect gate="G$1" pin="H7" pad="H7"/>- <connect gate="G$1" pin="H8" pad="H8"/>- <connect gate="G$1" pin="H9" pad="H9"/>- <connect gate="G$1" pin="H10" pad="H10"/>- <connect gate="G$1" pin="H12" pad="H12"/>- <connect gate="G$1" pin="H13" pad="H13"/>- <connect gate="G$1" pin="H14" pad="H14"/>- <connect gate="G$1" pin="H15" pad="H15"/>- <connect gate="G$1" pin="J1" pad="J1"/>- <connect gate="G$1" pin="J2" pad="J2"/>- <connect gate="G$1" pin="J3" pad="J3"/>- <connect gate="G$1" pin="J4" pad="J4"/>- <connect gate="G$1" pin="J6" pad="J6"/>- <connect gate="G$1" pin="J7" pad="J7"/>- <connect gate="G$1" pin="J8" pad="J8"/>- <connect gate="G$1" pin="J9" pad="J9"/>- <connect gate="G$1" pin="J10" pad="J10"/>- <connect gate="G$1" pin="J12" pad="J12"/>- <connect gate="G$1" pin="J13" pad="J13"/>- <connect gate="G$1" pin="J14" pad="J14"/>- <connect gate="G$1" pin="J15" pad="J15"/>- <connect gate="G$1" pin="K1" pad="K1"/>- <connect gate="G$1" pin="K2" pad="K2"/>- <connect gate="G$1" pin="K3" pad="K3"/>- <connect gate="G$1" pin="K4" pad="K4"/>- <connect gate="G$1" pin="K6" pad="K6"/>- <connect gate="G$1" pin="K7" pad="K7"/>- <connect gate="G$1" pin="K8" pad="K8"/>- <connect gate="G$1" pin="K9" pad="K9"/>- <connect gate="G$1" pin="K10" pad="K10"/>- <connect gate="G$1" pin="K12" pad="K12"/>- <connect gate="G$1" pin="K13" pad="K13"/>- <connect gate="G$1" pin="K14" pad="K14"/>- <connect gate="G$1" pin="K15" pad="K15"/>- <connect gate="G$1" pin="L1" pad="L1"/>- <connect gate="G$1" pin="L2" pad="L2"/>- <connect gate="G$1" pin="L3" pad="L3"/>- <connect gate="G$1" pin="L4" pad="L4"/>- <connect gate="G$1" pin="L12" pad="L12"/>- <connect gate="G$1" pin="L13" pad="L13"/>- <connect gate="G$1" pin="L14" pad="L14"/>- <connect gate="G$1" pin="L15" pad="L15"/>- <connect gate="G$1" pin="M1" pad="M1"/>- <connect gate="G$1" pin="M2" pad="M2"/>- <connect gate="G$1" pin="M3" pad="M3"/>- <connect gate="G$1" pin="M4" pad="M4"/>- <connect gate="G$1" pin="M5" pad="M5"/>- <connect gate="G$1" pin="M6" pad="M6"/>- <connect gate="G$1" pin="M7" pad="M7"/>- <connect gate="G$1" pin="M8" pad="M8"/>- <connect gate="G$1" pin="M9" pad="M9"/>- <connect gate="G$1" pin="M10" pad="M10"/>- <connect gate="G$1" pin="M11" pad="M11"/>- <connect gate="G$1" pin="M12" pad="M12"/>- <connect gate="G$1" pin="M13" pad="M13"/>- <connect gate="G$1" pin="M14" pad="M14"/>- <connect gate="G$1" pin="M15" pad="M15"/>- <connect gate="G$1" pin="N1" pad="N1"/>- <connect gate="G$1" pin="N2" pad="N2"/>- <connect gate="G$1" pin="N3" pad="N3"/>- <connect gate="G$1" pin="N4" pad="N4"/>- <connect gate="G$1" pin="N5" pad="N5"/>- <connect gate="G$1" pin="N6" pad="N6"/>- <connect gate="G$1" pin="N7" pad="N7"/>- <connect gate="G$1" pin="N8" pad="N8"/>- <connect gate="G$1" pin="N9" pad="N9"/>- <connect gate="G$1" pin="N10" pad="N10"/>- <connect gate="G$1" pin="N11" pad="N11"/>- <connect gate="G$1" pin="N12" pad="N12"/>- <connect gate="G$1" pin="N13" pad="N13"/>- <connect gate="G$1" pin="N14" pad="N14"/>- <connect gate="G$1" pin="N15" pad="N15"/>- <connect gate="G$1" pin="P1" pad="P1"/>- <connect gate="G$1" pin="P2" pad="P2"/>- <connect gate="G$1" pin="P3" pad="P3"/>- <connect gate="G$1" pin="P4" pad="P4"/>- <connect gate="G$1" pin="P5" pad="P5"/>- <connect gate="G$1" pin="P6" pad="P6"/>- <connect gate="G$1" pin="P7" pad="P7"/>- <connect gate="G$1" pin="P8" pad="P8"/>- <connect gate="G$1" pin="P9" pad="P9"/>- <connect gate="G$1" pin="P10" pad="P10"/>- <connect gate="G$1" pin="P11" pad="P11"/>- <connect gate="G$1" pin="P12" pad="P12"/>- <connect gate="G$1" pin="P13" pad="P13"/>- <connect gate="G$1" pin="P14" pad="P14"/>- <connect gate="G$1" pin="P15" pad="P15"/>- <connect gate="G$1" pin="R1" pad="R1"/>- <connect gate="G$1" pin="R2" pad="R2"/>- <connect gate="G$1" pin="R3" pad="R3"/>- <connect gate="G$1" pin="R4" pad="R4"/>- <connect gate="G$1" pin="R5" pad="R5"/>- <connect gate="G$1" pin="R6" pad="R6"/>- <connect gate="G$1" pin="R7" pad="R7"/>- <connect gate="G$1" pin="R8" pad="R8"/>- <connect gate="G$1" pin="R9" pad="R9"/>- <connect gate="G$1" pin="R10" pad="R10"/>- <connect gate="G$1" pin="R11" pad="R11"/>- <connect gate="G$1" pin="R12" pad="R12"/>- <connect gate="G$1" pin="R13" pad="R13"/>- <connect gate="G$1" pin="R14" pad="R14"/>- <connect gate="G$1" pin="R15" pad="R15"/>+ <connect gate="G$1" pin="PE3" pad="A1"/>+ <connect gate="G$1" pin="PE2" pad="A2"/>+ <connect gate="G$1" pin="PE1" pad="A3"/>+ <connect gate="G$1" pin="PE0" pad="A4"/>+ <connect gate="G$1" pin="PB8" pad="A5"/>+ <connect gate="G$1" pin="PB5" pad="A6"/>+ <connect gate="G$1" pin="PG14" pad="A7"/>+ <connect gate="G$1" pin="PG13" pad="A8"/>+ <connect gate="G$1" pin="PB4_NJTRST" pad="A9"/>+ <connect gate="G$1" pin="PB3_JTDO/TRACESWO" pad="A10"/>+ <connect gate="G$1" pin="PD7" pad="A11"/>+ <connect gate="G$1" pin="PC12" pad="A12"/>+ <connect gate="G$1" pin="PA15_JTDI" pad="A13"/>+ <connect gate="G$1" pin="PA14_JTCK/SWCLK" pad="A14"/>+ <connect gate="G$1" pin="PA13_JTMS/SWDIO" pad="A15"/>+ <connect gate="G$1" pin="PE4" pad="B1"/>+ <connect gate="G$1" pin="PE5" pad="B2"/>+ <connect gate="G$1" pin="PE6" pad="B3"/>+ <connect gate="G$1" pin="PB9" pad="B4"/>+ <connect gate="G$1" pin="PB7" pad="B5"/>+ <connect gate="G$1" pin="PB6" pad="B6"/>+ <connect gate="G$1" pin="PG15" pad="B7"/>+ <connect gate="G$1" pin="PG12" pad="B8"/>+ <connect gate="G$1" pin="PG11" pad="B9"/>+ <connect gate="G$1" pin="PG10" pad="B10"/>+ <connect gate="G$1" pin="PD6" pad="B11"/>+ <connect gate="G$1" pin="PD0" pad="B12"/>+ <connect gate="G$1" pin="PC11" pad="B13"/>+ <connect gate="G$1" pin="PC10" pad="B14"/>+ <connect gate="G$1" pin="PA12" pad="B15"/>+ <connect gate="G$1" pin="VBAT" pad="C1"/>+ <connect gate="G$1" pin="PI7" pad="C2"/>+ <connect gate="G$1" pin="PI6" pad="C3"/>+ <connect gate="G$1" pin="PI5" pad="C4"/>+ <connect gate="G$1" pin="VDD" pad="C5"/>+ <connect gate="G$1" pin="PDR_ON" pad="C6"/>+ <connect gate="G$1" pin="VDD@2" pad="C7"/>+ <connect gate="G$1" pin="VDD@3" pad="C8"/>+ <connect gate="G$1" pin="VDD@4" pad="C9"/>+ <connect gate="G$1" pin="PG9" pad="C10"/>+ <connect gate="G$1" pin="PD5" pad="C11"/>+ <connect gate="G$1" pin="PD1" pad="C12"/>+ <connect gate="G$1" pin="PI3" pad="C13"/>+ <connect gate="G$1" pin="PI2" pad="C14"/>+ <connect gate="G$1" pin="PA11" pad="C15"/>+ <connect gate="G$1" pin="PC13" pad="D1"/>+ <connect gate="G$1" pin="PI8" pad="D2"/>+ <connect gate="G$1" pin="PI9" pad="D3"/>+ <connect gate="G$1" pin="PI4" pad="D4"/>+ <connect gate="G$1" pin="VSS" pad="D5"/>+ <connect gate="G$1" pin="BOOT0" pad="D6"/>+ <connect gate="G$1" pin="VSS@2" pad="D7"/>+ <connect gate="G$1" pin="VSS@3" pad="D8"/>+ <connect gate="G$1" pin="VSS@4" pad="D9"/>+ <connect gate="G$1" pin="PD4" pad="D10"/>+ <connect gate="G$1" pin="PD3" pad="D11"/>+ <connect gate="G$1" pin="PD2" pad="D12"/>+ <connect gate="G$1" pin="PH15" pad="D13"/>+ <connect gate="G$1" pin="PI1" pad="D14"/>+ <connect gate="G$1" pin="PA10" pad="D15"/>+ <connect gate="G$1" pin="PC14-OSC32_IN_OSC32_IN" pad="E1"/>+ <connect gate="G$1" pin="PF0" pad="E2"/>+ <connect gate="G$1" pin="PI10" pad="E3"/>+ <connect gate="G$1" pin="PI11" pad="E4"/>+ <connect gate="G$1" pin="PH13" pad="E12"/>+ <connect gate="G$1" pin="PH14" pad="E13"/>+ <connect gate="G$1" pin="PI0" pad="E14"/>+ <connect gate="G$1" pin="PA9" pad="E15"/>+ <connect gate="G$1" pin="PC15-OSC32_OUT_OSC32_OUT" pad="F1"/>+ <connect gate="G$1" pin="VSS@5" pad="F2"/>+ <connect gate="G$1" pin="VDD@5" pad="F3"/>+ <connect gate="G$1" pin="PH2" pad="F4"/>+ <connect gate="G$1" pin="VSS@6" pad="F6"/>+ <connect gate="G$1" pin="VSS@7" pad="F7"/>+ <connect gate="G$1" pin="VSS@8" pad="F8"/>+ <connect gate="G$1" pin="VSS@9" pad="F9"/>+ <connect gate="G$1" pin="VSS@10" pad="F10"/>+ <connect gate="G$1" pin="VSS@11" pad="F12"/>+ <connect gate="G$1" pin="VCAP" pad="F13"/>+ <connect gate="G$1" pin="PC9" pad="F14"/>+ <connect gate="G$1" pin="PA8" pad="F15"/>+ <connect gate="G$1" pin="PH0-OSC_IN_PH0" pad="G1"/>+ <connect gate="G$1" pin="VSS@12" pad="G2"/>+ <connect gate="G$1" pin="VDD@6" pad="G3"/>+ <connect gate="G$1" pin="PH3" pad="G4"/>+ <connect gate="G$1" pin="VSS@13" pad="G6"/>+ <connect gate="G$1" pin="VSS@14" pad="G7"/>+ <connect gate="G$1" pin="VSS@15" pad="G8"/>+ <connect gate="G$1" pin="VSS@16" pad="G9"/>+ <connect gate="G$1" pin="VSS@17" pad="G10"/>+ <connect gate="G$1" pin="VSS@18" pad="G12"/>+ <connect gate="G$1" pin="VDD@7" pad="G13"/>+ <connect gate="G$1" pin="PC8" pad="G14"/>+ <connect gate="G$1" pin="PC7" pad="G15"/>+ <connect gate="G$1" pin="PH1-OSC_OUT_PH1" pad="H1"/>+ <connect gate="G$1" pin="PF2" pad="H2"/>+ <connect gate="G$1" pin="PF1" pad="H3"/>+ <connect gate="G$1" pin="PH4" pad="H4"/>+ <connect gate="G$1" pin="VSS@19" pad="H6"/>+ <connect gate="G$1" pin="VSS@20" pad="H7"/>+ <connect gate="G$1" pin="VSS@21" pad="H8"/>+ <connect gate="G$1" pin="PB15" pad="R15"/>+ <connect gate="G$1" pin="PB14" pad="R14"/>+ <connect gate="G$1" pin="PB11" pad="R13"/>+ <connect gate="G$1" pin="PB10" pad="R12"/>+ <connect gate="G$1" pin="PE15" pad="R11"/>+ <connect gate="G$1" pin="PE12" pad="R10"/>+ <connect gate="G$1" pin="PE10" pad="R9"/>+ <connect gate="G$1" pin="PE7" pad="R8"/>+ <connect gate="G$1" pin="PF14" pad="R7"/>+ <connect gate="G$1" pin="PF11" pad="R6"/>+ <connect gate="G$1" pin="PB0" pad="R5"/>+ <connect gate="G$1" pin="PB1" pad="R4"/>+ <connect gate="G$1" pin="PA7" pad="R3"/>+ <connect gate="G$1" pin="PA3" pad="R2"/>+ <connect gate="G$1" pin="VDDA" pad="R1"/>+ <connect gate="G$1" pin="PD8" pad="P15"/>+ <connect gate="G$1" pin="PD9" pad="P14"/>+ <connect gate="G$1" pin="PB13" pad="P13"/>+ <connect gate="G$1" pin="PB12" pad="P12"/>+ <connect gate="G$1" pin="PE14" pad="P11"/>+ <connect gate="G$1" pin="PE11" pad="P10"/>+ <connect gate="G$1" pin="PE9" pad="P9"/>+ <connect gate="G$1" pin="PE8" pad="P8"/>+ <connect gate="G$1" pin="PF15" pad="P7"/>+ <connect gate="G$1" pin="PF12" pad="P6"/>+ <connect gate="G$1" pin="PC5" pad="P5"/>+ <connect gate="G$1" pin="PA5" pad="P4"/>+ <connect gate="G$1" pin="PA6" pad="P3"/>+ <connect gate="G$1" pin="PA2" pad="P2"/>+ <connect gate="G$1" pin="VREF+" pad="P1"/>+ <connect gate="G$1" pin="PD10" pad="N15"/>+ <connect gate="G$1" pin="PD11" pad="N14"/>+ <connect gate="G$1" pin="PD12" pad="N13"/>+ <connect gate="G$1" pin="PH7" pad="N12"/>+ <connect gate="G$1" pin="PE13" pad="N11"/>+ <connect gate="G$1" pin="VDD@8" pad="N10"/>+ <connect gate="G$1" pin="VDD@9" pad="N9"/>+ <connect gate="G$1" pin="VDD@10" pad="N8"/>+ <connect gate="G$1" pin="PG0" pad="N7"/>+ <connect gate="G$1" pin="PF13" pad="N6"/>+ <connect gate="G$1" pin="PC4" pad="N5"/>+ <connect gate="G$1" pin="PA4" pad="N4"/>+ <connect gate="G$1" pin="PA0" pad="N3"/>+ <connect gate="G$1" pin="PA1" pad="N2"/>+ <connect gate="G$1" pin="VREF-" pad="N1"/>+ <connect gate="G$1" pin="PD13" pad="M15"/>+ <connect gate="G$1" pin="PD14" pad="M14"/>+ <connect gate="G$1" pin="PH9" pad="M13"/>+ <connect gate="G$1" pin="PH8" pad="M12"/>+ <connect gate="G$1" pin="PH6" pad="M11"/>+ <connect gate="G$1" pin="VCAP@2" pad="M10"/>+ <connect gate="G$1" pin="VSS@22" pad="M9"/>+ <connect gate="G$1" pin="VSS@23" pad="M8"/>+ <connect gate="G$1" pin="PG1" pad="M7"/>+ <connect gate="G$1" pin="PB2" pad="M6"/>+ <connect gate="G$1" pin="PC3_C" pad="M5"/>+ <connect gate="G$1" pin="PC2_C" pad="M4"/>+ <connect gate="G$1" pin="PC1" pad="M3"/>+ <connect gate="G$1" pin="PC0" pad="M2"/>+ <connect gate="G$1" pin="VSSA" pad="M1"/>+ <connect gate="G$1" pin="PG2" pad="L15"/>+ <connect gate="G$1" pin="PD15" pad="L14"/>+ <connect gate="G$1" pin="PH10" pad="L13"/>+ <connect gate="G$1" pin="PH11" pad="L12"/>+ <connect gate="G$1" pin="VSS@24" pad="L4"/>+ <connect gate="G$1" pin="PF8" pad="L3"/>+ <connect gate="G$1" pin="PF9" pad="L2"/>+ <connect gate="G$1" pin="PF10" pad="L1"/>+ <connect gate="G$1" pin="PG3" pad="K15"/>+ <connect gate="G$1" pin="PG4" pad="K14"/>+ <connect gate="G$1" pin="PG5" pad="K13"/>+ <connect gate="G$1" pin="PH12" pad="K12"/>+ <connect gate="G$1" pin="VSS@25" pad="K10"/>+ <connect gate="G$1" pin="VSS@26" pad="K9"/>+ <connect gate="G$1" pin="VSS@27" pad="K8"/>+ <connect gate="G$1" pin="VSS@28" pad="K7"/>+ <connect gate="G$1" pin="VSS@29" pad="K6"/>+ <connect gate="G$1" pin="VDD@11" pad="K4"/>+ <connect gate="G$1" pin="PF5" pad="K3"/>+ <connect gate="G$1" pin="PF6" pad="K2"/>+ <connect gate="G$1" pin="PF7" pad="K1"/>+ <connect gate="G$1" pin="PG6" pad="J15"/>+ <connect gate="G$1" pin="PG7" pad="J14"/>+ <connect gate="G$1" pin="VDD@12" pad="J13"/>+ <connect gate="G$1" pin="VDD@13" pad="J12"/>+ <connect gate="G$1" pin="VSS@30" pad="J10"/>+ <connect gate="G$1" pin="VSS@31" pad="J9"/>+ <connect gate="G$1" pin="VSS@32" pad="J8"/>+ <connect gate="G$1" pin="VSS@33" pad="J7"/>+ <connect gate="G$1" pin="VSS@34" pad="J6"/>+ <connect gate="G$1" pin="PH5" pad="J4"/>+ <connect gate="G$1" pin="PF4" pad="J3"/>+ <connect gate="G$1" pin="PF3" pad="J2"/>+ <connect gate="G$1" pin="NRST" pad="J1"/>+ <connect gate="G$1" pin="PC6" pad="H15"/>+ <connect gate="G$1" pin="PG8" pad="H14"/>+ <connect gate="G$1" pin="VDD33_USB" pad="H13"/>+ <connect gate="G$1" pin="VSS@35" pad="H12"/>+ <connect gate="G$1" pin="VSS@36" pad="H10"/>+ <connect gate="G$1" pin="VSS@37" pad="H9"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="STM32H743IIK6" constant="no"/>+ <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+ <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884108122460160" constant="no"/>+ <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/stm32h743iik6" constant="no"/>+ <attribute name="MOUSER_PN" value="511-STM32H743IIK6" constant="no"/>+ <attribute name="DIGIKEY_PN" value="497-17723-ND" constant="no"/>+ <attribute name="LCSC_PN" value="C129442" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>