component
STM32G474MET6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-80(12x12). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+116@@ -0,0 +1,116 @@+# STM32G474MET6++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-80(12x12)++STM32G474MET6 from STMicroelectronics, in a LQFP-80(12x12). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VBAT | power_in | Backup-domain supply for the RTC and backup registers, specified from 1.55 V to 3.6 V. |+| 2 | PC13 | bidirectional | FT (5 V tolerant) GPIO with RTC/tamper functions WKUP2, RTC_TAMP1, RTC_TS and RTC_OUT1; it is supplied through the power switch, which sinks only 3 mA, so output use is limited to 2 MHz with 30 pF and it must not drive LEDs or act as a current source. |+| 3 | PC14-OSC32_IN | bidirectional | FT (5 V tolerant) GPIO that serves as the 32 kHz oscillator input OSC32_IN, with the same power-switch current limit as PC13. |+| 4 | PC15-OSC32_OUT | bidirectional | FT (5 V tolerant) GPIO that serves as the 32 kHz oscillator output OSC32_OUT, with the same power-switch current limit as PC13. |+| 5 | PF0-OSC_IN | bidirectional | FT_fa I/O (Fm+ capable, analog switch supplied by VDDA) that serves as the main oscillator input OSC_IN, with alternates I2C2_SDA, SPI2_NSS/I2S2_WS, TIM1_CH3N and ADC1_IN10. |+| 6 | PF1-OSC_OUT | bidirectional | FT_a I/O (analog switch supplied by VDDA) that serves as the main oscillator output OSC_OUT, with alternate SPI2_SCK/I2S2_CK and additional functions ADC2_IN10, COMP3_INM. |+| 7 | PG10-NRST | bidirectional | Bidirectional reset pin NRST with an embedded weak pull-up resistor, also usable as an FT I/O with alternate MCO. |+| 8 | PC0 | bidirectional | FT_a I/O (analog switch supplied by VDDA) with alternates LPTIM1_IN1, TIM1_CH1, LPUART1_RX and additional function ADC12_IN6, COMP3_INM. |+| 9 | PC1 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates LPTIM1_OUT, TIM1_CH2, LPUART1_TX, QUADSPI1_BK2_IO0 and SAI1_SD_A, and additional functions ADC12_IN7, COMP3_INP. |+| 10 | PC2 | bidirectional | FT_a I/O (analog switch supplied by VDDA) with alternates LPTIM1_IN2, TIM1_CH3, COMP3_OUT, TIM20_CH2, QUADSPI1_BK2_IO1 and additional function ADC12_IN8. |+| 11 | PC3 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates LPTIM1_ETR, TIM1_CH4, SAI1_D1, TIM1_BKIN2, QUADSPI1_BK2_IO2 and SAI1_SD_A, and additional functions ADC12_IN9, OPAMP5_VINP. |+| 12 | PA0 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM2_CH1, TIM5_CH1, USART2_CTS, COMP1_OUT, TIM8_BKIN, TIM8_ETR and TIM2_ETR, and additional functions ADC12_IN1, COMP1_INM, COMP3_INP, RTC_TAMP2 and WKUP1. |+| 13 | PA1 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates RTC_REFIN, TIM2_CH2, TIM5_CH2, USART2_RTS_DE and TIM15_CH1N, and additional functions ADC12_IN2, COMP1_INP, OPAMP1_VINP, OPAMP3_VINP and OPAMP6_VINM. |+| 14 | PA2 | bidirectional | FT_a I/O (analog switch supplied by VDDA) with alternates TIM2_CH3, TIM5_CH3, USART2_TX, COMP2_OUT, TIM15_CH1, QUADSPI1_BK1_NCS, LPUART1_TX and UCPD1_FRSTX, and additional functions ADC1_IN3, COMP2_INM, OPAMP1_VOUT and WKUP4/LSCO. |+| 15 | VSS | power_in | Ground pin; all VSS pins must be connected to the external ground within the permitted range. |+| 16 | VDD | power_in | Main digital supply pin; the device operating range is 1.71 V to 3.6 V and each VDD/VSS pair must be decoupled with ceramic capacitors. |+| 17 | PA3 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM2_CH4, TIM5_CH4, SAI1_CK1, USART2_RX, TIM15_CH2, QUADSPI1_CLK, LPUART1_RX and SAI1_MCLK_A, and additional functions ADC1_IN4, COMP2_INP, OPAMP1_VINM/OPAMP1_VINP and OPAMP5_VINM. |+| 18 | PA4 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM3_CH2, SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK and SAI1_FS_B, and additional functions ADC2_IN17, DAC1_OUT1 and COMP1_INM. |+| 19 | PA5 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM2_CH1, TIM2_ETR, SPI1_SCK and UCPD1_FRSTX, and additional functions ADC2_IN13, DAC1_OUT2, COMP2_INM and OPAMP2_VINM. |+| 20 | PA6 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM16_CH1, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM1_BKIN, COMP1_OUT, QUADSPI1_BK1_IO3 and LPUART1_CTS, and additional functions ADC2_IN3, DAC2_OUT1 and OPAMP2_VOUT. |+| 21 | PA7 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM17_CH1, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM1_CH1N, COMP2_OUT, QUADSPI1_BK1_IO2 and UCPD1_FRSTX, and additional functions ADC2_IN4, COMP2_INP, OPAMP1_VINP and OPAMP2_VINP. |+| 22 | PC4 | bidirectional | FT_fa I/O (Fm+ capable, analog switch supplied by VDDA) with alternates TIM1_ETR, I2C2_SCL, USART1_TX and QUADSPI1_BK2_IO3, and additional function ADC2_IN5. |+| 23 | PC5 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM15_BKIN, SAI1_D3, TIM1_CH4N, USART1_RX and HRTIM1_EEV10, and additional functions ADC2_IN11, OPAMP1_VINM, OPAMP2_VINM and WKUP5. |+| 24 | PB0 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM3_CH3, TIM8_CH2N, TIM1_CH2N, QUADSPI1_BK1_IO1, HRTIM1_FLT5 and UCPD1_FRSTX, and additional functions ADC3_IN12/ADC1_IN15, COMP4_INP, OPAMP2_VINP and OPAMP3_VINP. |+| 25 | PB1 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM3_CH4, TIM8_CH3N, TIM1_CH3N, COMP4_OUT, QUADSPI1_BK1_IO0, LPUART1_RTS_DE and HRTIM1_SCOUT, and additional functions ADC3_IN1/ADC1_IN12, COMP1_INP, OPAMP3_VOUT and OPAMP6_VINM. |+| 26 | PB2 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates RTC_OUT2, LPTIM1_OUT, TIM5_CH1, TIM20_CH1, I2C3_SMBA, QUADSPI1_BK2_IO1 and HRTIM1_SCIN, and additional functions ADC2_IN12, COMP4_INM and OPAMP3_VINM. |+| 27 | VSSA | power_in | Analog ground pin for the ADC, DAC, OPAMP, COMP and VREFBUF blocks, which must be connected to the external ground. |+| 28 | VREF+ | power_in | Positive voltage reference input/output for the ADC and DAC (listed with VREFBUF_OUT); VREF+ can be internally connected to VDDA depending on the package, and VREF+ must not exceed VDDA by more than 0.4 V. |+| 29 | VDDA | power_in | Analog supply: 1.62 V minimum for the ADC, 1.8 V minimum for DAC, OPAMP and COMP, 2.4 V minimum when VREFBUF is used, up to 3.6 V. |+| 30 | PE7 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM1_ETR, FMC_D4 and SAI1_SD_B, and additional functions ADC3_IN4 and COMP4_INP. |+| 31 | PE8 | bidirectional | FT_a I/O (analog switch supplied by VDDA) with alternates TIM5_CH3, TIM1_CH1N, FMC_D5 and SAI1_SCK_B, and additional functions ADC345_IN6 and COMP4_INM. |+| 32 | PE9 | bidirectional | FT_a I/O (analog switch supplied by VDDA) with alternates TIM5_CH4, TIM1_CH1, FMC_D6 and SAI1_FS_B, and additional function ADC3_IN2. |+| 33 | PE10 | bidirectional | FT_a I/O (analog switch supplied by VDDA) with alternates TIM1_CH2N, QUADSPI1_CLK, FMC_D7 and SAI1_MCLK_B, and additional function ADC345_IN14. |+| 34 | PE11 | bidirectional | FT_a I/O (analog switch supplied by VDDA) with alternates TIM1_CH2, SPI4_NSS, QUADSPI1_BK1_NCS and FMC_D8, and additional function ADC345_IN15. |+| 35 | PE12 | bidirectional | FT_a I/O (analog switch supplied by VDDA) with alternates TIM1_CH3N, SPI4_SCK, QUADSPI1_BK1_IO0 and FMC_D9, and additional function ADC345_IN16. |+| 36 | PE13 | bidirectional | FT_a I/O (analog switch supplied by VDDA) with alternates TIM1_CH3, SPI4_MISO, QUADSPI1_BK1_IO1 and FMC_D10, and additional function ADC3_IN3. |+| 37 | PE14 | bidirectional | FT_a I/O (analog switch supplied by VDDA) with alternates TIM1_CH4, SPI4_MOSI, TIM1_BKIN2, QUADSPI1_BK1_IO2 and FMC_D11, and additional function ADC4_IN1. |+| 38 | PE15 | bidirectional | FT_a I/O (analog switch supplied by VDDA) with alternates TIM1_BKIN, TIM1_CH4N, USART3_RX, QUADSPI1_BK1_IO3 and FMC_D12, and additional function ADC4_IN2. |+| 39 | PB10 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM2_CH3, USART3_TX, LPUART1_RX, QUADSPI1_CLK, TIM1_BKIN, HRTIM1_FLT3 and SAI1_SCK_A, and additional functions COMP5_INM, OPAMP3_VINM and OPAMP4_VINM. |+| 40 | VSS | power_in | Ground pin; all VSS pins must be connected to the external ground within the permitted range. |+| 41 | VDD | power_in | Main digital supply pin; the device operating range is 1.71 V to 3.6 V and each VDD/VSS pair must be decoupled with ceramic capacitors. |+| 42 | PB11 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM2_CH4, USART3_RX, LPUART1_TX, QUADSPI1_BK1_NCS and HRTIM1_FLT4, and additional functions ADC12_IN14, COMP6_INP, OPAMP4_VINP and OPAMP6_VOUT. |+| 43 | PB12 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM5_ETR, I2C2_SMBA, SPI2_NSS/I2S2_WS, TIM1_BKIN, USART3_CK, LPUART1_RTS_DE, FDCAN2_RX and HRTIM1_CHC1, and additional functions ADC4_IN3/ADC1_IN11, COMP7_INM, OPAMP4_VOUT and OPAMP6_VINP. |+| 44 | PB13 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates SPI2_SCK/I2S2_CK, TIM1_CH1N, USART3_CTS, LPUART1_CTS, FDCAN2_TX and HRTIM1_CHC2, and additional functions ADC3_IN5, COMP5_INP, OPAMP3_VINP, OPAMP4_VINP and OPAMP6_VINP. |+| 45 | PB14 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM15_CH1, SPI2_MISO, TIM1_CH2N, USART3_RTS_DE, COMP4_OUT and HRTIM1_CHD1, and additional functions ADC4_IN4/ADC1_IN5, COMP7_INP, OPAMP2_VINP and OPAMP5_VINP. |+| 46 | PB15 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates RTC_REFIN, TIM15_CH2, TIM15_CH1N, COMP3_OUT, TIM1_CH3N, SPI2_MOSI/I2S2_SD and HRTIM1_CHD2, and additional functions ADC4_IN5/ADC2_IN15, COMP6_INM and OPAMP5_VINM. |+| 47 | PD8 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates USART3_TX and FMC_D13, and additional functions ADC4_IN12/ADC5_IN12 and OPAMP4_VINM. |+| 48 | PD9 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates USART3_RX and FMC_D14, and additional functions ADC4_IN13/ADC5_IN13 and OPAMP6_VINP. |+| 49 | PD10 | bidirectional | FT_a I/O (analog switch supplied by VDDA) with alternates USART3_CK and FMC_D15, and additional functions ADC345_IN7 and COMP6_INM. |+| 50 | VSS | power_in | Ground pin; all VSS pins must be connected to the external ground within the permitted range. |+| 51 | VDD | power_in | Main digital supply pin; the device operating range is 1.71 V to 3.6 V and each VDD/VSS pair must be decoupled with ceramic capacitors. |+| 52 | PC6 | bidirectional | FT_f I/O (Fm+ capable) with alternates TIM3_CH1, HRTIM1_EEV10, TIM8_CH1, I2S2_MCK, COMP6_OUT, I2C4_SCL and HRTIM1_CHF1. |+| 53 | PC7 | bidirectional | FT_f I/O (Fm+ capable) with alternates TIM3_CH2, HRTIM1_FLT5, TIM8_CH2, I2S3_MCK, COMP5_OUT, I2C4_SDA and HRTIM1_CHF2. |+| 54 | PC8 | bidirectional | FT_f I/O (Fm+ capable) with alternates TIM3_CH3, HRTIM1_CHE1, TIM8_CH3, TIM20_CH3, COMP7_OUT and I2C3_SCL. |+| 55 | PC9 | bidirectional | FT_f I/O (Fm+ capable) with alternates TIM3_CH4, HRTIM1_CHE2, TIM8_CH4, I2SCKIN, TIM8_BKIN2 and I2C3_SDA. |+| 56 | PA8 | bidirectional | FT_a I/O (analog switch supplied by VDDA) with alternates MCO, I2C3_SCL, I2C2_SDA, I2S2_MCK, TIM1_CH1, USART1_CK, COMP7_OUT, TIM4_ETR, FDCAN3_RX, SAI1_CK2, HRTIM1_CHA1 and SAI1_SCK_A, and additional functions ADC5_IN1 and OPAMP5_VOUT. |+| 57 | PA9 | bidirectional | FT_fda I/O (Fm+ capable, analog switch supplied by VDDA, USB Type-C dead-battery function) with alternates I2C3_SMBA, I2C2_SCL, I2S3_MCK, TIM1_CH2, USART1_TX, OMP5_OUT (as printed), TIM15_BKIN, TIM2_CH3, HRTIM1_CHA2 and SAI1_FS_A, and additional functions ADC5_IN2 and UCPD1_DBCC1. |+| 58 | PA10 | bidirectional | FT_fda I/O (Fm+ capable, analog switch supplied by VDDA, USB Type-C dead-battery function) with alternates TIM17_BKIN, USB_CRS_SYNC, I2C2_SMBA, SPI2_MISO, TIM1_CH3, USART1_RX, COMP6_OUT, TIM2_CH4, TIM8_BKIN, SAI1_D1, HRTIM1_CHB1 and SAI1_SD_A, and additional function UCPD1_DBCC2. |+| 59 | PA11 | bidirectional | FT_u I/O (USB function) with alternates SPI2_MOSI/I2S2_SD, TIM1_CH1N, USART1_CTS, COMP1_OUT, FDCAN1_RX, TIM4_CH1, TIM1_CH4, TIM1_BKIN2 and HRTIM1_CHB2, and additional function USB_DM. |+| 60 | PA12 | bidirectional | FT_u I/O (USB function) with alternates TIM16_CH1, I2SCKIN, TIM1_CH2N, USART1_RTS_DE, COMP2_OUT, FDCAN1_TX, TIM4_CH2, TIM1_ETR and HRTIM1_FLT1, and additional function USB_DP. |+| 61 | VSS | power_in | Ground pin; all VSS pins must be connected to the external ground within the permitted range. |+| 62 | VDD | power_in | Main digital supply pin; the device operating range is 1.71 V to 3.6 V and each VDD/VSS pair must be decoupled with ceramic capacitors. |+| 63 | PA13 | bidirectional | FT_f I/O (Fm+ capable) that after reset is the SWDIO/JTMS debug function with an internal pull-up enabled (footnote 4), with alternates TIM16_CH1N, I2C4_SCL, I2C1_SCL, IR_OUT, USART3_CTS, TIM4_CH3 and SAI1_SD_B. |+| 64 | PA14 | bidirectional | FT_f I/O (Fm+ capable) that after reset is the SWCLK/JTCK debug function with an internal pull-down enabled (footnote 4), with alternates LPTIM1_OUT, I2C4_SMBA, I2C1_SDA, TIM8_CH2, TIM1_BKIN, USART2_TX and SAI1_FS_B. |+| 65 | PA15 | bidirectional | FT_f I/O (Fm+ capable) that after reset is the JTDI debug function with an internal pull-up enabled (footnote 4), with alternates TIM2_CH1, TIM8_CH1, I2C1_SCL, SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_RX, UART4_RTS_DE, TIM1_BKIN, FDCAN3_TX, HRTIM1_FLT2 and TIM2_ETR. |+| 66 | PC10 | bidirectional | FT I/O with alternates TIM8_CH1N, UART4_TX, SPI3_SCK/I2S3_CK, USART3_TX and HRTIM1_FLT6. |+| 67 | PC11 | bidirectional | FT_f I/O (Fm+ capable) with alternates HRTIM1_EEV2, TIM8_CH2N, UART4_RX, SPI3_MISO, USART3_RX and I2C3_SDA. |+| 68 | PC12 | bidirectional | FT I/O with alternates TIM5_CH2, HRTIM1_EEV1, TIM8_CH3N, UART5_TX, SPI3_MOSI/I2S3_SD, USART3_CK and UCPD1_FRSTX. |+| 69 | PD0 | bidirectional | FT I/O with alternates TIM8_CH4N, FDCAN1_RX and FMC_D2. |+| 70 | PD1 | bidirectional | FT I/O with alternates TIM8_CH4, TIM8_BKIN2, FDCAN1_TX and FMC_D3. |+| 71 | PD2 | bidirectional | FT I/O with alternates TIM3_ETR, TIM8_BKIN and UART5_RX. |+| 72 | PB3 | bidirectional | FT I/O that after reset is the JTDO/TRACESWO debug function (footnote 4), with alternates TIM2_CH2, TIM4_ETR, UCPD1_CRS_SYNC, TIM8_CH1N, SPI1_SCK, SPI3_SCK/I2S3_CK, USART2_TX, TIM3_ETR, FDCAN3_RX, HRTIM1_SCOUT, HRTIM1_EEV9 and SAI1_SCK_B. |+| 73 | PB4 | bidirectional | FT_c I/O (USB Type-C PD capable) that after reset is the JTRST debug function with an internal pull-up enabled (footnote 4), with alternates TIM16_CH1, TIM3_CH1, TIM8_CH2N, SPI1_MISO, SPI3_MISO, USART2_RX, UART5_RTS_DE, TIM17_BKIN, FDCAN3_TX, HRTIM1_EEV7 and SAI1_MCLK_B, and additional function UCPD1_CC2. |+| 74 | PB5 | bidirectional | FT_f I/O (Fm+ capable) with alternates TIM16_BKIN, TIM3_CH2, TIM8_CH3N, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI/I2S3_SD, USART2_CK, I2C3_SDA, FDCAN2_RX, TIM17_CH1, LPTIM1_IN1, SAI1_SD_B, HRTIM1_EEV6 and UART5_CTS. |+| 75 | PB6 | bidirectional | FT_c I/O (USB Type-C PD capable) with alternates TIM16_CH1N, TIM4_CH1, TIM8_CH1, TIM8_ETR, USART1_TX, COMP4_OUT, FDCAN2_TX, TIM8_BKIN2, LPTIM1_ETR, HRTIM1_SCIN, HRTIM1_EEV4 and SAI1_FS_B, and additional function UCPD1_CC1. |+| 76 | PB7 | bidirectional | FT_f I/O (Fm+ capable) with alternates TIM17_CH1N, TIM4_CH2, I2C4_SDA, I2C1_SDA, TIM8_BKIN, USART1_RX, COMP3_OUT, TIM3_CH4, LPTIM1_IN2, FMC_NL, HRTIM1_EEV3 and UART4_CTS, and additional function PVD_IN. |+| 77 | PB8-BOOT0 | bidirectional | FT_f I/O (Fm+ capable) that also carries the BOOT0 function; per footnote 5 it should be set to a non-analog mode after startup if left unconnected to limit consumption, with alternates TIM16_CH1, TIM4_CH3, SAI1_CK1, I2C1_SCL, USART3_RX, COMP1_OUT, FDCAN1_RX, TIM8_CH2, TIM1_BKIN, HRTIM1_EEV8 and SAI1_MCLK_A. |+| 78 | PB9 | bidirectional | FT_f I/O (Fm+ capable) with alternates TIM17_CH1, TIM4_CH4, SAI1_D2, I2C1_SDA, IR_OUT, USART3_TX, COMP2_OUT, FDCAN1_TX, TIM8_CH3, TIM1_CH3N, HRTIM1_EEV5 and SAI1_FS_A. |+| 79 | VSS | power_in | Ground pin; all VSS pins must be connected to the external ground within the permitted range. |+| 80 | VDD | power_in | Main digital supply pin; the device operating range is 1.71 V to 3.6 V and each VDD/VSS pair must be decoupled with ceramic capacitors. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-80(12x12) |+| Category | Embedded Processors & Controllers |+| Pins | 80 |++## CAD (KiCad official)++- Symbol: `STM32G474MET6`+- Footprint: `Package_QFP:LQFP-80_12x12mm_P0.5mm`+- 3D model: LQFP-80(12x12) (KiCad packages3D, STEP)+- 3D model files: `stm32g474met6-etched.step` / `stm32g474met6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32g474met6.step` / `stm32g474met6.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8581973266085400576) (236 pp, sha256 `d493fe0ab22e61ff`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32g474met6-datasheet.pdf)
page.jsonadded+631@@ -0,0 +1,631 @@+{+ "slug": "stm32g474met6",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-80(12x12). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32g474met6",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32g474met6.kicad_sym",+ "stm32g474met6.kicad_mod",+ "stm32g474met6.glb",+ "stm32g474met6.step",+ "stm32g474met6.lbr",+ "docs/hero.png",+ "docs/stm32g474met6-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm32g474met6-hero.glb",+ "stm32g474met6-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM32G474MET6",+ "manufacturer": "STMicroelectronics",+ "package": "LQFP-80(12x12)",+ "pin_count": 80,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8581973266085400576",+ "parts": {+ "symbol": "stm32g474met6.kicad_sym",+ "footprint": "stm32g474met6.kicad_mod",+ "model_3d": "stm32g474met6-hero.glb",+ "model_3d_plain": "stm32g474met6.glb",+ "model_3d_step": "stm32g474met6-etched.step",+ "model_3d_step_plain": "stm32g474met6.step",+ "lbr": "stm32g474met6.lbr"+ },+ "distributor_links": {+ "lcsc": "C730126",+ "digikey": "STM32G474MET6-ND",+ "mouser": "511-STM32G474MET6"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T00:42:44Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "STM32G474MET6-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32G474MET6",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VBAT",+ "type": "power_in",+ "description": "Backup-domain supply for the RTC and backup registers, specified from 1.55 V to 3.6 V."+ },+ {+ "number": "2",+ "name": "PC13",+ "type": "bidirectional",+ "description": "FT (5 V tolerant) GPIO with RTC/tamper functions WKUP2, RTC_TAMP1, RTC_TS and RTC_OUT1; it is supplied through the power switch, which sinks only 3 mA, so output use is limited to 2 MHz with 30 pF and it must not drive LEDs or act as a current source."+ },+ {+ "number": "3",+ "name": "PC14-OSC32_IN",+ "type": "bidirectional",+ "description": "FT (5 V tolerant) GPIO that serves as the 32 kHz oscillator input OSC32_IN, with the same power-switch current limit as PC13."+ },+ {+ "number": "4",+ "name": "PC15-OSC32_OUT",+ "type": "bidirectional",+ "description": "FT (5 V tolerant) GPIO that serves as the 32 kHz oscillator output OSC32_OUT, with the same power-switch current limit as PC13."+ },+ {+ "number": "5",+ "name": "PF0-OSC_IN",+ "type": "bidirectional",+ "description": "FT_fa I/O (Fm+ capable, analog switch supplied by VDDA) that serves as the main oscillator input OSC_IN, with alternates I2C2_SDA, SPI2_NSS/I2S2_WS, TIM1_CH3N and ADC1_IN10."+ },+ {+ "number": "6",+ "name": "PF1-OSC_OUT",+ "type": "bidirectional",+ "description": "FT_a I/O (analog switch supplied by VDDA) that serves as the main oscillator output OSC_OUT, with alternate SPI2_SCK/I2S2_CK and additional functions ADC2_IN10, COMP3_INM."+ },+ {+ "number": "7",+ "name": "PG10-NRST",+ "type": "bidirectional",+ "description": "Bidirectional reset pin NRST with an embedded weak pull-up resistor, also usable as an FT I/O with alternate MCO."+ },+ {+ "number": "8",+ "name": "PC0",+ "type": "bidirectional",+ "description": "FT_a I/O (analog switch supplied by VDDA) with alternates LPTIM1_IN1, TIM1_CH1, LPUART1_RX and additional function ADC12_IN6, COMP3_INM."+ },+ {+ "number": "9",+ "name": "PC1",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates LPTIM1_OUT, TIM1_CH2, LPUART1_TX, QUADSPI1_BK2_IO0 and SAI1_SD_A, and additional functions ADC12_IN7, COMP3_INP."+ },+ {+ "number": "10",+ "name": "PC2",+ "type": "bidirectional",+ "description": "FT_a I/O (analog switch supplied by VDDA) with alternates LPTIM1_IN2, TIM1_CH3, COMP3_OUT, TIM20_CH2, QUADSPI1_BK2_IO1 and additional function ADC12_IN8."+ },+ {+ "number": "11",+ "name": "PC3",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates LPTIM1_ETR, TIM1_CH4, SAI1_D1, TIM1_BKIN2, QUADSPI1_BK2_IO2 and SAI1_SD_A, and additional functions ADC12_IN9, OPAMP5_VINP."+ },+ {+ "number": "12",+ "name": "PA0",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM2_CH1, TIM5_CH1, USART2_CTS, COMP1_OUT, TIM8_BKIN, TIM8_ETR and TIM2_ETR, and additional functions ADC12_IN1, COMP1_INM, COMP3_INP, RTC_TAMP2 and WKUP1."+ },+ {+ "number": "13",+ "name": "PA1",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates RTC_REFIN, TIM2_CH2, TIM5_CH2, USART2_RTS_DE and TIM15_CH1N, and additional functions ADC12_IN2, COMP1_INP, OPAMP1_VINP, OPAMP3_VINP and OPAMP6_VINM."+ },+ {+ "number": "14",+ "name": "PA2",+ "type": "bidirectional",+ "description": "FT_a I/O (analog switch supplied by VDDA) with alternates TIM2_CH3, TIM5_CH3, USART2_TX, COMP2_OUT, TIM15_CH1, QUADSPI1_BK1_NCS, LPUART1_TX and UCPD1_FRSTX, and additional functions ADC1_IN3, COMP2_INM, OPAMP1_VOUT and WKUP4/LSCO."+ },+ {+ "number": "15",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected to the external ground within the permitted range."+ },+ {+ "number": "16",+ "name": "VDD",+ "type": "power_in",+ "description": "Main digital supply pin; the device operating range is 1.71 V to 3.6 V and each VDD/VSS pair must be decoupled with ceramic capacitors."+ },+ {+ "number": "17",+ "name": "PA3",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM2_CH4, TIM5_CH4, SAI1_CK1, USART2_RX, TIM15_CH2, QUADSPI1_CLK, LPUART1_RX and SAI1_MCLK_A, and additional functions ADC1_IN4, COMP2_INP, OPAMP1_VINM/OPAMP1_VINP and OPAMP5_VINM."+ },+ {+ "number": "18",+ "name": "PA4",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM3_CH2, SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK and SAI1_FS_B, and additional functions ADC2_IN17, DAC1_OUT1 and COMP1_INM."+ },+ {+ "number": "19",+ "name": "PA5",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM2_CH1, TIM2_ETR, SPI1_SCK and UCPD1_FRSTX, and additional functions ADC2_IN13, DAC1_OUT2, COMP2_INM and OPAMP2_VINM."+ },+ {+ "number": "20",+ "name": "PA6",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM16_CH1, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM1_BKIN, COMP1_OUT, QUADSPI1_BK1_IO3 and LPUART1_CTS, and additional functions ADC2_IN3, DAC2_OUT1 and OPAMP2_VOUT."+ },+ {+ "number": "21",+ "name": "PA7",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM17_CH1, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM1_CH1N, COMP2_OUT, QUADSPI1_BK1_IO2 and UCPD1_FRSTX, and additional functions ADC2_IN4, COMP2_INP, OPAMP1_VINP and OPAMP2_VINP."+ },+ {+ "number": "22",+ "name": "PC4",+ "type": "bidirectional",+ "description": "FT_fa I/O (Fm+ capable, analog switch supplied by VDDA) with alternates TIM1_ETR, I2C2_SCL, USART1_TX and QUADSPI1_BK2_IO3, and additional function ADC2_IN5."+ },+ {+ "number": "23",+ "name": "PC5",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM15_BKIN, SAI1_D3, TIM1_CH4N, USART1_RX and HRTIM1_EEV10, and additional functions ADC2_IN11, OPAMP1_VINM, OPAMP2_VINM and WKUP5."+ },+ {+ "number": "24",+ "name": "PB0",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM3_CH3, TIM8_CH2N, TIM1_CH2N, QUADSPI1_BK1_IO1, HRTIM1_FLT5 and UCPD1_FRSTX, and additional functions ADC3_IN12/ADC1_IN15, COMP4_INP, OPAMP2_VINP and OPAMP3_VINP."+ },+ {+ "number": "25",+ "name": "PB1",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM3_CH4, TIM8_CH3N, TIM1_CH3N, COMP4_OUT, QUADSPI1_BK1_IO0, LPUART1_RTS_DE and HRTIM1_SCOUT, and additional functions ADC3_IN1/ADC1_IN12, COMP1_INP, OPAMP3_VOUT and OPAMP6_VINM."+ },+ {+ "number": "26",+ "name": "PB2",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates RTC_OUT2, LPTIM1_OUT, TIM5_CH1, TIM20_CH1, I2C3_SMBA, QUADSPI1_BK2_IO1 and HRTIM1_SCIN, and additional functions ADC2_IN12, COMP4_INM and OPAMP3_VINM."+ },+ {+ "number": "27",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground pin for the ADC, DAC, OPAMP, COMP and VREFBUF blocks, which must be connected to the external ground."+ },+ {+ "number": "28",+ "name": "VREF+",+ "type": "power_in",+ "description": "Positive voltage reference input/output for the ADC and DAC (listed with VREFBUF_OUT); VREF+ can be internally connected to VDDA depending on the package, and VREF+ must not exceed VDDA by more than 0.4 V."+ },+ {+ "number": "29",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog supply: 1.62 V minimum for the ADC, 1.8 V minimum for DAC, OPAMP and COMP, 2.4 V minimum when VREFBUF is used, up to 3.6 V."+ },+ {+ "number": "30",+ "name": "PE7",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM1_ETR, FMC_D4 and SAI1_SD_B, and additional functions ADC3_IN4 and COMP4_INP."+ },+ {+ "number": "31",+ "name": "PE8",+ "type": "bidirectional",+ "description": "FT_a I/O (analog switch supplied by VDDA) with alternates TIM5_CH3, TIM1_CH1N, FMC_D5 and SAI1_SCK_B, and additional functions ADC345_IN6 and COMP4_INM."+ },+ {+ "number": "32",+ "name": "PE9",+ "type": "bidirectional",+ "description": "FT_a I/O (analog switch supplied by VDDA) with alternates TIM5_CH4, TIM1_CH1, FMC_D6 and SAI1_FS_B, and additional function ADC3_IN2."+ },+ {+ "number": "33",+ "name": "PE10",+ "type": "bidirectional",+ "description": "FT_a I/O (analog switch supplied by VDDA) with alternates TIM1_CH2N, QUADSPI1_CLK, FMC_D7 and SAI1_MCLK_B, and additional function ADC345_IN14."+ },+ {+ "number": "34",+ "name": "PE11",+ "type": "bidirectional",+ "description": "FT_a I/O (analog switch supplied by VDDA) with alternates TIM1_CH2, SPI4_NSS, QUADSPI1_BK1_NCS and FMC_D8, and additional function ADC345_IN15."+ },+ {+ "number": "35",+ "name": "PE12",+ "type": "bidirectional",+ "description": "FT_a I/O (analog switch supplied by VDDA) with alternates TIM1_CH3N, SPI4_SCK, QUADSPI1_BK1_IO0 and FMC_D9, and additional function ADC345_IN16."+ },+ {+ "number": "36",+ "name": "PE13",+ "type": "bidirectional",+ "description": "FT_a I/O (analog switch supplied by VDDA) with alternates TIM1_CH3, SPI4_MISO, QUADSPI1_BK1_IO1 and FMC_D10, and additional function ADC3_IN3."+ },+ {+ "number": "37",+ "name": "PE14",+ "type": "bidirectional",+ "description": "FT_a I/O (analog switch supplied by VDDA) with alternates TIM1_CH4, SPI4_MOSI, TIM1_BKIN2, QUADSPI1_BK1_IO2 and FMC_D11, and additional function ADC4_IN1."+ },+ {+ "number": "38",+ "name": "PE15",+ "type": "bidirectional",+ "description": "FT_a I/O (analog switch supplied by VDDA) with alternates TIM1_BKIN, TIM1_CH4N, USART3_RX, QUADSPI1_BK1_IO3 and FMC_D12, and additional function ADC4_IN2."+ },+ {+ "number": "39",+ "name": "PB10",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM2_CH3, USART3_TX, LPUART1_RX, QUADSPI1_CLK, TIM1_BKIN, HRTIM1_FLT3 and SAI1_SCK_A, and additional functions COMP5_INM, OPAMP3_VINM and OPAMP4_VINM."+ },+ {+ "number": "40",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected to the external ground within the permitted range."+ },+ {+ "number": "41",+ "name": "VDD",+ "type": "power_in",+ "description": "Main digital supply pin; the device operating range is 1.71 V to 3.6 V and each VDD/VSS pair must be decoupled with ceramic capacitors."+ },+ {+ "number": "42",+ "name": "PB11",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM2_CH4, USART3_RX, LPUART1_TX, QUADSPI1_BK1_NCS and HRTIM1_FLT4, and additional functions ADC12_IN14, COMP6_INP, OPAMP4_VINP and OPAMP6_VOUT."+ },+ {+ "number": "43",+ "name": "PB12",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM5_ETR, I2C2_SMBA, SPI2_NSS/I2S2_WS, TIM1_BKIN, USART3_CK, LPUART1_RTS_DE, FDCAN2_RX and HRTIM1_CHC1, and additional functions ADC4_IN3/ADC1_IN11, COMP7_INM, OPAMP4_VOUT and OPAMP6_VINP."+ },+ {+ "number": "44",+ "name": "PB13",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates SPI2_SCK/I2S2_CK, TIM1_CH1N, USART3_CTS, LPUART1_CTS, FDCAN2_TX and HRTIM1_CHC2, and additional functions ADC3_IN5, COMP5_INP, OPAMP3_VINP, OPAMP4_VINP and OPAMP6_VINP."+ },+ {+ "number": "45",+ "name": "PB14",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates TIM15_CH1, SPI2_MISO, TIM1_CH2N, USART3_RTS_DE, COMP4_OUT and HRTIM1_CHD1, and additional functions ADC4_IN4/ADC1_IN5, COMP7_INP, OPAMP2_VINP and OPAMP5_VINP."+ },+ {+ "number": "46",+ "name": "PB15",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates RTC_REFIN, TIM15_CH2, TIM15_CH1N, COMP3_OUT, TIM1_CH3N, SPI2_MOSI/I2S2_SD and HRTIM1_CHD2, and additional functions ADC4_IN5/ADC2_IN15, COMP6_INM and OPAMP5_VINM."+ },+ {+ "number": "47",+ "name": "PD8",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates USART3_TX and FMC_D13, and additional functions ADC4_IN12/ADC5_IN12 and OPAMP4_VINM."+ },+ {+ "number": "48",+ "name": "PD9",+ "type": "bidirectional",+ "description": "TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternates USART3_RX and FMC_D14, and additional functions ADC4_IN13/ADC5_IN13 and OPAMP6_VINP."+ },+ {+ "number": "49",+ "name": "PD10",+ "type": "bidirectional",+ "description": "FT_a I/O (analog switch supplied by VDDA) with alternates USART3_CK and FMC_D15, and additional functions ADC345_IN7 and COMP6_INM."+ },+ {+ "number": "50",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected to the external ground within the permitted range."+ },+ {+ "number": "51",+ "name": "VDD",+ "type": "power_in",+ "description": "Main digital supply pin; the device operating range is 1.71 V to 3.6 V and each VDD/VSS pair must be decoupled with ceramic capacitors."+ },+ {+ "number": "52",+ "name": "PC6",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) with alternates TIM3_CH1, HRTIM1_EEV10, TIM8_CH1, I2S2_MCK, COMP6_OUT, I2C4_SCL and HRTIM1_CHF1."+ },+ {+ "number": "53",+ "name": "PC7",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) with alternates TIM3_CH2, HRTIM1_FLT5, TIM8_CH2, I2S3_MCK, COMP5_OUT, I2C4_SDA and HRTIM1_CHF2."+ },+ {+ "number": "54",+ "name": "PC8",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) with alternates TIM3_CH3, HRTIM1_CHE1, TIM8_CH3, TIM20_CH3, COMP7_OUT and I2C3_SCL."+ },+ {+ "number": "55",+ "name": "PC9",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) with alternates TIM3_CH4, HRTIM1_CHE2, TIM8_CH4, I2SCKIN, TIM8_BKIN2 and I2C3_SDA."+ },+ {+ "number": "56",+ "name": "PA8",+ "type": "bidirectional",+ "description": "FT_a I/O (analog switch supplied by VDDA) with alternates MCO, I2C3_SCL, I2C2_SDA, I2S2_MCK, TIM1_CH1, USART1_CK, COMP7_OUT, TIM4_ETR, FDCAN3_RX, SAI1_CK2, HRTIM1_CHA1 and SAI1_SCK_A, and additional functions ADC5_IN1 and OPAMP5_VOUT."+ },+ {+ "number": "57",+ "name": "PA9",+ "type": "bidirectional",+ "description": "FT_fda I/O (Fm+ capable, analog switch supplied by VDDA, USB Type-C dead-battery function) with alternates I2C3_SMBA, I2C2_SCL, I2S3_MCK, TIM1_CH2, USART1_TX, OMP5_OUT (as printed), TIM15_BKIN, TIM2_CH3, HRTIM1_CHA2 and SAI1_FS_A, and additional functions ADC5_IN2 and UCPD1_DBCC1."+ },+ {+ "number": "58",+ "name": "PA10",+ "type": "bidirectional",+ "description": "FT_fda I/O (Fm+ capable, analog switch supplied by VDDA, USB Type-C dead-battery function) with alternates TIM17_BKIN, USB_CRS_SYNC, I2C2_SMBA, SPI2_MISO, TIM1_CH3, USART1_RX, COMP6_OUT, TIM2_CH4, TIM8_BKIN, SAI1_D1, HRTIM1_CHB1 and SAI1_SD_A, and additional function UCPD1_DBCC2."+ },+ {+ "number": "59",+ "name": "PA11",+ "type": "bidirectional",+ "description": "FT_u I/O (USB function) with alternates SPI2_MOSI/I2S2_SD, TIM1_CH1N, USART1_CTS, COMP1_OUT, FDCAN1_RX, TIM4_CH1, TIM1_CH4, TIM1_BKIN2 and HRTIM1_CHB2, and additional function USB_DM."+ },+ {+ "number": "60",+ "name": "PA12",+ "type": "bidirectional",+ "description": "FT_u I/O (USB function) with alternates TIM16_CH1, I2SCKIN, TIM1_CH2N, USART1_RTS_DE, COMP2_OUT, FDCAN1_TX, TIM4_CH2, TIM1_ETR and HRTIM1_FLT1, and additional function USB_DP."+ },+ {+ "number": "61",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected to the external ground within the permitted range."+ },+ {+ "number": "62",+ "name": "VDD",+ "type": "power_in",+ "description": "Main digital supply pin; the device operating range is 1.71 V to 3.6 V and each VDD/VSS pair must be decoupled with ceramic capacitors."+ },+ {+ "number": "63",+ "name": "PA13",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) that after reset is the SWDIO/JTMS debug function with an internal pull-up enabled (footnote 4), with alternates TIM16_CH1N, I2C4_SCL, I2C1_SCL, IR_OUT, USART3_CTS, TIM4_CH3 and SAI1_SD_B."+ },+ {+ "number": "64",+ "name": "PA14",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) that after reset is the SWCLK/JTCK debug function with an internal pull-down enabled (footnote 4), with alternates LPTIM1_OUT, I2C4_SMBA, I2C1_SDA, TIM8_CH2, TIM1_BKIN, USART2_TX and SAI1_FS_B."+ },+ {+ "number": "65",+ "name": "PA15",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) that after reset is the JTDI debug function with an internal pull-up enabled (footnote 4), with alternates TIM2_CH1, TIM8_CH1, I2C1_SCL, SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_RX, UART4_RTS_DE, TIM1_BKIN, FDCAN3_TX, HRTIM1_FLT2 and TIM2_ETR."+ },+ {+ "number": "66",+ "name": "PC10",+ "type": "bidirectional",+ "description": "FT I/O with alternates TIM8_CH1N, UART4_TX, SPI3_SCK/I2S3_CK, USART3_TX and HRTIM1_FLT6."+ },+ {+ "number": "67",+ "name": "PC11",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) with alternates HRTIM1_EEV2, TIM8_CH2N, UART4_RX, SPI3_MISO, USART3_RX and I2C3_SDA."+ },+ {+ "number": "68",+ "name": "PC12",+ "type": "bidirectional",+ "description": "FT I/O with alternates TIM5_CH2, HRTIM1_EEV1, TIM8_CH3N, UART5_TX, SPI3_MOSI/I2S3_SD, USART3_CK and UCPD1_FRSTX."+ },+ {+ "number": "69",+ "name": "PD0",+ "type": "bidirectional",+ "description": "FT I/O with alternates TIM8_CH4N, FDCAN1_RX and FMC_D2."+ },+ {+ "number": "70",+ "name": "PD1",+ "type": "bidirectional",+ "description": "FT I/O with alternates TIM8_CH4, TIM8_BKIN2, FDCAN1_TX and FMC_D3."+ },+ {+ "number": "71",+ "name": "PD2",+ "type": "bidirectional",+ "description": "FT I/O with alternates TIM3_ETR, TIM8_BKIN and UART5_RX."+ },+ {+ "number": "72",+ "name": "PB3",+ "type": "bidirectional",+ "description": "FT I/O that after reset is the JTDO/TRACESWO debug function (footnote 4), with alternates TIM2_CH2, TIM4_ETR, UCPD1_CRS_SYNC, TIM8_CH1N, SPI1_SCK, SPI3_SCK/I2S3_CK, USART2_TX, TIM3_ETR, FDCAN3_RX, HRTIM1_SCOUT, HRTIM1_EEV9 and SAI1_SCK_B."+ },+ {+ "number": "73",+ "name": "PB4",+ "type": "bidirectional",+ "description": "FT_c I/O (USB Type-C PD capable) that after reset is the JTRST debug function with an internal pull-up enabled (footnote 4), with alternates TIM16_CH1, TIM3_CH1, TIM8_CH2N, SPI1_MISO, SPI3_MISO, USART2_RX, UART5_RTS_DE, TIM17_BKIN, FDCAN3_TX, HRTIM1_EEV7 and SAI1_MCLK_B, and additional function UCPD1_CC2."+ },+ {+ "number": "74",+ "name": "PB5",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) with alternates TIM16_BKIN, TIM3_CH2, TIM8_CH3N, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI/I2S3_SD, USART2_CK, I2C3_SDA, FDCAN2_RX, TIM17_CH1, LPTIM1_IN1, SAI1_SD_B, HRTIM1_EEV6 and UART5_CTS."+ },+ {+ "number": "75",+ "name": "PB6",+ "type": "bidirectional",+ "description": "FT_c I/O (USB Type-C PD capable) with alternates TIM16_CH1N, TIM4_CH1, TIM8_CH1, TIM8_ETR, USART1_TX, COMP4_OUT, FDCAN2_TX, TIM8_BKIN2, LPTIM1_ETR, HRTIM1_SCIN, HRTIM1_EEV4 and SAI1_FS_B, and additional function UCPD1_CC1."+ },+ {+ "number": "76",+ "name": "PB7",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) with alternates TIM17_CH1N, TIM4_CH2, I2C4_SDA, I2C1_SDA, TIM8_BKIN, USART1_RX, COMP3_OUT, TIM3_CH4, LPTIM1_IN2, FMC_NL, HRTIM1_EEV3 and UART4_CTS, and additional function PVD_IN."+ },+ {+ "number": "77",+ "name": "PB8-BOOT0",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) that also carries the BOOT0 function; per footnote 5 it should be set to a non-analog mode after startup if left unconnected to limit consumption, with alternates TIM16_CH1, TIM4_CH3, SAI1_CK1, I2C1_SCL, USART3_RX, COMP1_OUT, FDCAN1_RX, TIM8_CH2, TIM1_BKIN, HRTIM1_EEV8 and SAI1_MCLK_A."+ },+ {+ "number": "78",+ "name": "PB9",+ "type": "bidirectional",+ "description": "FT_f I/O (Fm+ capable) with alternates TIM17_CH1, TIM4_CH4, SAI1_D2, I2C1_SDA, IR_OUT, USART3_TX, COMP2_OUT, FDCAN1_TX, TIM8_CH3, TIM1_CH3N, HRTIM1_EEV5 and SAI1_FS_A."+ },+ {+ "number": "79",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected to the external ground within the permitted range."+ },+ {+ "number": "80",+ "name": "VDD",+ "type": "power_in",+ "description": "Main digital supply pin; the device operating range is 1.71 V to 3.6 V and each VDD/VSS pair must be decoupled with ceramic capacitors."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin numbers for LQFP80 were taken from the LQFP80 column of Table 12 (pin definition), not from Figu; Pins PA9 and PA10 are printed as FT_fda (the text extraction shows FT_fd a). Table 11 defines the _d; The PA9 alternate-function list prints 'OMP5_OUT'. This is most likely a typo for COMP5_OUT, but the"+ ],+ "pages_sent": 89,+ "cost_usd": 0.447,+ "at": "2026-10-08T00:42:12"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8581973266085400576",+ "pages": 236,+ "sha256": "d493fe0ab22e61ff",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 80,+ "described": 80,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm32g474met6.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 14,+ 14,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f782bdbc6327d920be33e2b9906695d7c3690117933775c3f145eac71f2013ac",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm32g474met6-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 14,+ 14,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "84f0cb9601a7573278586a72579c079ee401a0a77fdb8b7af858ca061991c493",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}