STM32G030K6T6TR

@@ -0,0 +1,86 @@+# STM32G030K6T6TR++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)++STM32G030K6T6TR from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PB9 | bidirectional | General-purpose I/O port B, bit 9. 5 V-tolerant, Fm+ capable (FT_f). Alt: IR_OUT, TIM17_CH1, SPI2_NSS, I2C1_SDA, EVENTOUT. |+| 2 | PC14-OSC32_IN | bidirectional | GPIO PC14, secondary function LSE 32.768 kHz crystal oscillator input (OSC32_IN). RTC-domain-supplied through the power switch; limited output drive (max 3 mA, <=2 MHz, 30 pF). |+| 3 | PC15-OSC32_OUT | bidirectional | GPIO PC15, secondary function LSE 32.768 kHz crystal oscillator output (OSC32_OUT). RTC-domain-supplied, limited drive (3 mA, <=2 MHz). |+| 4 | VDD/VDDA | power_in | Positive supply, 2.0-3.6 V. Digital VDD and analog VDDA are bonded together internally in this package; decouple with 100 nF near the pin plus a 4.7 uF bulk cap. |+| 5 | VSS/VSSA | power_in | Ground reference for digital (VSS) and analog (VSSA) supplies, bonded internally in the LQFP32 package. |+| 6 | NRST | bidirectional | Bidirectional device reset input/open-drain output, active low. Internal pull-up; drive low >20 us to reset. 5 V-tolerant (FT). |+| 7 | PA0 | bidirectional | GPIO PA0, 5 V-tolerant with analog switch (FT_a). Alt: SPI2_SCK, USART2_CTS. Additional: ADC_IN0, TAMP_IN2, WKUP1. |+| 8 | PA1 | bidirectional | GPIO PA1, FT_ea (5 V-tolerant, analog switch, switchable diode to VDD). Alt: SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, I2C1_SMBA, EVENTOUT. Additional: ADC_IN1. |+| 9 | PA2 | bidirectional | GPIO PA2, FT_a. Alt: SPI1_MOSI/I2S1_SD, USART2_TX. Additional: ADC_IN2, WKUP4, LSCO. |+| 10 | PA3 | bidirectional | GPIO PA3, FT_ea. Alt: SPI2_MISO, USART2_RX, EVENTOUT. Additional: ADC_IN3. |+| 11 | PA4 | bidirectional | GPIO PA4, FT_a. Alt: SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1, EVENTOUT. Additional: ADC_IN4, TAMP_IN1, RTC_TS, RTC_OUT1, WKUP2. |+| 12 | PA5 | bidirectional | GPIO PA5, FT_ea. Alt: SPI1_SCK/I2S1_CK, EVENTOUT. Additional: ADC_IN5. |+| 13 | PA6 | bidirectional | GPIO PA6, FT_ea. Alt: SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1. Additional: ADC_IN6. |+| 14 | PA7 | bidirectional | GPIO PA7, FT_a. Alt: SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1. Additional: ADC_IN7. |+| 15 | PB0 | bidirectional | GPIO PB0, FT_ea. Alt: SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N. Additional: ADC_IN8. |+| 16 | PB1 | bidirectional | GPIO PB1, FT_ea. Alt: TIM14_CH1, TIM3_CH4, TIM1_CH3N, EVENTOUT. Additional: ADC_IN9. |+| 17 | PB2 | bidirectional | GPIO PB2, FT_ea. Alt: SPI2_MISO, EVENTOUT. Additional: ADC_IN10. |+| 18 | PA8 | bidirectional | GPIO PA8, 5 V-tolerant (FT). Alt: MCO, SPI2_NSS, TIM1_CH1, EVENTOUT. |+| 19 | PA9 | bidirectional | GPIO PA9, FT_f (Fm+ capable). Alt: MCO, USART1_TX, TIM1_CH2, SPI2_MISO, I2C1_SCL, EVENTOUT. |+| 20 | PC6 | bidirectional | GPIO PC6, 5 V-tolerant (FT). Alt: TIM3_CH1. |+| 21 | PA10 | bidirectional | GPIO PA10, FT_f. Alt: SPI2_MOSI, USART1_RX, TIM1_CH3, TIM17_BKIN, I2C1_SDA, EVENTOUT. |+| 22 | PA11 [PA9] | bidirectional | GPIO PA11 (remappable in place of PA9 via SYSCFG_CFGR1). FT_fa. Alt: SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BKIN2, I2C2_SCL. Additional: ADC_IN15. |+| 23 | PA12 [PA10] | bidirectional | GPIO PA12 (remappable in place of PA10 via SYSCFG_CFGR1). FT_fa. Alt: SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA. Additional: ADC_IN16. |+| 24 | PA13 | bidirectional | GPIO PA13, FT_ea. Configured as SWDIO after reset with internal pull-up. Alt: SWDIO, IR_OUT, EVENTOUT. Additional: ADC_IN17. |+| 25 | PA14-BOOT0 | bidirectional | GPIO PA14 shared with BOOT0 boot-mode selector, FT_a. Configured as SWCLK after reset with internal pull-down. Alt: SWCLK, USART2_TX, EVENTOUT. Additional: ADC_IN18, BOOT0. |+| 26 | PA15 | bidirectional | GPIO PA15, 5 V-tolerant (FT). Alt: SPI1_NSS/I2S1_WS, USART2_RX, EVENTOUT. |+| 27 | PB3 | bidirectional | GPIO PB3, 5 V-tolerant (FT). Alt: SPI1_SCK/I2S1_CK, TIM1_CH2, USART1_RTS_DE_CK, EVENTOUT. |+| 28 | PB4 | bidirectional | GPIO PB4, 5 V-tolerant (FT). Alt: SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BKIN, EVENTOUT. |+| 29 | PB5 | bidirectional | GPIO PB5, 5 V-tolerant (FT). Alt: SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, I2C1_SMBA. Additional: WKUP6. |+| 30 | PB6 | bidirectional | GPIO PB6, FT_f (Fm+ capable). Alt: USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, I2C1_SCL, EVENTOUT. |+| 31 | PB7 | bidirectional | GPIO PB7, FT_fa. Alt: USART1_RX, SPI2_MOSI, TIM17_CH1N, I2C1_SDA, EVENTOUT. Additional: ADC_IN11. |+| 32 | PB8 | bidirectional | GPIO PB8, FT_f. Alt: SPI2_SCK, TIM16_CH1, I2C1_SCL, EVENTOUT. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-32(7x7) |+| Category | MCU |+| Pins | 32 |++## Ordering variants++- `STM32G030K6T6TRK6T6`+- `STM32G030K6T6TRK8T6`+- `STM32G030K6T6TRK6T6TR`+- `STM32G030K6T6TRK8T6TR`+- `STM32G030K6T6TRC6T6`+- `STM32G030K6T6TRC8T6`+- `STM32G030K6T6TRC6T6TR`+- `STM32G030K6T6TRC8T6TR`+- `STM32G030K6T6TRF6P6`+- `STM32G030K6T6TRF8P6`+- `STM32G030K6T6TRF6P6TR`+- `STM32G030K6T6TRF8P6TR`+- `STM32G030K6T6TRJ6M6`+- `STM32G030K6T6TRJ8M6`+- `STM32G030K6T6TRJ6M6TR`+- `STM32G030K6T6TRJ8M6TR`++## CAD (KiCad official)++- Symbol: `STM32G030K6T6TR`+- Footprint: `Package_QFP:LQFP-32_7x7mm_P0.8mm`+- 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/stm32g030k6t6tr.pdf) (93 pp, sha256 `bd4d70f72b2e82c5`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32g030k6t6tr-datasheet.pdf)