STM32G030C8T6

@@ -0,0 +1,92 @@+# STM32G030C8T6++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)++STM32G030C8T6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PC13 | bidirectional | General-purpose I/O PC13 (5 V tolerant, FT). Supplied through the RTC-domain power switch (3 mA limit). Alternate: TIM1_BKIN. Additional: TAMP_IN1, RTC_TS, RTC_OUT1, WKUP2. |+| 2 | PC14-OSC32_IN | bidirectional | PC14 GPIO / LSE 32.768 kHz crystal input (OSC32_IN). 5 V tolerant. Alt: TIM1_BK2. Additional: OSC32_IN. Supplied through RTC-domain power switch (3 mA limit). |+| 3 | PC15-OSC32_OUT | bidirectional | PC15 GPIO / LSE 32.768 kHz crystal output (OSC32_OUT). 5 V tolerant. Alt: OSC32_EN, OSC_EN. Additional: OSC32_OUT. Supplied through RTC-domain power switch (3 mA limit). |+| 4 | VBAT | power_in | Backup battery supply (1.55-3.6 V) for RTC and backup registers when VDD is off. |+| 5 | VREF+ | power_in | ADC positive reference voltage input. Tie to VDDA if external reference is not used. |+| 6 | VDD/VDDA | power_in | Main digital and analog supply, 2.0 V to 3.6 V. VDD and VDDA are bonded together on this package. |+| 7 | VSS/VSSA | power_in | Ground for both digital (VSS) and analog (VSSA) domains, bonded on this package. |+| 8 | PF0-OSC_IN | bidirectional | PF0 GPIO / HSE crystal input (OSC_IN, 4-48 MHz). 5 V tolerant. Alt: TIM14_CH1. Additional: OSC_IN. |+| 9 | PF1-OSC_OUT | bidirectional | PF1 GPIO / HSE crystal output (OSC_OUT). 5 V tolerant. Alt: OSC_EN. Additional: OSC_OUT. |+| 10 | NRST | bidirectional | Active-low bidirectional reset pin with internal weak pull-up (RST type). Drive low to reset the MCU; asserted by internal reset sources. |+| 11 | PA0 | bidirectional | GPIO PA0, 5 V tolerant with analog switch (FT_a). Alt: SPI2_SCK, USART2_CTS. Additional: ADC_IN0, TAMP_IN2, WKUP1. |+| 12 | PA1 | bidirectional | GPIO PA1, 5 V tolerant with analog switch and diode-to-VDD (FT_ea). Alt: SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, I2C1_SMBA, EVENTOUT. Additional: ADC_IN1. |+| 13 | PA2 | bidirectional | GPIO PA2, 5 V tolerant with analog switch (FT_a). Alt: SPI1_MOSI/I2S1_SD, USART2_TX. Additional: ADC_IN2, WKUP4, LSCO. |+| 14 | PA3 | bidirectional | GPIO PA3, 5 V tolerant, FT_ea. Alt: SPI2_MISO, USART2_RX, EVENTOUT. Additional: ADC_IN3. |+| 15 | PA4 | bidirectional | GPIO PA4, 5 V tolerant, FT_a. Alt: SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1, EVENTOUT. Additional: ADC_IN4, TAMP_IN1, RTC_TS, RTC_OUT1, WKUP2. |+| 16 | PA5 | bidirectional | GPIO PA5, 5 V tolerant, FT_ea. Alt: SPI1_SCK/I2S1_CK, EVENTOUT. Additional: ADC_IN5. |+| 17 | PA6 | bidirectional | GPIO PA6, 5 V tolerant, FT_ea. Alt: SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1. Additional: ADC_IN6. |+| 18 | PA7 | bidirectional | GPIO PA7, 5 V tolerant, FT_a. Alt: SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1. Additional: ADC_IN7. |+| 19 | PB0 | bidirectional | GPIO PB0, 5 V tolerant, FT_ea. Alt: SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N. Additional: ADC_IN8. |+| 20 | PB1 | bidirectional | GPIO PB1, 5 V tolerant, FT_ea. Alt: TIM14_CH1, TIM3_CH4, TIM1_CH3N, EVENTOUT. Additional: ADC_IN9. |+| 21 | PB2 | bidirectional | GPIO PB2, 5 V tolerant, FT_ea. Alt: SPI2_MISO, EVENTOUT. Additional: ADC_IN10. |+| 22 | PB10 | bidirectional | GPIO PB10, 5 V tolerant, Fm+ capable, with analog switch (FT_fa). Alt: SPI2_SCK, I2C2_SCL. Additional: ADC_IN11. |+| 23 | PB11 | bidirectional | GPIO PB11, FT_fa. Alt: SPI2_MOSI, I2C2_SDA. Additional: ADC_IN15. |+| 24 | PB12 | bidirectional | GPIO PB12, FT_a. Alt: SPI2_NSS, TIM1_BKIN, EVENTOUT. Additional: ADC_IN16. |+| 25 | PB13 | bidirectional | GPIO PB13, 5 V tolerant, Fm+ capable (FT_f). Alt: SPI2_SCK, TIM1_CH1N, I2C2_SCL, EVENTOUT. |+| 26 | PB14 | bidirectional | GPIO PB14, FT_f. Alt: SPI2_MISO, TIM1_CH2N, I2C2_SDA, EVENTOUT. |+| 27 | PB15 | bidirectional | GPIO PB15, 5 V tolerant (FT). Alt: SPI2_MOSI, TIM1_CH3N, EVENTOUT. Additional: RTC_REFIN. |+| 28 | PA8 | bidirectional | GPIO PA8, 5 V tolerant (FT). Alt: MCO, SPI2_NSS, TIM1_CH1, EVENTOUT. |+| 29 | PA9 | bidirectional | GPIO PA9, 5 V tolerant, Fm+ capable (FT_f). Alt: MCO, USART1_TX, TIM1_CH2, SPI2_MISO, I2C1_SCL, EVENTOUT. |+| 30 | PC6 | bidirectional | GPIO PC6, 5 V tolerant (FT). Alt: TIM3_CH1. |+| 31 | PC7 | bidirectional | GPIO PC7, 5 V tolerant (FT). Alt: TIM3_CH2. |+| 32 | PA10 | bidirectional | GPIO PA10, FT_f. Alt: SPI2_MOSI, USART1_RX, TIM1_CH3, TIM17_BKIN, I2C1_SDA, EVENTOUT. |+| 33 | PA11 [PA9] | bidirectional | GPIO PA11 (remappable to PA9 via SYSCFG_CFGR1), FT_f. Alt: SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BKIN2, I2C2_SCL. |+| 34 | PA12 [PA10] | bidirectional | GPIO PA12 (remappable to PA10 via SYSCFG_CFGR1), FT_f. Alt: SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA. |+| 35 | PA13 | bidirectional | GPIO PA13, FT_ea. Default after reset: SWDIO (Serial Wire Debug data) with internal pull-up. Alt: SWDIO, IR_OUT, EVENTOUT. Additional: ADC_IN17. |+| 36 | PA14-BOOT0 | bidirectional | GPIO PA14 / BOOT0 selection pin, FT_a. Default after reset: SWCLK with internal pull-down. Alt: SWCLK, USART2_TX, EVENTOUT. Additional: ADC_IN18, BOOT0. |+| 37 | PA15 | bidirectional | GPIO PA15, 5 V tolerant (FT). Alt: SPI1_NSS/I2S1_WS, USART2_RX, EVENTOUT. |+| 38 | PD0 | bidirectional | GPIO PD0, 5 V tolerant (FT). Alt: EVENTOUT, SPI2_NSS, TIM16_CH1. |+| 39 | PD1 | bidirectional | GPIO PD1, 5 V tolerant (FT). Alt: EVENTOUT, SPI2_SCK, TIM17_CH1. |+| 40 | PD2 | bidirectional | GPIO PD2, 5 V tolerant (FT). Alt: TIM3_ETR, TIM1_CH1N. |+| 41 | PD3 | bidirectional | GPIO PD3, 5 V tolerant (FT). Alt: USART2_CTS, SPI2_MISO, TIM1_CH2N. |+| 42 | PB3 | bidirectional | GPIO PB3, 5 V tolerant (FT). Alt: SPI1_SCK/I2S1_CK, TIM1_CH2, USART1_RTS_DE_CK, EVENTOUT. |+| 43 | PB4 | bidirectional | GPIO PB4, 5 V tolerant (FT). Alt: SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BKIN, EVENTOUT. |+| 44 | PB5 | bidirectional | GPIO PB5, 5 V tolerant (FT). Alt: SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, I2C1_SMBA. Additional: WKUP6. |+| 45 | PB6 | bidirectional | GPIO PB6, FT_f (Fm+ capable). Alt: USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, I2C1_SCL, EVENTOUT. |+| 46 | PB7 | bidirectional | GPIO PB7, FT_f. Alt: USART1_RX, SPI2_MOSI, TIM17_CH1N, I2C1_SDA, EVENTOUT. |+| 47 | PB8 | bidirectional | GPIO PB8, FT_f. Alt: SPI2_SCK, TIM16_CH1, I2C1_SCL, EVENTOUT. |+| 48 | PB9 | bidirectional | GPIO PB9, FT_f. Alt: IR_OUT, TIM17_CH1, SPI2_NSS, I2C1_SDA, EVENTOUT. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-48(7x7) |+| Category | MCU |+| Pins | 48 |++## Ordering variants++- `STM32G030C8T6C8T6`+- `STM32G030C8T6C6T6`+- `STM32G030C8T6K8T6`+- `STM32G030C8T6K6T6`+- `STM32G030C8T6F6P6`+- `STM32G030C8T6J6M6`++## CAD (KiCad official)++- Symbol: `STM32G030C8T6`+- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`+- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/stm32g030c8t6.pdf) (93 pp, sha256 `bd4d70f72b2e82c5`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32g030c8t6-datasheet.pdf)