← Commit history
README.md+143−143
@@ -8,150 +8,150 @@ STM32F777ZIT6 from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin desc  | Pin | Name | Type | Function | |---|---|---|---|-| 1 | PE2 | output | GPIO Port E pin 2, supporting alternate functions TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, ETH_MII_TXD3, FMC_A23. |-| 2 | PE3 | output | GPIO Port E pin 3, supporting alternate functions TRACED0, SAI1_SD_B, FMC_A19. |-| 3 | PE4 | output | GPIO Port E pin 4, supporting alternate functions TRACED1, SPI4_NSS, SAI1_FS_A, DFSDM1_DATIN3, FMC_A20, DCMI_D4, LCD_B0. |-| 4 | PE5 | output | GPIO Port E pin 5, supporting alternate functions TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, DFSDM1_CKIN3, FMC_A21, DCMI_D6, LCD_G0. |-| 5 | PE6 | output | GPIO Port E pin 6, supporting alternate functions TRACED3, TIM1_BKIN2, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, SAI2_MCLK_B, FMC_A22, DCMI_D7, LCD_G1. |+| 1 | PE2 | bidirectional | GPIO Port E pin 2, supporting alternate functions TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, ETH_MII_TXD3, FMC_A23. |+| 2 | PE3 | bidirectional | GPIO Port E pin 3, supporting alternate functions TRACED0, SAI1_SD_B, FMC_A19. |+| 3 | PE4 | bidirectional | GPIO Port E pin 4, supporting alternate functions TRACED1, SPI4_NSS, SAI1_FS_A, DFSDM1_DATIN3, FMC_A20, DCMI_D4, LCD_B0. |+| 4 | PE5 | bidirectional | GPIO Port E pin 5, supporting alternate functions TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, DFSDM1_CKIN3, FMC_A21, DCMI_D6, LCD_G0. |+| 5 | PE6 | bidirectional | GPIO Port E pin 6, supporting alternate functions TRACED3, TIM1_BKIN2, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, SAI2_MCLK_B, FMC_A22, DCMI_D7, LCD_G1. | | 6 | VBAT | power_in | Battery power supply pin for RTC and backup registers, requires external 100 nF capacitor. |-| 7 | PI8 | output | GPIO Port I pin 8, not bonded in this package; NC pin must be configured as output and forced to 0 to avoid extra current consumption. |-| 8 | PC13 | output | GPIO Port C pin 13 with limited drive capability (max 2 MHz, 30 pF load), supporting RTC_TAMP1, RTC_TS, RTC_OUT, WKUP4 functions. |-| 9 | PC14-OSC32_IN | output | GPIO Port C pin 14 / 32 kHz oscillator input, 5V tolerant except in oscillator mode, supporting OSC32_IN function. |-| 10 | PC15-OSC32_OUT | output | GPIO Port C pin 15 / 32 kHz oscillator output, 5V tolerant except in oscillator mode, supporting OSC32_OUT function. |-| 11 | PI9 | output | GPIO Port I pin 9, supporting alternate functions UART4_RX, CAN1_RX, FMC_D30, LCD_VSYNC. |-| 12 | PI10 | output | GPIO Port I pin 10, supporting alternate functions ETH_MII_RX_ER, FMC_D31, LCD_HSYNC. |-| 13 | PI11 | output | GPIO Port I pin 11, supporting alternate functions LCD_G6, OTG_HS_ULPI_DIR, with wakeup capability WKUP6. |-| 14 | VSS | power_in | Ground supply pin. |-| 15 | VDD | power_in | Main digital power supply pin 3.3 V, requires 100 nF decoupling capacitor. |-| 16 | PF0 | output | GPIO Port F pin 0, supporting alternate function I2C2_SDA, FMC_A0 with ADC3_IN9 channel. |-| 17 | PF1 | output | GPIO Port F pin 1, supporting alternate function I2C2_SCL, FMC_A1. |-| 18 | PF2 | output | GPIO Port F pin 2, supporting alternate function I2C2_SMBA, FMC_A2. |-| 19 | PF3 | output | GPIO Port F pin 3, supporting alternate function FMC_A3 with ADC3_IN9 channel. |-| 20 | PF4 | output | GPIO Port F pin 4, supporting alternate function FMC_A4 with ADC3_IN14 channel. |-| 21 | PF5 | output | GPIO Port F pin 5, supporting alternate function FMC_A5 with ADC3_IN15 channel. |-| 22 | VSS | power_in | Ground supply pin. |-| 23 | VDD | power_in | Main digital power supply pin 3.3 V. |-| 24 | PF6 | output | GPIO Port F pin 6, supporting alternate functions TIM10_CH1, SPI5_NSS, SAI1_SD_B, UART7_RX, QUADSPI_BK1_IO3 with ADC3_IN4 channel. |-| 25 | PF7 | output | GPIO Port F pin 7, supporting alternate functions TIM11_CH1, SPI5_SCK, SAI1_MCLK_B, UART7_TX, QUADSPI_BK1_IO2 with ADC3_IN5 channel. |-| 26 | PF8 | output | GPIO Port F pin 8, supporting alternate functions SPI5_MISO, SAI1_SCK_B, UART7_RTS, TIM13_CH1, QUADSPI_BK1_IO0 with ADC3_IN6 channel. |-| 27 | PF9 | output | GPIO Port F pin 9, supporting alternate functions SPI5_MOSI, SAI1_FS_B, UART7_CTS, TIM14_CH1, QUADSPI_BK1_IO1 with ADC3_IN7 channel. |-| 28 | PF10 | output | GPIO Port F pin 10, supporting alternate functions QUADSPI_CLK, DCMI_D11, LCD_DE with ADC3_IN8 channel. |-| 29 | PH0-OSC_IN | output | GPIO Port H pin 0 / High-speed external oscillator input, 5V tolerant except in oscillator mode, supporting OSC_IN function. |-| 30 | PH1-OSC_OUT | output | GPIO Port H pin 1 / High-speed external oscillator output, 5V tolerant except in oscillator mode, supporting OSC_OUT function. |-| 31 | NRST | bidirectional | Reset pin with weak internal pull-up resistor, must be connected to external capacitor for proper decoupling. |-| 32 | PC0 | output | GPIO Port C pin 0, supporting alternate functions DFSDM1_CKIN0, DFSDM1_DATIN4, SAI2_FS_B, OTG_HS_ULPI_STP, FMC_SDNWE, LCD_R5 with ADC123_IN10 channels. |-| 33 | PC1 | output | GPIO Port C pin 1, supporting alternate functions TRACED0, DFSDM1_DATIN0, SPI2_MOSI, SAI1_SD_A, DFSDM1_CKIN4, ETH_MDC with ADC123_IN11 and RTC_TAMP3 functions. |-| 34 | PC2 | output | GPIO Port C pin 2, supporting alternate functions DFSDM1_CKIN1, SPI2_MISO, DFSDM1_CKOUT, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0 with ADC123_IN12 channels. |-| 35 | PC3 | output | GPIO Port C pin 3, supporting alternate functions DFSDM1_DATIN1, SPI2_MOSI, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0 with ADC123_IN13 channels. |-| 36 | VDD | power_in | Main digital power supply pin 3.3 V. |-| 37 | VSS | power_in | Ground supply pin. |-| 38 | VSSA | power_in | Analog ground supply pin, must be connected to VSS through via for proper grounding. |-| 39 | VREF- | power_in | Negative reference voltage for ADC, typically connected to VSS through capacitor. |-| 40 | VREF+ | power_in | Positive reference voltage for ADC, requires 100 nF capacitor to VSSA and may optionally connect to VDDA. |-| 41 | VDDA | power_in | Analog power supply for ADC, requires separate 100 nF capacitor for filtering. |-| 42 | PA0-WKUP | output | GPIO Port A pin 0 with wakeup capability, supporting alternate functions TIM2_CH1, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, SAI2_SD_B, ETH_MII_CRS with ADC123_IN0 and WKUP1 functions. |-| 43 | PA1 | output | GPIO Port A pin 1, supporting alternate functions TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, SAI2_MCLK_B, ETH_MII_RX_CLK, LCD_R2 with ADC123_IN1 and WKUP2 functions. |-| 44 | PA2 | output | GPIO Port A pin 2, supporting alternate functions TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, SAI2_SCK_B, ETH_MDIO, LCD_R1 with ADC123_IN2 and WKUP2 functions. |-| 45 | PH2 | output | GPIO Port H pin 2, supporting alternate functions LPTIM1_IN2, QUADSPI_BK2_IO0, SAI2_SCK_B, ETH_MII_CRS, FMC_SDCKE0, LCD_R0. |-| 46 | PH3 | output | GPIO Port H pin 3, supporting alternate functions QUADSPI_BK2_IO1, SAI2_MCLK_B, ETH_MII_COL, FMC_SDNE0, LCD_R1. |-| 47 | PH4 | output | GPIO Port H pin 4, supporting alternate functions I2C2_SCL, LCD_G5, OTG_HS_ULPI_NXT, LCD_G4. |-| 48 | PH5 | output | GPIO Port H pin 5, supporting alternate functions I2C2_SDA, SPI5_NSS, FMC_SDNWE. |-| 49 | PA3 | output | GPIO Port A pin 3, supporting alternate functions TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, LCD_B2, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5 with ADC123_IN3 and WKUP2 functions. |-| 50 | VSS | power_in | Ground supply pin. |-| 51 | VDD | power_in | Main digital power supply pin 3.3 V. |-| 52 | PA4 | output | 3.3V tolerant GPIO Port A pin 4, supporting alternate functions SPI1_NSS, SPI3_NSS, USART2_CK, SPI6_NSS, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC with DAC_OUT1 and ADC124_IN4 functions. |-| 53 | PA5 | output | 3.3V tolerant GPIO Port A pin 5, supporting alternate functions TIM2_CH1, TIM8_CH1N, SPI1_SCK, SPI6_SCK, OTG_HS_ULPI_CK, LCD_R4 with DAC_OUT2 and ADC125_IN5 functions. |-| 54 | PA6 | output | GPIO Port A pin 6, supporting alternate functions TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, SPI6_MISO, TIM13_CH1, MDIOS_MDC, DCMI_PIXCLK, LCD_G2 with ADC126_IN6 channels. |-| 55 | PA7 | output | GPIO Port A pin 7, supporting alternate functions TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, SPI6_MOSI, TIM14_CH1, ETH_MII_RX_DV, FMC_SDNWE with ADC127_IN7 channels. |-| 56 | PC4 | output | GPIO Port C pin 4, supporting alternate functions DFSDM1_CKIN2, I2S1_MCK, SPDIF_RX2, ETH_MII_RXD0, FMC_SDNE0 with ADC1214_IN14 and ADC2214_IN14 channels. |-| 57 | PC5 | output | GPIO Port C pin 5, supporting alternate functions DFSDM1_DATIN2, SPDIF_RX3, ETH_MII_RXD1, FMC_SDCKE0 with ADC1215_IN15 and ADC2215_IN15 channels. |-| 58 | VDD | power_in | Main digital power supply pin 3.3 V. |-| 59 | VSS | power_in | Ground supply pin. |-| 60 | PB0 | output | GPIO Port B pin 0, supporting alternate functions TIM1_CH2N, TIM3_CH3, TIM8_CH2N, DFSDM1_CKOUT, UART4_CTS, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2, LCD_G1 with ADC18_IN8 and ADC29_IN8 channels. |-| 61 | PB1 | output | GPIO Port B pin 1, supporting alternate functions TIM1_CH3N, TIM3_CH4, TIM8_CH3N, DFSDM1_DATIN1, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3, LCD_G0 with ADC19_IN9 and ADC210_IN9 channels. |-| 62 | PB2 | output | GPIO Port B pin 2, supporting alternate functions SAI1_SD_A, SPI3_MOSI, QUADSPI_CLK, DFSDM1_CKIN1. |-| 63 | PF11 | output | GPIO Port F pin 11, supporting alternate functions SPI5_MOSI, SAI2_SD_B, FMC_SDNRAS, DCMI_D12. |-| 64 | PF12 | output | GPIO Port F pin 12, supporting alternate function FMC_A6. |-| 65 | PF13 | output | GPIO Port F pin 13, supporting alternate functions I2C4_SMBA, DFSDM1_DATIN6, FMC_A7. |-| 66 | PF14 | output | GPIO Port F pin 14, supporting alternate functions I2C4_SCL, DFSDM1_CKIN6, FMC_A8. |-| 67 | PF15 | output | GPIO Port F pin 15, supporting alternate functions I2C4_SDA, FMC_A9. |-| 68 | PG0 | output | GPIO Port G pin 0, supporting alternate function FMC_A10. |-| 69 | PG1 | output | GPIO Port G pin 1, supporting alternate function FMC_A11. |-| 70 | PE7 | output | GPIO Port E pin 7, supporting alternate functions TIM1_ETR, DFSDM1_DATIN2, UART7_RX, QUADSPI_BK2_IO0, FMC_D4. |-| 71 | PE8 | output | GPIO Port E pin 8, supporting alternate functions TIM1_CH1N, DFSDM1_CKIN2, UART7_TX, QUADSPI_BK2_IO1, FMC_D5. |-| 72 | PE9 | output | GPIO Port E pin 9, supporting alternate functions TIM1_CH1, DFSDM1_CKOUT, UART7_RTS, QUADSPI_BK2_IO2, FMC_D6. |-| 73 | PE10 | output | GPIO Port E pin 10, supporting alternate functions TIM1_CH2N, DFSDM1_DATIN4, UART7_CTS, QUADSPI_BK2_IO3, FMC_D7. |-| 74 | PE11 | output | GPIO Port E pin 11, supporting alternate functions TIM1_CH2, SPI4_NSS, DFSDM1_CKIN4, SAI2_SD_B, FMC_D8, LCD_G3. |-| 75 | PE12 | output | GPIO Port E pin 12, supporting alternate functions TIM1_CH3N, SPI4_SCK, DFSDM1_DATIN5, SAI2_SCK_B, FMC_D9, LCD_B4. |-| 76 | PE13 | output | GPIO Port E pin 13, supporting alternate functions TIM1_CH3, SPI4_MISO, DFSDM1_CKIN5, SAI2_FS_B, FMC_D10, LCD_DE. |-| 77 | PE14 | output | GPIO Port E pin 14, supporting alternate functions TIM1_CH4, SPI4_MOSI, SAI2_MCLK_B, FMC_D11, LCD_CLK. |-| 78 | PE15 | output | GPIO Port E pin 15, supporting alternate functions TIM1_BKIN, FMC_D12, LCD_R7. |-| 79 | PB10 | output | GPIO Port B pin 10, supporting alternate functions TIM2_CH3, I2C2_SCL, SPI2_SCK, DFSDM1_DATIN7, USART3_TX, QUADSPI_BK1_NCS, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4. |-| 80 | PB11 | output | GPIO Port B pin 11, supporting alternate functions TIM2_CH4, I2C2_SDA, DFSDM1_CKIN7, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN, DSI_TE, LCD_G5. |-| 81 | VCAP_1 | power_in | Internal voltage regulator output capacitor pin, requires 4.7 µF ceramic capacitor to VSS. |-| 82 | VSS | power_in | Ground supply pin. |-| 83 | VDD | power_in | Main digital power supply pin 3.3 V. |-| 84 | PH6 | output | GPIO Port H pin 6, supporting alternate functions I2C2_SMBA, SPI5_SCK, TIM12_CH1, ETH_MII_RXD2, FMC_SDNE1, DCMI_D8. |-| 85 | PH7 | output | GPIO Port H pin 7, supporting alternate functions I2C3_SCL, SPI5_MISO, ETH_MII_RXD3, FMC_SDCKE1, DCMI_D9. |-| 86 | PH8 | output | GPIO Port H pin 8, supporting alternate functions I2C3_SDA, FMC_D16, DCMI_HSYNC, LCD_R2. |-| 87 | PH9 | output | GPIO Port H pin 9, supporting alternate functions I2C3_SMBA, TIM12_CH2, FMC_D17, DCMI_D0, LCD_R3. |-| 88 | PH10 | output | GPIO Port H pin 10, supporting alternate functions TIM5_CH1, I2C4_SMBA, FMC_D18, DCMI_D1, LCD_R4. |-| 89 | PH11 | output | GPIO Port H pin 11, supporting alternate functions TIM5_CH2, I2C4_SCL, FMC_D19, DCMI_D2, LCD_R5. |-| 90 | PH12 | output | GPIO Port H pin 12, supporting alternate functions TIM5_CH3, I2C4_SDA, FMC_D20, DCMI_D3, LCD_R6. |-| 91 | PB12 | output | GPIO Port B pin 12, supporting alternate functions TIM1_BKIN, I2C2_SMBA, SPI2_NSS, DFSDM1_DATIN1, USART3_CK, UART5_RX, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0, OTG_HS_ID. |-| 92 | PB13 | output | GPIO Port B pin 13, supporting alternate functions TIM1_CH1N, SPI2_SCK, DFSDM1_CKIN1, USART3_CTS, UART5_TX, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1 with OTG_HS_VBUS function. |-| 93 | PB14 | output | GPIO Port B pin 14, supporting alternate functions TIM1_CH2N, TIM8_CH2N, USART1_TX, SPI2_MISO, DFSDM1_DATIN2, USART3_RTS, UART4_RTS, TIM12_CH1, SDMMC2_D0, OTG_HS_DM. |-| 94 | PB15 | output | GPIO Port B pin 15, supporting alternate functions RTC_REFIN, TIM1_CH3N, TIM8_CH3N, USART1_RX, SPI2_MOSI, DFSDM1_CKIN2, UART4_CTS, TIM12_CH2, SDMMC2_D1, OTG_HS_DP. |-| 95 | PD8 | output | GPIO Port D pin 8, supporting alternate functions DFSDM1_CKIN3, USART3_TX, SPDIF_RX1, FMC_D13. |-| 96 | PD9 | output | GPIO Port D pin 9, supporting alternate functions DFSDM1_DATIN3, USART3_RX, FMC_D14. |-| 97 | PD10 | output | GPIO Port D pin 10, supporting alternate functions DFSDM1_CKOUT, USART3_CK, FMC_D15, LCD_B3. |-| 98 | PD11 | output | GPIO Port D pin 11, supporting alternate functions I2C4_SMBA, USART3_CTS, QUADSPI_BK1_IO0, SAI2_SD_A, FMC_A16/FMC_CLE. |-| 99 | PD12 | output | GPIO Port D pin 12, supporting alternate functions TIM4_CH1, LPTIM1_IN1, I2C4_SCL, USART3_RTS, QUADSPI_BK1_IO1, SAI2_FS_A, FMC_A17/FMC_ALE. |-| 100 | PD13 | output | GPIO Port D pin 13, supporting alternate functions TIM4_CH2, LPTIM1_OUT, I2C4_SDA, QUADSPI_BK1_IO3, SAI2_SCK_A, FMC_A18. |-| 101 | VSS | power_in | Ground supply pin. |-| 102 | VDD | power_in | Main digital power supply pin 3.3 V. |-| 103 | PD14 | output | GPIO Port D pin 14, supporting alternate functions TIM4_CH3, UART8_CTS, FMC_D0. |-| 104 | PD15 | output | GPIO Port D pin 15, supporting alternate functions TIM4_CH4, UART8_RTS, FMC_D1. |-| 105 | PG2 | output | GPIO Port G pin 2, supporting alternate function FMC_A12. |-| 106 | PG3 | output | GPIO Port G pin 3, supporting alternate function FMC_A13. |-| 107 | PG4 | output | GPIO Port G pin 4, supporting alternate function FMC_A14/FMC_BA0. |-| 108 | PG5 | output | GPIO Port G pin 5, supporting alternate function FMC_A15/FMC_BA1. |-| 109 | PG6 | output | GPIO Port G pin 6, supporting alternate functions FMC_NE3, DCMI_D12, LCD_R7. |-| 110 | PG7 | output | GPIO Port G pin 7, supporting alternate functions SAI1_MCLK_A, USART6_CK, FMC_INT, DCMI_D13, LCD_CLK. |-| 111 | PG8 | output | GPIO Port G pin 8, supporting alternate functions SPI6_NSS, SPDIF_RX2, USART6_RTS, ETH_PPS_OUT, FMC_SDCLK, LCD_G7. |-| 112 | VSS | power_in | Ground supply pin. |-| 113 | VDDUSB | power_in | USB 3.3 V power supply pin, can be connected to VDD or separate supply, requires 100 nF capacitor. |-| 114 | PC6 | output | GPIO Port C pin 6, supporting alternate functions TIM3_CH1, TIM8_CH1, I2S2_MCK, DFSDM1_CKIN3, USART6_TX, FMC_NWAIT, SDMMC2_D6, SDMMC1_D6, DCMI_D0, LCD_HSYNC. |-| 115 | PC7 | output | GPIO Port C pin 7, supporting alternate functions TIM3_CH2, TIM8_CH2, I2S3_MCK, DFSDM1_DATIN3, USART6_RX, FMC_NE1, SDMMC2_D7, SDMMC1_D7, DCMI_D1, LCD_G6. |-| 116 | PC8 | output | GPIO Port C pin 8, supporting alternate functions TRACED1, TIM3_CH3, TIM8_CH3, UART5_RTS, USART6_CK, FMC_NE2, SDMMC1_D0, DCMI_D2. |-| 117 | PC9 | output | GPIO Port C pin 9, supporting alternate functions MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, UART5_CTS, QUADSPI_BK1_IO0, LCD_G3, SDMMC1_D1, DCMI_D3, LCD_B2. |-| 118 | PA8 | output | GPIO Port A pin 8, supporting alternate functions MCO1, TIM1_CH1, TIM8_BKIN2, I2C3_SCL, USART1_CK, OTG_FS_SOF, CAN3_RX, UART7_RX, LCD_B3, LCD_R6. |-| 119 | PA9 | output | GPIO Port A pin 9, supporting alternate functions TIM1_CH2, I2C3_SMBA, SPI2_SCK, USART1_TX, DCMI_D0, LCD_R5 with OTG_FS_VBUS function. |-| 120 | PA10 | output | GPIO Port A pin 10, supporting alternate functions TIM1_CH3, USART1_RX, LCD_B4, OTG_FS_ID, MDIOS_MDIO, DCMI_D1, LCD_B1. |-| 121 | PA11 | output | GPIO Port A pin 11, supporting alternate functions TIM1_CH4, SPI2_NSS, UART4_RX, USART1_CTS, CAN1_RX, OTG_FS_DM, LCD_R4. |-| 122 | PA12 | output | GPIO Port A pin 12, supporting alternate functions TIM1_ETR, SPI2_SCK, UART4_TX, USART1_RTS, SAI2_FS_B, CAN1_TX, OTG_FS_DP, LCD_R5. |-| 123 | PA13(JTMS-SWDIO) | output | GPIO Port A pin 13 / JTAG TMS / SWD Data I/O pin for debug, supporting JTMS-SWDIO function. |-| 124 | VCAP_2 | power_in | Internal voltage regulator output capacitor pin, requires 4.7 µF ceramic capacitor to VSS. |-| 125 | VSS | power_in | Ground supply pin. |-| 126 | VDD | power_in | Main digital power supply pin 3.3 V. |-| 127 | PD0 | output | GPIO Port D pin 0, supporting alternate functions DFSDM1_CKIN6, DFSDM1_DATIN7, UART4_RX, CAN1_RX, FMC_D2. |-| 128 | PD1 | output | GPIO Port D pin 1, supporting alternate functions DFSDM1_DATIN6, DFSDM1_CKIN7, UART4_TX, CAN1_TX, FMC_D3. |-| 129 | PD2 | output | GPIO Port D pin 2, supporting alternate functions TRACED2, TIM3_ETR, UART5_RX, SDMMC1_CMD, DCMI_D11. |-| 130 | PD3 | output | GPIO Port D pin 3, supporting alternate functions DFSDM1_CKOUT, SPI2_SCK, DFSDM1_DATIN0, USART2_CTS, FMC_CLK, DCMI_D5, LCD_G7. |-| 131 | PD4 | output | GPIO Port D pin 4, supporting alternate functions DFSDM1_CKIN0, USART2_RTS, FMC_NOE. |-| 132 | PD5 | output | GPIO Port D pin 5, supporting alternate function USART2_TX, FMC_NWE. |-| 133 | PD6 | output | GPIO Port D pin 6, supporting alternate functions DFSDM1_CKIN4, SPI3_MOSI, SAI1_SD_A, USART2_RX, DFSDM1_DATIN1, SDMMC2_CK, FMC_NWAIT, DCMI_D10, LCD_B2. |-| 134 | PD7 | output | GPIO Port D pin 7, supporting alternate functions DFSDM1_DATIN4, SPI1_MOSI, DFSDM1_CKIN1, USART2_CK, SPDIF_RX0, SDMMC2_CMD, FMC_NE1. |-| 135 | VSS | power_in | Ground supply pin. |-| 136 | VDD | power_in | Main digital power supply pin 3.3 V. |-| 137 | PC10 | output | GPIO Port C pin 10, supporting alternate functions DFSDM1_CKIN5, SPI3_SCK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDMMC1_D2, DCMI_D8, LCD_R2. |-| 138 | PC11 | output | GPIO Port C pin 11, supporting alternate functions DFSDM1_DATIN5, SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDMMC1_D3, DCMI_D4. |-| 139 | PC12 | output | GPIO Port C pin 12, supporting alternate functions TRACED3, SPI3_MOSI, USART3_CK, UART5_TX, SDMMC1_CK, DCMI_D9. |-| 140 | PA14(JTCK-SWCLK) | output | GPIO Port A pin 14 / JTAG TCK / SWD Clock pin for debug, supporting JTCK-SWCLK function. |-| 141 | PA15(JTDI) | output | GPIO Port A pin 15 / JTAG TDI pin, supporting alternate functions JTDI, TIM2_CH1, HDMI_CEC, SPI1_NSS, SPI3_NSS, SPI6_NSS, UART4_RTS, CAN3_TX, UART7_TX. |-| 142 | PB3(JTDO/TRACESWO) | output | GPIO Port B pin 3 / JTAG TDO / SWD Output pin, supporting alternate functions JTDO/TRACESWO, TIM2_CH2, SPI1_SCK, SPI3_SCK, SPI6_SCK, SDMMC2_D2, CAN3_RX, UART7_RX. |-| 143 | PB4(NJTRST) | output | GPIO Port B pin 4 / JTAG nTRST pin, supporting alternate functions NJTRST, TIM3_CH1, SPI1_MISO, SPI3_MISO, SPI2_NSS, SPI6_MISO, SDMMC2_D3, CAN3_TX, UART7_TX. |-| 144 | PB5 | output | GPIO Port B pin 5, supporting alternate functions UART5_RX, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, SPI6_MOSI, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1, DCMI_D10, LCD_G7. |+| 7 | PC13 | bidirectional | GPIO Port C pin 13 with limited drive capability (max 2 MHz, 30 pF load), supporting RTC_TAMP1, RTC_TS, RTC_OUT, WKUP4 functions. |+| 8 | PC14/OSC32_IN | bidirectional | GPIO Port C pin 14 / 32 kHz oscillator input, 5V tolerant except in oscillator mode, supporting OSC32_IN function. |+| 9 | PC15/OSC32_OUT | bidirectional | GPIO Port C pin 15 / 32 kHz oscillator output, 5V tolerant except in oscillator mode, supporting OSC32_OUT function. |+| 10 | PF0 | bidirectional | GPIO Port F pin 0, supporting alternate function I2C2_SDA, FMC_A0 with ADC3_IN9 channel. |+| 11 | PF1 | bidirectional | GPIO Port F pin 1, supporting alternate function I2C2_SCL, FMC_A1. |+| 12 | PF2 | bidirectional | GPIO Port F pin 2, supporting alternate function I2C2_SMBA, FMC_A2. |+| 13 | PF3 | bidirectional | GPIO Port F pin 3, supporting alternate function FMC_A3 with ADC3_IN9 channel. |+| 14 | PF4 | bidirectional | GPIO Port F pin 4, supporting alternate function FMC_A4 with ADC3_IN14 channel. |+| 15 | PF5 | bidirectional | GPIO Port F pin 5, supporting alternate function FMC_A5 with ADC3_IN15 channel. |+| 16 | VSS | power_in | Ground supply pin. |+| 17 | VDD | power_in | Main digital power supply pin 3.3 V. |+| 18 | PF6 | bidirectional | GPIO Port F pin 6, supporting alternate functions TIM10_CH1, SPI5_NSS, SAI1_SD_B, UART7_RX, QUADSPI_BK1_IO3 with ADC3_IN4 channel. |+| 19 | PF7 | bidirectional | GPIO Port F pin 7, supporting alternate functions TIM11_CH1, SPI5_SCK, SAI1_MCLK_B, UART7_TX, QUADSPI_BK1_IO2 with ADC3_IN5 channel. |+| 20 | PF8 | bidirectional | GPIO Port F pin 8, supporting alternate functions SPI5_MISO, SAI1_SCK_B, UART7_RTS, TIM13_CH1, QUADSPI_BK1_IO0 with ADC3_IN6 channel. |+| 21 | PF9 | bidirectional | GPIO Port F pin 9, supporting alternate functions SPI5_MOSI, SAI1_FS_B, UART7_CTS, TIM14_CH1, QUADSPI_BK1_IO1 with ADC3_IN7 channel. |+| 22 | PF10 | bidirectional | GPIO Port F pin 10, supporting alternate functions QUADSPI_CLK, DCMI_D11, LCD_DE with ADC3_IN8 channel. |+| 23 | PH0/OSC_IN | bidirectional | GPIO Port H pin 0 / High-speed external oscillator input, 5V tolerant except in oscillator mode, supporting OSC_IN function. |+| 24 | PH1/OSC_OUT | bidirectional | GPIO Port H pin 1 / High-speed external oscillator output, 5V tolerant except in oscillator mode, supporting OSC_OUT function. |+| 25 | NRST | input | Reset pin with weak internal pull-up resistor, must be connected to external capacitor for proper decoupling. |+| 26 | PC0 | bidirectional | GPIO Port C pin 0, supporting alternate functions DFSDM1_CKIN0, DFSDM1_DATIN4, SAI2_FS_B, OTG_HS_ULPI_STP, FMC_SDNWE, LCD_R5 with ADC123_IN10 channels. |+| 27 | PC1 | bidirectional | GPIO Port C pin 1, supporting alternate functions TRACED0, DFSDM1_DATIN0, SPI2_MOSI, SAI1_SD_A, DFSDM1_CKIN4, ETH_MDC with ADC123_IN11 and RTC_TAMP3 functions. |+| 28 | PC2 | bidirectional | GPIO Port C pin 2, supporting alternate functions DFSDM1_CKIN1, SPI2_MISO, DFSDM1_CKOUT, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0 with ADC123_IN12 channels. |+| 29 | PC3 | bidirectional | GPIO Port C pin 3, supporting alternate functions DFSDM1_DATIN1, SPI2_MOSI, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0 with ADC123_IN13 channels. |+| 30 | VDD | power_in | Main digital power supply pin 3.3 V. |+| 31 | VSSA | power_in | Analog ground supply pin, must be connected to VSS through via for proper grounding. |+| 32 | VREF+ | power_in | Positive reference voltage for ADC, requires 100 nF capacitor to VSSA and may optionally connect to VDDA. |+| 33 | VDDA | power_in | Analog power supply for ADC, requires separate 100 nF capacitor for filtering. |+| 34 | PA0/WKUP | bidirectional | GPIO Port A pin 0 with wakeup capability, supporting alternate functions TIM2_CH1, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, SAI2_SD_B, ETH_MII_CRS with ADC123_IN0 and WKUP1 functions. |+| 35 | PA1 | bidirectional | GPIO Port A pin 1, supporting alternate functions TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, SAI2_MCLK_B, ETH_MII_RX_CLK, LCD_R2 with ADC123_IN1 and WKUP2 functions. |+| 36 | PA2 | bidirectional | GPIO Port A pin 2, supporting alternate functions TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, SAI2_SCK_B, ETH_MDIO, LCD_R1 with ADC123_IN2 and WKUP2 functions. |+| 37 | PA3 | bidirectional | GPIO Port A pin 3, supporting alternate functions TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, LCD_B2, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5 with ADC123_IN3 and WKUP2 functions. |+| 38 | VSS | power_in | Ground supply pin. |+| 39 | VDD | power_in | Main digital power supply pin 3.3 V. |+| 40 | PA4 | bidirectional | 3.3V tolerant GPIO Port A pin 4, supporting alternate functions SPI1_NSS, SPI3_NSS, USART2_CK, SPI6_NSS, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC with DAC_OUT1 and ADC124_IN4 functions. |+| 41 | PA5 | bidirectional | 3.3V tolerant GPIO Port A pin 5, supporting alternate functions TIM2_CH1, TIM8_CH1N, SPI1_SCK, SPI6_SCK, OTG_HS_ULPI_CK, LCD_R4 with DAC_OUT2 and ADC125_IN5 functions. |+| 42 | PA6 | bidirectional | GPIO Port A pin 6, supporting alternate functions TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, SPI6_MISO, TIM13_CH1, MDIOS_MDC, DCMI_PIXCLK, LCD_G2 with ADC126_IN6 channels. |+| 43 | PA7 | bidirectional | GPIO Port A pin 7, supporting alternate functions TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, SPI6_MOSI, TIM14_CH1, ETH_MII_RX_DV, FMC_SDNWE with ADC127_IN7 channels. |+| 44 | PC4 | bidirectional | GPIO Port C pin 4, supporting alternate functions DFSDM1_CKIN2, I2S1_MCK, SPDIF_RX2, ETH_MII_RXD0, FMC_SDNE0 with ADC1214_IN14 and ADC2214_IN14 channels. |+| 45 | PC5 | bidirectional | GPIO Port C pin 5, supporting alternate functions DFSDM1_DATIN2, SPDIF_RX3, ETH_MII_RXD1, FMC_SDCKE0 with ADC1215_IN15 and ADC2215_IN15 channels. |+| 46 | PB0 | bidirectional | GPIO Port B pin 0, supporting alternate functions TIM1_CH2N, TIM3_CH3, TIM8_CH2N, DFSDM1_CKOUT, UART4_CTS, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2, LCD_G1 with ADC18_IN8 and ADC29_IN8 channels. |+| 47 | PB1 | bidirectional | GPIO Port B pin 1, supporting alternate functions TIM1_CH3N, TIM3_CH4, TIM8_CH3N, DFSDM1_DATIN1, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3, LCD_G0 with ADC19_IN9 and ADC210_IN9 channels. |+| 48 | PB2 | bidirectional | GPIO Port B pin 2, supporting alternate functions SAI1_SD_A, SPI3_MOSI, QUADSPI_CLK, DFSDM1_CKIN1. |+| 49 | PF11 | bidirectional | GPIO Port F pin 11, supporting alternate functions SPI5_MOSI, SAI2_SD_B, FMC_SDNRAS, DCMI_D12. |+| 50 | PF12 | bidirectional | GPIO Port F pin 12, supporting alternate function FMC_A6. |+| 51 | VSS | power_in | Ground supply pin. |+| 52 | VDD | power_in | Main digital power supply pin 3.3 V. |+| 53 | PF13 | bidirectional | GPIO Port F pin 13, supporting alternate functions I2C4_SMBA, DFSDM1_DATIN6, FMC_A7. |+| 54 | PF14 | bidirectional | GPIO Port F pin 14, supporting alternate functions I2C4_SCL, DFSDM1_CKIN6, FMC_A8. |+| 55 | PF15 | bidirectional | GPIO Port F pin 15, supporting alternate functions I2C4_SDA, FMC_A9. |+| 56 | PG0 | bidirectional | GPIO Port G pin 0, supporting alternate function FMC_A10. |+| 57 | PG1 | bidirectional | GPIO Port G pin 1, supporting alternate function FMC_A11. |+| 58 | PE7 | bidirectional | GPIO Port E pin 7, supporting alternate functions TIM1_ETR, DFSDM1_DATIN2, UART7_RX, QUADSPI_BK2_IO0, FMC_D4. |+| 59 | PE8 | bidirectional | GPIO Port E pin 8, supporting alternate functions TIM1_CH1N, DFSDM1_CKIN2, UART7_TX, QUADSPI_BK2_IO1, FMC_D5. |+| 60 | PE9 | bidirectional | GPIO Port E pin 9, supporting alternate functions TIM1_CH1, DFSDM1_CKOUT, UART7_RTS, QUADSPI_BK2_IO2, FMC_D6. |+| 61 | VSS | power_in | Ground supply pin. |+| 62 | VDD | power_in | Main digital power supply pin 3.3 V. |+| 63 | PE10 | bidirectional | GPIO Port E pin 10, supporting alternate functions TIM1_CH2N, DFSDM1_DATIN4, UART7_CTS, QUADSPI_BK2_IO3, FMC_D7. |+| 64 | PE11 | bidirectional | GPIO Port E pin 11, supporting alternate functions TIM1_CH2, SPI4_NSS, DFSDM1_CKIN4, SAI2_SD_B, FMC_D8, LCD_G3. |+| 65 | PE12 | bidirectional | GPIO Port E pin 12, supporting alternate functions TIM1_CH3N, SPI4_SCK, DFSDM1_DATIN5, SAI2_SCK_B, FMC_D9, LCD_B4. |+| 66 | PE13 | bidirectional | GPIO Port E pin 13, supporting alternate functions TIM1_CH3, SPI4_MISO, DFSDM1_CKIN5, SAI2_FS_B, FMC_D10, LCD_DE. |+| 67 | PE14 | bidirectional | GPIO Port E pin 14, supporting alternate functions TIM1_CH4, SPI4_MOSI, SAI2_MCLK_B, FMC_D11, LCD_CLK. |+| 68 | PE15 | bidirectional | GPIO Port E pin 15, supporting alternate functions TIM1_BKIN, FMC_D12, LCD_R7. |+| 69 | PB10 | bidirectional | GPIO Port B pin 10, supporting alternate functions TIM2_CH3, I2C2_SCL, SPI2_SCK, DFSDM1_DATIN7, USART3_TX, QUADSPI_BK1_NCS, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4. |+| 70 | PB11 | bidirectional | GPIO Port B pin 11, supporting alternate functions TIM2_CH4, I2C2_SDA, DFSDM1_CKIN7, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN, DSI_TE, LCD_G5. |+| 71 | VCAP_1 | power_in | Internal voltage regulator output capacitor pin, requires 4.7 µF ceramic capacitor to VSS. |+| 72 | VDD | power_in | Main digital power supply pin 3.3 V. |+| 73 | PB12 | bidirectional | GPIO Port B pin 12, supporting alternate functions TIM1_BKIN, I2C2_SMBA, SPI2_NSS, DFSDM1_DATIN1, USART3_CK, UART5_RX, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0, OTG_HS_ID. |+| 74 | PB13 | bidirectional | GPIO Port B pin 13, supporting alternate functions TIM1_CH1N, SPI2_SCK, DFSDM1_CKIN1, USART3_CTS, UART5_TX, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1 with OTG_HS_VBUS function. |+| 75 | PB14 | bidirectional | GPIO Port B pin 14, supporting alternate functions TIM1_CH2N, TIM8_CH2N, USART1_TX, SPI2_MISO, DFSDM1_DATIN2, USART3_RTS, UART4_RTS, TIM12_CH1, SDMMC2_D0, OTG_HS_DM. |+| 76 | PB15 | bidirectional | GPIO Port B pin 15, supporting alternate functions RTC_REFIN, TIM1_CH3N, TIM8_CH3N, USART1_RX, SPI2_MOSI, DFSDM1_CKIN2, UART4_CTS, TIM12_CH2, SDMMC2_D1, OTG_HS_DP. |+| 77 | PD8 | bidirectional | GPIO Port D pin 8, supporting alternate functions DFSDM1_CKIN3, USART3_TX, SPDIF_RX1, FMC_D13. |+| 78 | PD9 | bidirectional | GPIO Port D pin 9, supporting alternate functions DFSDM1_DATIN3, USART3_RX, FMC_D14. |+| 79 | PD10 | bidirectional | GPIO Port D pin 10, supporting alternate functions DFSDM1_CKOUT, USART3_CK, FMC_D15, LCD_B3. |+| 80 | PD11 | bidirectional | GPIO Port D pin 11, supporting alternate functions I2C4_SMBA, USART3_CTS, QUADSPI_BK1_IO0, SAI2_SD_A, FMC_A16/FMC_CLE. |+| 81 | PD12 | bidirectional | GPIO Port D pin 12, supporting alternate functions TIM4_CH1, LPTIM1_IN1, I2C4_SCL, USART3_RTS, QUADSPI_BK1_IO1, SAI2_FS_A, FMC_A17/FMC_ALE. |+| 82 | PD13 | bidirectional | GPIO Port D pin 13, supporting alternate functions TIM4_CH2, LPTIM1_OUT, I2C4_SDA, QUADSPI_BK1_IO3, SAI2_SCK_A, FMC_A18. |+| 83 | VSS | power_in | Ground supply pin. |+| 84 | VDD | power_in | Main digital power supply pin 3.3 V. |+| 85 | PD14 | bidirectional | GPIO Port D pin 14, supporting alternate functions TIM4_CH3, UART8_CTS, FMC_D0. |+| 86 | PD15 | bidirectional | GPIO Port D pin 15, supporting alternate functions TIM4_CH4, UART8_RTS, FMC_D1. |+| 87 | PG2 | bidirectional | GPIO Port G pin 2, supporting alternate function FMC_A12. |+| 88 | PG3 | bidirectional | GPIO Port G pin 3, supporting alternate function FMC_A13. |+| 89 | PG4 | bidirectional | GPIO Port G pin 4, supporting alternate function FMC_A14/FMC_BA0. |+| 90 | PG5 | bidirectional | GPIO Port G pin 5, supporting alternate function FMC_A15/FMC_BA1. |+| 91 | PG6 | bidirectional | GPIO Port G pin 6, supporting alternate functions FMC_NE3, DCMI_D12, LCD_R7. |+| 92 | PG7 | bidirectional | GPIO Port G pin 7, supporting alternate functions SAI1_MCLK_A, USART6_CK, FMC_INT, DCMI_D13, LCD_CLK. |+| 93 | PG8 | bidirectional | GPIO Port G pin 8, supporting alternate functions SPI6_NSS, SPDIF_RX2, USART6_RTS, ETH_PPS_OUT, FMC_SDCLK, LCD_G7. |+| 94 | VSS | power_in | Ground supply pin. |+| 95 | VDDUSB | power_in | USB 3.3 V power supply pin, can be connected to VDD or separate supply, requires 100 nF capacitor. |+| 96 | PC6 | bidirectional | GPIO Port C pin 6, supporting alternate functions TIM3_CH1, TIM8_CH1, I2S2_MCK, DFSDM1_CKIN3, USART6_TX, FMC_NWAIT, SDMMC2_D6, SDMMC1_D6, DCMI_D0, LCD_HSYNC. |+| 97 | PC7 | bidirectional | GPIO Port C pin 7, supporting alternate functions TIM3_CH2, TIM8_CH2, I2S3_MCK, DFSDM1_DATIN3, USART6_RX, FMC_NE1, SDMMC2_D7, SDMMC1_D7, DCMI_D1, LCD_G6. |+| 98 | PC8 | bidirectional | GPIO Port C pin 8, supporting alternate functions TRACED1, TIM3_CH3, TIM8_CH3, UART5_RTS, USART6_CK, FMC_NE2, SDMMC1_D0, DCMI_D2. |+| 99 | PC9 | bidirectional | GPIO Port C pin 9, supporting alternate functions MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, UART5_CTS, QUADSPI_BK1_IO0, LCD_G3, SDMMC1_D1, DCMI_D3, LCD_B2. |+| 100 | PA8 | bidirectional | GPIO Port A pin 8, supporting alternate functions MCO1, TIM1_CH1, TIM8_BKIN2, I2C3_SCL, USART1_CK, OTG_FS_SOF, CAN3_RX, UART7_RX, LCD_B3, LCD_R6. |+| 101 | PA9 | bidirectional | GPIO Port A pin 9, supporting alternate functions TIM1_CH2, I2C3_SMBA, SPI2_SCK, USART1_TX, DCMI_D0, LCD_R5 with OTG_FS_VBUS function. |+| 102 | PA10 | bidirectional | GPIO Port A pin 10, supporting alternate functions TIM1_CH3, USART1_RX, LCD_B4, OTG_FS_ID, MDIOS_MDIO, DCMI_D1, LCD_B1. |+| 103 | PA11 | bidirectional | GPIO Port A pin 11, supporting alternate functions TIM1_CH4, SPI2_NSS, UART4_RX, USART1_CTS, CAN1_RX, OTG_FS_DM, LCD_R4. |+| 104 | PA12 | bidirectional | GPIO Port A pin 12, supporting alternate functions TIM1_ETR, SPI2_SCK, UART4_TX, USART1_RTS, SAI2_FS_B, CAN1_TX, OTG_FS_DP, LCD_R5. |+| 105 | PA13 | bidirectional |  |+| 106 | VCAP_2 | power_in | Internal voltage regulator output capacitor pin, requires 4.7 µF ceramic capacitor to VSS. |+| 107 | VSS | power_in | Ground supply pin. |+| 108 | VDD | power_in | Main digital power supply pin 3.3 V. |+| 109 | PA14 | bidirectional |  |+| 110 | PA15 | bidirectional |  |+| 111 | PC10 | bidirectional | GPIO Port C pin 10, supporting alternate functions DFSDM1_CKIN5, SPI3_SCK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDMMC1_D2, DCMI_D8, LCD_R2. |+| 112 | PC11 | bidirectional | GPIO Port C pin 11, supporting alternate functions DFSDM1_DATIN5, SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDMMC1_D3, DCMI_D4. |+| 113 | PC12 | bidirectional | GPIO Port C pin 12, supporting alternate functions TRACED3, SPI3_MOSI, USART3_CK, UART5_TX, SDMMC1_CK, DCMI_D9. |+| 114 | PD0 | bidirectional | GPIO Port D pin 0, supporting alternate functions DFSDM1_CKIN6, DFSDM1_DATIN7, UART4_RX, CAN1_RX, FMC_D2. |+| 115 | PD1 | bidirectional | GPIO Port D pin 1, supporting alternate functions DFSDM1_DATIN6, DFSDM1_CKIN7, UART4_TX, CAN1_TX, FMC_D3. |+| 116 | PD2 | bidirectional | GPIO Port D pin 2, supporting alternate functions TRACED2, TIM3_ETR, UART5_RX, SDMMC1_CMD, DCMI_D11. |+| 117 | PD3 | bidirectional | GPIO Port D pin 3, supporting alternate functions DFSDM1_CKOUT, SPI2_SCK, DFSDM1_DATIN0, USART2_CTS, FMC_CLK, DCMI_D5, LCD_G7. |+| 118 | PD4 | bidirectional | GPIO Port D pin 4, supporting alternate functions DFSDM1_CKIN0, USART2_RTS, FMC_NOE. |+| 119 | PD5 | bidirectional | GPIO Port D pin 5, supporting alternate function USART2_TX, FMC_NWE. |+| 120 | VSS | power_in | Ground supply pin. |+| 121 | VDDSDMMC | power_in |  |+| 122 | PD6 | bidirectional | GPIO Port D pin 6, supporting alternate functions DFSDM1_CKIN4, SPI3_MOSI, SAI1_SD_A, USART2_RX, DFSDM1_DATIN1, SDMMC2_CK, FMC_NWAIT, DCMI_D10, LCD_B2. |+| 123 | PD7 | bidirectional | GPIO Port D pin 7, supporting alternate functions DFSDM1_DATIN4, SPI1_MOSI, DFSDM1_CKIN1, USART2_CK, SPDIF_RX0, SDMMC2_CMD, FMC_NE1. |+| 124 | PG9 | bidirectional |  |+| 125 | PG10 | bidirectional |  |+| 126 | PG11 | bidirectional |  |+| 127 | PG12 | bidirectional |  |+| 128 | PG13 | bidirectional |  |+| 129 | PG14 | bidirectional |  |+| 130 | VSS | power_in | Ground supply pin. |+| 131 | VDD | power_in | Main digital power supply pin 3.3 V. |+| 132 | PG15 | bidirectional |  |+| 133 | PB3 | bidirectional |  |+| 134 | PB4 | bidirectional |  |+| 135 | PB5 | bidirectional | GPIO Port B pin 5, supporting alternate functions UART5_RX, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, SPI6_MOSI, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1, DCMI_D10, LCD_G7. |+| 136 | PB6 | bidirectional |  |+| 137 | PB7 | bidirectional |  |+| 138 | BOOT0 | input |  |+| 139 | PB8 | bidirectional |  |+| 140 | PB9 | bidirectional |  |+| 141 | PE0 | bidirectional |  |+| 142 | PE1 | bidirectional |  |+| 143 | PDR_ON | input |  |+| 144 | VDD | power_in | Main digital power supply pin 3.3 V. |  ## Key specifications 
package.json+2−2
@@ -1,6 +1,6 @@ {   "slug": "stm32f777zit6",-  "version": "0.1.0",+  "version": "0.1.1",   "type": "component",   "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",   "tags": [@@ -949,4 +949,4 @@       "footprint": "viewers/footprint.html"     }   }-}\ No newline at end of file+}
page.json+4−4
@@ -4,7 +4,7 @@   "slug": "stm32f777zit6",   "title": "STM32F777ZIT6",   "brief": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",-  "version": "0.1.0",+  "version": "0.1.1",   "license": "CC-BY-SA-4.0",   "tags": [     "component",@@ -976,7 +976,7 @@     "viewers/symbol.html",     "viewers/footprint.html"   ],-  "visibility": {-    "public": true-  }+  "visibility": "public",+  "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+  "org": "adom" }\ No newline at end of file
stm32f777zit6.kicad_sym+277−277
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stm32f777zit6.lbr+295−284
@@ -50,7 +50,7 @@ <layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> </layers> <library>-<description></description>+<description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST&apos;s open pin data</description> <packages> <package name="LQFP-144_20x20mm_P0.5mm">   <description>LQFP-144, 20 x 20 mm, 0.5 mm pitch</description>@@ -224,161 +224,162 @@ </packages> <symbols> <symbol name="STM32F777ZIT6">+  <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). 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direction="io"/>+  <pin name="PG0" x="-17.78" y="-50.8" length="middle" direction="io"/>+  <pin name="PG1" x="-17.78" y="-53.34" length="middle" direction="io"/>+  <pin name="PE7" x="-17.78" y="-55.88" length="middle" direction="io"/>+  <pin name="PE8" x="-17.78" y="-58.42" length="middle" direction="io"/>+  <pin name="PE9" x="-17.78" y="-60.96" length="middle" direction="io"/>+  <pin name="VSS@4" x="-17.78" y="-63.5" length="middle" direction="pwr"/>+  <pin name="VDD@5" x="-17.78" y="-66.04" length="middle" direction="pwr"/>+  <pin name="PE10" x="-17.78" y="-68.58" length="middle" direction="io"/>+  <pin name="PE11" x="-17.78" y="-71.12" length="middle" direction="io"/>+  <pin name="PE12" x="-17.78" y="-73.66" length="middle" direction="io"/>+  <pin name="PE13" x="-17.78" y="-76.2" length="middle" direction="io"/>+  <pin name="PE14" x="-17.78" y="-78.74" length="middle" direction="io"/>+  <pin name="PE15" x="-17.78" y="-81.28" length="middle" direction="io"/>+  <pin name="PB10" x="-17.78" y="-83.82" length="middle" direction="io"/>+  <pin name="PB11" x="-17.78" y="-86.36" length="middle" direction="io"/>+  <pin name="VCAP_1" x="-17.78" y="-88.9" length="middle" direction="pwr"/>+  <pin name="VDD@6" x="-17.78" y="-91.44" length="middle" direction="pwr"/>+  <pin name="VDD@7" x="17.78" y="88.9" length="middle" direction="pwr" rot="R180"/>+  <pin name="PDR_ON" x="17.78" y="86.36" length="middle" direction="in" rot="R180"/>+  <pin name="PE1" x="17.78" y="83.82" length="middle" direction="io" rot="R180"/>+  <pin name="PE0" x="17.78" y="81.28" length="middle" direction="io" rot="R180"/>+  <pin name="PB9" x="17.78" y="78.74" length="middle" direction="io" rot="R180"/>+  <pin name="PB8" x="17.78" y="76.2" length="middle" direction="io" rot="R180"/>+  <pin name="BOOT0" x="17.78" y="73.66" length="middle" direction="in" rot="R180"/>+  <pin name="PB7" x="17.78" y="71.12" length="middle" direction="io" rot="R180"/>+  <pin name="PB6" x="17.78" y="68.58" length="middle" direction="io" rot="R180"/>+  <pin name="PB5" x="17.78" y="66.04" length="middle" direction="io" rot="R180"/>+  <pin name="PB4" x="17.78" y="63.5" length="middle" direction="io" rot="R180"/>+  <pin name="PB3" x="17.78" y="60.96" length="middle" direction="io" rot="R180"/>+  <pin name="PG15" x="17.78" y="58.42" length="middle" direction="io" rot="R180"/>+  <pin name="VDD@8" x="17.78" y="55.88" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@5" x="17.78" y="53.34" length="middle" direction="pwr" rot="R180"/>+  <pin name="PG14" x="17.78" y="50.8" length="middle" direction="io" rot="R180"/>+  <pin name="PG13" x="17.78" y="48.26" length="middle" direction="io" rot="R180"/>+  <pin name="PG12" x="17.78" y="45.72" length="middle" direction="io" rot="R180"/>+  <pin name="PG11" x="17.78" y="43.18" length="middle" direction="io" rot="R180"/>+  <pin name="PG10" x="17.78" y="40.64" length="middle" direction="io" rot="R180"/>+  <pin name="PG9" x="17.78" y="38.1" length="middle" direction="io" rot="R180"/>+  <pin name="PD7" x="17.78" y="35.56" length="middle" direction="io" rot="R180"/>+  <pin name="PD6" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+  <pin name="VDDSDMMC" x="17.78" y="30.48" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@6" x="17.78" y="27.94" length="middle" direction="pwr" rot="R180"/>+  <pin name="PD5" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+  <pin name="PD4" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+  <pin name="PD3" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+  <pin name="PD2" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+  <pin name="PD1" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>+  <pin name="PD0" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+  <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+  <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>+  <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>+  <pin name="PA15" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+  <pin name="PA14" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+  <pin name="VDD@9" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@7" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+  <pin name="VCAP_2" x="17.78" y="-7.62" length="middle" direction="pwr" rot="R180"/>+  <pin name="PA13" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+  <pin name="PA12" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+  <pin name="PA11" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+  <pin name="PA10" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+  <pin name="PA9" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+  <pin name="PA8" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+  <pin name="PC9" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+  <pin name="PC8" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+  <pin name="PC7" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+  <pin name="PC6" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+  <pin name="VDDUSB" x="17.78" y="-35.56" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@8" x="17.78" y="-38.1" length="middle" direction="pwr" rot="R180"/>+  <pin name="PG8" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+  <pin name="PG7" x="17.78" y="-43.18" length="middle" direction="io" rot="R180"/>+  <pin name="PG6" x="17.78" y="-45.72" length="middle" direction="io" rot="R180"/>+  <pin name="PG5" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>+  <pin name="PG4" x="17.78" y="-50.8" length="middle" direction="io" rot="R180"/>+  <pin name="PG3" x="17.78" y="-53.34" length="middle" direction="io" rot="R180"/>+  <pin name="PG2" x="17.78" y="-55.88" length="middle" direction="io" rot="R180"/>+  <pin name="PD15" x="17.78" y="-58.42" length="middle" direction="io" rot="R180"/>+  <pin name="PD14" x="17.78" y="-60.96" length="middle" direction="io" rot="R180"/>+  <pin name="VDD@10" x="17.78" y="-63.5" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@9" x="17.78" y="-66.04" length="middle" direction="pwr" rot="R180"/>+  <pin name="PD13" x="17.78" y="-68.58" length="middle" direction="io" rot="R180"/>+  <pin name="PD12" x="17.78" y="-71.12" length="middle" direction="io" rot="R180"/>+  <pin name="PD11" x="17.78" y="-73.66" length="middle" direction="io" rot="R180"/>+  <pin name="PD10" x="17.78" y="-76.2" length="middle" direction="io" rot="R180"/>+  <pin name="PD9" x="17.78" y="-78.74" length="middle" direction="io" rot="R180"/>+  <pin name="PD8" x="17.78" y="-81.28" length="middle" direction="io" rot="R180"/>+  <pin name="PB15" x="17.78" y="-83.82" length="middle" direction="io" rot="R180"/>+  <pin name="PB14" x="17.78" y="-86.36" length="middle" direction="io" rot="R180"/>+  <pin name="PB13" x="17.78" y="-88.9" length="middle" direction="io" rot="R180"/>+  <pin name="PB12" x="17.78" y="-91.44" length="middle" direction="io" rot="R180"/> </symbol> </symbols> <devicesets> <deviceset name="STM32F777ZIT6" prefix="U">-  <description></description>+  <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST&apos;s open pin data</description>   <gates>     <gate name="G$1" symbol="STM32F777ZIT6" x="0" y="0"/>   </gates>@@ -391,146 +392,156 @@         <connect gate="G$1" pin="PE5" pad="4"/>         <connect gate="G$1" pin="PE6" pad="5"/>         <connect gate="G$1" pin="VBAT" pad="6"/>-        <connect gate="G$1" pin="PI8" pad="7"/>-        <connect gate="G$1" pin="PC13" pad="8"/>-        <connect gate="G$1" pin="PC14-OSC32_IN" pad="9"/>-        <connect gate="G$1" pin="PC15-OSC32_OUT" pad="10"/>-        <connect gate="G$1" pin="PI9" pad="11"/>-        <connect gate="G$1" pin="PI10" pad="12"/>-        <connect gate="G$1" pin="PI11" pad="13"/>-        <connect gate="G$1" pin="VSS" pad="14"/>-        <connect gate="G$1" pin="VDD" pad="15"/>-        <connect gate="G$1" pin="PF0" pad="16"/>-        <connect gate="G$1" pin="PF1" pad="17"/>-        <connect gate="G$1" pin="PF2" pad="18"/>-        <connect gate="G$1" pin="PF3" pad="19"/>-        <connect gate="G$1" pin="PF4" pad="20"/>-        <connect gate="G$1" pin="PF5" pad="21"/>-        <connect gate="G$1" pin="VSS@2" pad="22"/>-        <connect gate="G$1" pin="VDD@2" pad="23"/>-        <connect gate="G$1" pin="PF6" pad="24"/>-        <connect gate="G$1" pin="PF7" pad="25"/>-        <connect gate="G$1" pin="PF8" pad="26"/>-        <connect gate="G$1" pin="PF9" pad="27"/>-        <connect gate="G$1" pin="PF10" pad="28"/>-        <connect gate="G$1" pin="PH0-OSC_IN" pad="29"/>-        <connect gate="G$1" pin="PH1-OSC_OUT" pad="30"/>-        <connect gate="G$1" pin="NRST" pad="31"/>-        <connect gate="G$1" pin="PC0" pad="32"/>-        <connect gate="G$1" pin="PC1" pad="33"/>-        <connect gate="G$1" pin="PC2" pad="34"/>-        <connect gate="G$1" pin="PC3" pad="35"/>-        <connect gate="G$1" pin="VDD@3" pad="36"/>-        <connect gate="G$1" pin="VSS@3" pad="37"/>-        <connect gate="G$1" pin="VSSA" pad="38"/>-        <connect gate="G$1" pin="VREF-" pad="39"/>-        <connect gate="G$1" pin="VREF+" pad="40"/>-        <connect gate="G$1" pin="VDDA" pad="41"/>-        <connect gate="G$1" pin="PA0-WKUP" pad="42"/>-        <connect gate="G$1" pin="PA1" pad="43"/>-        <connect gate="G$1" pin="PA2" pad="44"/>-        <connect gate="G$1" pin="PH2" pad="45"/>-        <connect gate="G$1" pin="PH3" pad="46"/>-        <connect gate="G$1" pin="PH4" pad="47"/>-        <connect gate="G$1" pin="PH5" pad="48"/>-        <connect gate="G$1" pin="PA3" pad="49"/>-        <connect gate="G$1" pin="VSS@4" pad="50"/>-        <connect gate="G$1" pin="VDD@4" pad="51"/>-        <connect gate="G$1" pin="PA4" pad="52"/>-        <connect gate="G$1" pin="PA5" pad="53"/>-        <connect gate="G$1" pin="PA6" pad="54"/>-        <connect gate="G$1" pin="PA7" pad="55"/>-        <connect gate="G$1" pin="PC4" pad="56"/>-        <connect gate="G$1" pin="PC5" pad="57"/>-        <connect gate="G$1" pin="VDD@5" pad="58"/>-        <connect gate="G$1" pin="VSS@5" pad="59"/>-        <connect gate="G$1" pin="PB0" pad="60"/>-        <connect gate="G$1" pin="PB1" pad="61"/>-        <connect gate="G$1" pin="PB2" pad="62"/>-        <connect gate="G$1" pin="PF11" pad="63"/>-        <connect gate="G$1" pin="PF12" pad="64"/>-        <connect gate="G$1" pin="PF13" pad="65"/>-        <connect gate="G$1" pin="PF14" pad="66"/>-        <connect gate="G$1" pin="PF15" pad="67"/>-        <connect gate="G$1" pin="PG0" pad="68"/>-        <connect gate="G$1" pin="PG1" pad="69"/>-        <connect gate="G$1" pin="PE7" pad="70"/>-        <connect gate="G$1" pin="PE8" pad="71"/>-        <connect gate="G$1" pin="PE9" pad="72"/>-        <connect gate="G$1" pin="PB5" pad="144"/>-        <connect gate="G$1" pin="PB4_NJTRST" pad="143"/>-        <connect gate="G$1" pin="PB3_JTDO/TRACESWO" pad="142"/>-        <connect gate="G$1" pin="PA15_JTDI" pad="141"/>-        <connect gate="G$1" pin="PA14_JTCK-SWCLK" pad="140"/>-        <connect gate="G$1" pin="PC12" pad="139"/>-        <connect gate="G$1" pin="PC11" pad="138"/>-        <connect gate="G$1" pin="PC10" pad="137"/>-        <connect gate="G$1" pin="VDD@6" pad="136"/>-        <connect gate="G$1" pin="VSS@6" pad="135"/>-        <connect gate="G$1" pin="PD7" pad="134"/>-        <connect gate="G$1" pin="PD6" pad="133"/>-        <connect gate="G$1" pin="PD5" pad="132"/>-        <connect gate="G$1" pin="PD4" pad="131"/>-        <connect gate="G$1" pin="PD3" pad="130"/>-        <connect gate="G$1" pin="PD2" pad="129"/>-        <connect gate="G$1" pin="PD1" pad="128"/>-        <connect gate="G$1" pin="PD0" pad="127"/>-        <connect gate="G$1" pin="VDD@7" pad="126"/>-        <connect gate="G$1" pin="VSS@7" pad="125"/>-        <connect gate="G$1" pin="VCAP_2" pad="124"/>-        <connect gate="G$1" pin="PA13_JTMS-SWDIO" pad="123"/>-        <connect gate="G$1" pin="PA12" pad="122"/>-        <connect gate="G$1" pin="PA11" pad="121"/>-        <connect gate="G$1" pin="PA10" pad="120"/>-        <connect gate="G$1" pin="PA9" pad="119"/>-        <connect gate="G$1" pin="PA8" pad="118"/>-        <connect gate="G$1" pin="PC9" pad="117"/>-        <connect gate="G$1" pin="PC8" pad="116"/>-        <connect gate="G$1" pin="PC7" pad="115"/>-        <connect gate="G$1" pin="PC6" pad="114"/>-        <connect gate="G$1" pin="VDDUSB" pad="113"/>-        <connect gate="G$1" pin="VSS@8" pad="112"/>-        <connect gate="G$1" pin="PG8" pad="111"/>-        <connect gate="G$1" pin="PG7" pad="110"/>-        <connect gate="G$1" pin="PG6" pad="109"/>-        <connect gate="G$1" pin="PG5" pad="108"/>-        <connect gate="G$1" pin="PG4" pad="107"/>-        <connect gate="G$1" pin="PG3" pad="106"/>-        <connect gate="G$1" pin="PG2" pad="105"/>-        <connect gate="G$1" pin="PD15" pad="104"/>-        <connect gate="G$1" pin="PD14" pad="103"/>-        <connect gate="G$1" pin="VDD@8" pad="102"/>-        <connect gate="G$1" pin="VSS@9" pad="101"/>-        <connect gate="G$1" pin="PD13" pad="100"/>-        <connect gate="G$1" pin="PD12" pad="99"/>-        <connect gate="G$1" pin="PD11" pad="98"/>-        <connect gate="G$1" pin="PD10" pad="97"/>-        <connect gate="G$1" pin="PD9" pad="96"/>-        <connect gate="G$1" pin="PD8" pad="95"/>-        <connect gate="G$1" pin="PB15" pad="94"/>-        <connect gate="G$1" pin="PB14" pad="93"/>-        <connect gate="G$1" pin="PB13" pad="92"/>-        <connect gate="G$1" pin="PB12" pad="91"/>-        <connect gate="G$1" pin="PH12" pad="90"/>-        <connect gate="G$1" pin="PH11" pad="89"/>-        <connect gate="G$1" pin="PH10" pad="88"/>-        <connect gate="G$1" pin="PH9" pad="87"/>-        <connect gate="G$1" pin="PH8" pad="86"/>-        <connect gate="G$1" pin="PH7" pad="85"/>-        <connect gate="G$1" pin="PH6" pad="84"/>-        <connect gate="G$1" pin="VDD@9" pad="83"/>-        <connect gate="G$1" pin="VSS@10" pad="82"/>-        <connect gate="G$1" pin="VCAP_1" pad="81"/>-        <connect gate="G$1" pin="PB11" pad="80"/>-        <connect gate="G$1" pin="PB10" pad="79"/>-        <connect gate="G$1" pin="PE15" pad="78"/>-        <connect gate="G$1" pin="PE14" pad="77"/>-        <connect gate="G$1" pin="PE13" pad="76"/>-        <connect gate="G$1" pin="PE12" pad="75"/>-        <connect gate="G$1" pin="PE11" pad="74"/>-        <connect gate="G$1" pin="PE10" pad="73"/>+        <connect gate="G$1" pin="PC13" pad="7"/>+        <connect gate="G$1" pin="PC14/OSC32_IN" pad="8"/>+        <connect gate="G$1" pin="PC15/OSC32_OUT" pad="9"/>+        <connect gate="G$1" pin="PF0" pad="10"/>+        <connect gate="G$1" pin="PF1" pad="11"/>+        <connect gate="G$1" pin="PF2" pad="12"/>+        <connect gate="G$1" pin="PF3" pad="13"/>+        <connect gate="G$1" pin="PF4" pad="14"/>+        <connect gate="G$1" pin="PF5" pad="15"/>+        <connect gate="G$1" pin="VSS" pad="16"/>+        <connect gate="G$1" pin="VDD" pad="17"/>+        <connect gate="G$1" pin="PF6" pad="18"/>+        <connect gate="G$1" pin="PF7" pad="19"/>+        <connect gate="G$1" pin="PF8" pad="20"/>+        <connect gate="G$1" pin="PF9" pad="21"/>+        <connect gate="G$1" pin="PF10" pad="22"/>+        <connect gate="G$1" pin="PH0/OSC_IN" pad="23"/>+        <connect gate="G$1" pin="PH1/OSC_OUT" pad="24"/>+        <connect gate="G$1" pin="NRST" pad="25"/>+        <connect gate="G$1" pin="PC0" pad="26"/>+        <connect gate="G$1" pin="PC1" pad="27"/>+        <connect gate="G$1" pin="PC2" pad="28"/>+        <connect gate="G$1" pin="PC3" pad="29"/>+        <connect gate="G$1" pin="VDD@2" pad="30"/>+        <connect gate="G$1" pin="VSSA" pad="31"/>+        <connect gate="G$1" pin="VREF+" pad="32"/>+        <connect gate="G$1" pin="VDDA" pad="33"/>+        <connect gate="G$1" pin="PA0/WKUP" pad="34"/>+        <connect gate="G$1" pin="PA1" pad="35"/>+        <connect gate="G$1" pin="PA2" pad="36"/>+        <connect gate="G$1" pin="PA3" pad="37"/>+        <connect gate="G$1" pin="VSS@2" pad="38"/>+        <connect gate="G$1" pin="VDD@3" pad="39"/>+        <connect gate="G$1" pin="PA4" pad="40"/>+        <connect gate="G$1" pin="PA5" pad="41"/>+        <connect gate="G$1" pin="PA6" pad="42"/>+        <connect gate="G$1" pin="PA7" pad="43"/>+        <connect gate="G$1" pin="PC4" pad="44"/>+        <connect gate="G$1" pin="PC5" pad="45"/>+        <connect gate="G$1" pin="PB0" pad="46"/>+        <connect gate="G$1" pin="PB1" pad="47"/>+        <connect gate="G$1" pin="PB2" pad="48"/>+        <connect gate="G$1" pin="PF11" pad="49"/>+        <connect gate="G$1" pin="PF12" pad="50"/>+        <connect gate="G$1" pin="VSS@3" pad="51"/>+        <connect gate="G$1" pin="VDD@4" pad="52"/>+        <connect gate="G$1" pin="PF13" pad="53"/>+        <connect gate="G$1" pin="PF14" pad="54"/>+        <connect gate="G$1" pin="PF15" pad="55"/>+        <connect gate="G$1" pin="PG0" pad="56"/>+        <connect gate="G$1" pin="PG1" pad="57"/>+        <connect gate="G$1" pin="PE7" pad="58"/>+        <connect gate="G$1" pin="PE8" pad="59"/>+        <connect gate="G$1" pin="PE9" pad="60"/>+        <connect gate="G$1" pin="VSS@4" pad="61"/>+        <connect gate="G$1" pin="VDD@5" pad="62"/>+        <connect gate="G$1" pin="PE10" pad="63"/>+        <connect gate="G$1" pin="PE11" pad="64"/>+        <connect gate="G$1" pin="PE12" pad="65"/>+        <connect gate="G$1" pin="PE13" pad="66"/>+        <connect gate="G$1" pin="PE14" pad="67"/>+        <connect gate="G$1" pin="PE15" pad="68"/>+        <connect gate="G$1" pin="PB10" pad="69"/>+        <connect gate="G$1" pin="PB11" pad="70"/>+        <connect gate="G$1" pin="VCAP_1" pad="71"/>+        <connect gate="G$1" pin="VDD@6" pad="72"/>+        <connect gate="G$1" pin="VDD@7" pad="144"/>+        <connect gate="G$1" pin="PDR_ON" pad="143"/>+        <connect gate="G$1" pin="PE1" pad="142"/>+        <connect gate="G$1" pin="PE0" pad="141"/>+        <connect gate="G$1" pin="PB9" pad="140"/>+        <connect gate="G$1" pin="PB8" pad="139"/>+        <connect gate="G$1" pin="BOOT0" pad="138"/>+        <connect gate="G$1" pin="PB7" pad="137"/>+        <connect gate="G$1" pin="PB6" pad="136"/>+        <connect gate="G$1" pin="PB5" pad="135"/>+        <connect gate="G$1" pin="PB4" pad="134"/>+        <connect gate="G$1" pin="PB3" pad="133"/>+        <connect gate="G$1" pin="PG15" pad="132"/>+        <connect gate="G$1" pin="VDD@8" pad="131"/>+        <connect gate="G$1" pin="VSS@5" pad="130"/>+        <connect gate="G$1" pin="PG14" pad="129"/>+        <connect gate="G$1" pin="PG13" pad="128"/>+        <connect gate="G$1" pin="PG12" pad="127"/>+        <connect gate="G$1" pin="PG11" pad="126"/>+        <connect gate="G$1" pin="PG10" pad="125"/>+        <connect gate="G$1" pin="PG9" pad="124"/>+        <connect gate="G$1" pin="PD7" pad="123"/>+        <connect gate="G$1" pin="PD6" pad="122"/>+        <connect gate="G$1" pin="VDDSDMMC" pad="121"/>+        <connect gate="G$1" pin="VSS@6" pad="120"/>+        <connect gate="G$1" pin="PD5" pad="119"/>+        <connect gate="G$1" pin="PD4" pad="118"/>+        <connect gate="G$1" pin="PD3" pad="117"/>+        <connect gate="G$1" pin="PD2" pad="116"/>+        <connect gate="G$1" pin="PD1" pad="115"/>+        <connect gate="G$1" pin="PD0" pad="114"/>+        <connect gate="G$1" pin="PC12" pad="113"/>+        <connect gate="G$1" pin="PC11" pad="112"/>+        <connect gate="G$1" pin="PC10" pad="111"/>+        <connect gate="G$1" pin="PA15" pad="110"/>+        <connect gate="G$1" pin="PA14" pad="109"/>+        <connect gate="G$1" pin="VDD@9" pad="108"/>+        <connect gate="G$1" pin="VSS@7" pad="107"/>+        <connect gate="G$1" pin="VCAP_2" pad="106"/>+        <connect gate="G$1" pin="PA13" pad="105"/>+        <connect gate="G$1" pin="PA12" pad="104"/>+        <connect gate="G$1" pin="PA11" pad="103"/>+        <connect gate="G$1" pin="PA10" pad="102"/>+        <connect gate="G$1" pin="PA9" pad="101"/>+        <connect gate="G$1" pin="PA8" pad="100"/>+        <connect gate="G$1" pin="PC9" pad="99"/>+        <connect gate="G$1" pin="PC8" pad="98"/>+        <connect gate="G$1" pin="PC7" pad="97"/>+        <connect gate="G$1" pin="PC6" pad="96"/>+        <connect gate="G$1" pin="VDDUSB" pad="95"/>+        <connect gate="G$1" pin="VSS@8" pad="94"/>+        <connect gate="G$1" pin="PG8" pad="93"/>+        <connect gate="G$1" pin="PG7" pad="92"/>+        <connect gate="G$1" pin="PG6" pad="91"/>+        <connect gate="G$1" pin="PG5" pad="90"/>+        <connect gate="G$1" pin="PG4" pad="89"/>+        <connect gate="G$1" pin="PG3" pad="88"/>+        <connect gate="G$1" pin="PG2" pad="87"/>+        <connect gate="G$1" pin="PD15" pad="86"/>+        <connect gate="G$1" pin="PD14" pad="85"/>+        <connect gate="G$1" pin="VDD@10" pad="84"/>+        <connect gate="G$1" pin="VSS@9" pad="83"/>+        <connect gate="G$1" pin="PD13" pad="82"/>+        <connect gate="G$1" pin="PD12" pad="81"/>+        <connect gate="G$1" pin="PD11" pad="80"/>+        <connect gate="G$1" pin="PD10" pad="79"/>+        <connect gate="G$1" pin="PD9" pad="78"/>+        <connect gate="G$1" pin="PD8" pad="77"/>+        <connect gate="G$1" pin="PB15" pad="76"/>+        <connect gate="G$1" pin="PB14" pad="75"/>+        <connect gate="G$1" pin="PB13" pad="74"/>+        <connect gate="G$1" pin="PB12" pad="73"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="STM32F777ZIT6" constant="no"/>+          <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+          <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603163665537515520" constant="no"/>+          <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/stm32f777zit6" constant="no"/>+          <attribute name="MOUSER_PN" value="511-STM32F777ZIT6" constant="no"/>+          <attribute name="DIGIKEY_PN" value="497-16657-ND" constant="no"/>+          <attribute name="LCSC_PN" value="C5271061" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>