component
STM32F767VIT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
← Commit history
Publish 0.1.1
5 files changed
+307−268
README.md+21−17@@ -14,19 +14,23 @@ STM32F767VIT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | 4 | PE5 | bidirectional | GPIO port PE5 is a 5V-tolerant I/O capable of TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, DFSDM1_CKIN3, FMC_A21, DCMI_D6, and LCD_G0 functions. | | 5 | PE6 | bidirectional | GPIO port PE6 is a 5V-tolerant I/O capable of TRACED3, TIM1_BKIN2, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, SAI2_MCLK_B, FMC_A22, DCMI_D7, and LCD_G1 functions. | | 6 | VBAT | power_in | Backup domain power supply pin that provides power to RTC, 32×32 bit backup registers, and 4KB backup SRAM. |-| 10 | PF0 | bidirectional | GPIO port PF0 is a 5V-tolerant I/O capable of I2C2_SDA, FMC_A0, and EVENTOUT functions. |-| 11 | PF1 | bidirectional | GPIO port PF1 is a 5V-tolerant I/O capable of I2C2_SCL, FMC_A1, and EVENTOUT functions. |-| 12 | PF2 | bidirectional | GPIO port PF2 is a 5V-tolerant I/O capable of I2C2_SMBA, FMC_A2, and EVENTOUT functions. |-| 13 | PF3 | bidirectional | GPIO port PF3 is a 5V-tolerant I/O capable of FMC_A3 and EVENTOUT functions with ADC3_IN9 analog input. |-| 14 | PF4 | bidirectional | GPIO port PF4 is a 5V-tolerant I/O capable of FMC_A4 and EVENTOUT functions with ADC3_IN14 analog input. |-| 15 | PF5 | bidirectional | GPIO port PF5 is a 5V-tolerant I/O capable of FMC_A5 and EVENTOUT functions with ADC3_IN15 analog input. |-| 16 | VSS | power_in | Ground reference for main power supply (0 V). |-| 17 | VDD | power_in | Main power supply input pin operating at 1.7 to 3.6 V with decoupling capacitors required. |+| 7 | PC13 | bidirectional | |+| 8 | PC14/OSC32_IN | bidirectional | |+| 9 | PC15/OSC32_OUT | bidirectional | |+| 10 | VSS | power_in | Ground reference for main power supply (0 V). |+| 11 | VDD | power_in | Main power supply input pin operating at 1.7 to 3.6 V with decoupling capacitors required. |+| 12 | PH0/OSC_IN | bidirectional | |+| 13 | PH1/OSC_OUT | bidirectional | |+| 14 | NRST | input | |+| 15 | PC0 | bidirectional | |+| 16 | PC1 | bidirectional | |+| 17 | PC2 | bidirectional | |+| 18 | PC3 | bidirectional | | | 19 | VSSA | power_in | Analog ground reference pin for ADC and analog peripherals. |-| 20 | VREF- | power_in | Negative reference voltage input for ADC (typically connected to VSSA). |-| 21 | VREF+ | power_in | Positive reference voltage input for ADC operating at 1.7 to 3.6 V. |-| 22 | VDDA | power_in | Analog power supply pin for ADC, DAC, and comparators operating at 1.7 to 3.6 V. |-| 23 | PA0-WKUP | bidirectional | GPIO port PA0 is a 5V-tolerant I/O with wakeup capability (WKUP1) and capable of TIM2_CH1, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, ETH_MII_CRS, and ADC1_IN0 functions. |+| 20 | VREF+ | power_in | Positive reference voltage input for ADC operating at 1.7 to 3.6 V. |+| 21 | VDDA | power_in | Analog power supply pin for ADC, DAC, and comparators operating at 1.7 to 3.6 V. |+| 22 | PA0/WKUP | bidirectional | GPIO port PA0 is a 5V-tolerant I/O with wakeup capability (WKUP1) and capable of TIM2_CH1, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, ETH_MII_CRS, and ADC1_IN0 functions. |+| 23 | PA1 | bidirectional | | | 24 | PA2 | bidirectional | GPIO port PA2 is a 5V-tolerant I/O capable of TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, SAI2_SCK_B, ETH_MDIO, and ADC1_IN2 functions. | | 25 | PA3 | bidirectional | GPIO port PA3 is a 5V-tolerant I/O capable of TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5, and ADC1_IN3 functions. | | 26 | VSS | power_in | Ground reference for main power supply (0 V). |@@ -75,12 +79,12 @@ STM32F767VIT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | 69 | PA10 | bidirectional | GPIO port PA10 is a 5V-tolerant I/O capable of TIM1_CH3, USART1_RX, LCD_B4, OTG_FS_ID, MDIOS_MDIO, DCMI_D1, and LCD_B1 functions. | | 70 | PA11 | bidirectional | GPIO port PA11 is a 5V-tolerant I/O capable of TIM1_CH4, SPI2_NSS, UART4_RX, USART1_CTS, CAN1_RX, OTG_FS_DM, and LCD_R4 functions. | | 71 | PA12 | bidirectional | GPIO port PA12 is a 5V-tolerant I/O capable of TIM1_ETR, SPI2_SCK, UART4_TX, USART1_RTS, SAI2_FS_B, CAN1_TX, OTG_FS_DP, and LCD_R5 functions. |-| 72 | PA13(JTMS-SWDIO) | bidirectional | JTAG Test Mode Select / Serial Wire Data I/O pin is a 5V-tolerant bidirectional port for debug interface. |+| 72 | PA13 | bidirectional | JTAG Test Mode Select / Serial Wire Data I/O pin is a 5V-tolerant bidirectional port for debug interface. | | 73 | VCAP_2 | power_in | Capacitor supply pin for integrated voltage regulator requiring 2.2 µF external capacitor. | | 74 | VSS | power_in | Ground reference for main power supply (0 V). | | 75 | VDD | power_in | Main power supply input pin operating at 1.7 to 3.6 V with decoupling capacitors required. |-| 76 | PA14(JTCK-SWCLK) | bidirectional | JTAG Test Clock / Serial Wire Clock pin is a 5V-tolerant bidirectional port for debug interface. |-| 77 | PA15(JTDI) | bidirectional | JTAG Test Data Input pin is a 5V-tolerant bidirectional I/O capable of TIM2_CH1, HDMI_CEC, SPI1_NSS, SPI3_NSS, SPI6_NSS, UART4_RTS, CAN3_TX, and UART7_TX functions. |+| 76 | PA14 | bidirectional | JTAG Test Clock / Serial Wire Clock pin is a 5V-tolerant bidirectional port for debug interface. |+| 77 | PA15 | bidirectional | JTAG Test Data Input pin is a 5V-tolerant bidirectional I/O capable of TIM2_CH1, HDMI_CEC, SPI1_NSS, SPI3_NSS, SPI6_NSS, UART4_RTS, CAN3_TX, and UART7_TX functions. | | 78 | PC10 | bidirectional | GPIO port PC10 is a 5V-tolerant I/O capable of DFSDM1_CKIN5, SPI3_SCK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDMMC1_D2, DCMI_D8, and LCD_R2 functions. | | 79 | PC11 | bidirectional | GPIO port PC11 is a 5V-tolerant I/O capable of DFSDM1_DATIN5, SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDMMC1_D3, and DCMI_D4 functions. | | 80 | PC12 | bidirectional | GPIO port PC12 is a 5V-tolerant I/O capable of TRACED3, SPI3_MOSI, USART3_CK, UART5_TX, SDMMC1_CK, and DCMI_D9 functions. |@@ -92,8 +96,8 @@ STM32F767VIT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | 86 | PD5 | bidirectional | GPIO port PD5 is a 5V-tolerant I/O capable of USART2_TX and FMC_NWE functions. | | 87 | PD6 | bidirectional | GPIO port PD6 is a 5V-tolerant I/O capable of DFSDM1_CKIN4, SPI3_MOSI, SAI1_SD_A, USART2_RX, DFSDM1_DATIN1, SDMMC2_CK, FMC_NWAIT, and DCMI_D10 functions. | | 88 | PD7 | bidirectional | GPIO port PD7 is a 5V-tolerant I/O capable of DFSDM1_DATIN4, SPI1_MOSI, DFSDM1_CKIN1, USART2_CK, SPDIF_RX0, SDMMC2_CMD, and FMC_NE1 functions. |-| 89 | PB3(JTDO/TRACESWO) | bidirectional | JTAG Test Data Output / Serial Wire Output pin is a 5V-tolerant I/O capable of TIM2_CH2, SPI1_SCK, SPI3_SCK, SPI6_SCK, SDMMC2_D2, CAN3_RX, and UART7_RX functions. |-| 90 | PB4(NJTRST) | bidirectional | JTAG Test Reset pin is a 5V-tolerant I/O capable of TIM3_CH1, SPI1_MISO, SPI3_MISO, SPI2_NSS, SPI6_MISO, SDMMC2_D3, CAN3_TX, and UART7_TX functions. |+| 89 | PB3 | bidirectional | JTAG Test Data Output / Serial Wire Output pin is a 5V-tolerant I/O capable of TIM2_CH2, SPI1_SCK, SPI3_SCK, SPI6_SCK, SDMMC2_D2, CAN3_RX, and UART7_RX functions. |+| 90 | PB4 | bidirectional | JTAG Test Reset pin is a 5V-tolerant I/O capable of TIM3_CH1, SPI1_MISO, SPI3_MISO, SPI2_NSS, SPI6_MISO, SDMMC2_D3, CAN3_TX, and UART7_TX functions. | | 91 | PB5 | bidirectional | GPIO port PB5 is a 5V-tolerant I/O capable of UART5_RX, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, SPI6_MOSI, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1, and DCMI_D10 functions. | | 92 | PB6 | bidirectional | GPIO port PB6 is a 5V-tolerant I/O capable of UART5_TX, TIM4_CH1, HDMI_CEC, I2C1_SCL, DFSDM1_DATIN5, USART1_TX, CAN2_TX, QUADSPI_BK1_NCS, I2C4_SCL, FMC_SDNE1, and DCMI_D5 functions. | | 93 | PB7 | bidirectional | GPIO port PB7 is a 5V-tolerant I/O capable of TIM4_CH2, I2C1_SDA, DFSDM1_CKIN5, USART1_RX, I2C4_SDA, FMC_NL, and DCMI_VSYNC functions. |
package.json+2−2@@ -1,6 +1,6 @@ { "slug": "stm32f767vit6",- "version": "0.1.0",+ "version": "0.1.1", "type": "component", "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.", "tags": [@@ -661,4 +661,4 @@ "footprint": "viewers/footprint.html" } }-}+}
page.json+4−4@@ -4,7 +4,7 @@ "slug": "stm32f767vit6", "title": "STM32F767VIT6", "brief": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.1.1", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -688,7 +688,7 @@ "viewers/symbol.html", "viewers/footprint.html" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "org": "adom" }
stm32f767vit6.kicad_sym+137−121@@ -1,397 +1,413 @@ (kicad_symbol_lib (version 20211014) (generator ds2sf_rect) (symbol "STM32F767VIT6" (in_bom yes) (on_board yes)- (property "Reference" "U" (at 0 63.50 0) (effects (font (size 1.27 1.27))))- (property "Value" "STM32F767VIT6" (at 0 -66.04 0) (effects (font (size 1.27 1.27))))+ (property "Reference" "U" (at 0 66.04 0) (effects (font (size 1.27 1.27))))+ (property "Value" "STM32F767VIT6" (at 0 -68.58 0) (effects (font (size 1.27 1.27)))) (property "Footprint" "" (at 0 0 0) (effects (font (size 1.27 1.27)) hide)) (symbol "STM32F767VIT6_0_1"- (rectangle (start -12.70 60.96) (end 12.70 -63.50)+ (rectangle (start -12.70 63.50) (end 12.70 -66.04) (stroke (width 0.254) (type default)) (fill (type background))) ) (symbol "STM32F767VIT6_1_1"- (pin bidirectional line (at -17.78 58.42 0) (length 5.08)+ (pin bidirectional line (at -17.78 60.96 0) (length 5.08) (name "PE2" (effects (font (size 1.27 1.27)))) (number "1" (effects (font (size 1.27 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direction="io" rot="R180"/>- <pin name="PC10" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>- <pin name="PA15_JTDI" x="17.78" y="0" length="middle" direction="io" rot="R180"/>- <pin name="PA14_JTCK-SWCLK" x="17.78" y="-2.54" length="middle" direction="io" rot="R180"/>- <pin name="VDD@5" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>- <pin name="VSS@5" x="17.78" y="-7.62" length="middle" direction="pwr" rot="R180"/>- <pin name="VCAP_2" x="17.78" y="-10.16" length="middle" direction="pwr" rot="R180"/>- <pin name="PA13_JTMS-SWDIO" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>- <pin name="PA12" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>- <pin name="PA11" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>- <pin name="PA10" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>- <pin name="PA9" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>- <pin name="PA8" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>- <pin name="PC9" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>- <pin name="PC8" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>- <pin name="PC7" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>- <pin name="PC6" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>- <pin name="PD15" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>- <pin name="PD14" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>- <pin name="PD13" x="17.78" y="-43.18" length="middle" direction="io" rot="R180"/>- <pin name="PD12" x="17.78" y="-45.72" length="middle" direction="io" rot="R180"/>- <pin name="PD11" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>- <pin name="PD10" x="17.78" y="-50.8" length="middle" direction="io" rot="R180"/>- <pin name="PD9" x="17.78" y="-53.34" length="middle" direction="io" rot="R180"/>- <pin name="PD8" x="17.78" y="-55.88" length="middle" direction="io" rot="R180"/>- <pin name="PB15" x="17.78" y="-58.42" length="middle" direction="io" rot="R180"/>- <pin name="PB14" x="17.78" y="-60.96" length="middle" direction="io" rot="R180"/>+ <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data</description>+ <wire x1="-12.7" y1="63.5" x2="12.7" y2="63.5" width="0.254" layer="94"/>+ <wire x1="12.7" y1="63.5" x2="12.7" y2="-66.04" width="0.254" layer="94"/>+ <wire x1="12.7" y1="-66.04" x2="-12.7" y2="-66.04" width="0.254" layer="94"/>+ <wire x1="-12.7" y1="-66.04" x2="-12.7" y2="63.5" width="0.254" layer="94"/>+ <text x="0.0000" y="66.0400" size="1.27" layer="95" align="center">>NAME</text>+ <text x="0.0000" y="-68.5800" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="PE2" x="-17.78" y="60.96" length="middle" direction="io"/>+ <pin name="PE3" x="-17.78" y="58.42" length="middle" direction="io"/>+ <pin name="PE4" x="-17.78" y="55.88" length="middle" direction="io"/>+ <pin name="PE5" x="-17.78" y="53.34" length="middle" direction="io"/>+ <pin name="PE6" x="-17.78" y="50.8" length="middle" direction="io"/>+ <pin name="VBAT" x="-17.78" y="48.26" length="middle" direction="pwr"/>+ <pin name="PC13" x="-17.78" y="45.72" length="middle" direction="io"/>+ <pin name="PC14/OSC32_IN" x="-17.78" y="43.18" length="middle" direction="io"/>+ <pin name="PC15/OSC32_OUT" x="-17.78" y="40.64" length="middle" direction="io"/>+ <pin name="VSS" x="-17.78" y="38.1" length="middle" direction="pwr"/>+ <pin name="VDD" x="-17.78" y="35.56" length="middle" direction="pwr"/>+ <pin name="PH0/OSC_IN" x="-17.78" y="33.02" length="middle" direction="io"/>+ <pin name="PH1/OSC_OUT" x="-17.78" y="30.48" length="middle" direction="io"/>+ <pin name="NRST" x="-17.78" y="27.94" length="middle" direction="in"/>+ <pin name="PC0" x="-17.78" y="25.4" length="middle" direction="io"/>+ <pin name="PC1" x="-17.78" y="22.86" length="middle" direction="io"/>+ <pin name="PC2" x="-17.78" y="20.32" length="middle" direction="io"/>+ <pin name="PC3" x="-17.78" y="17.78" length="middle" direction="io"/>+ <pin name="VSSA" x="-17.78" y="15.24" length="middle" direction="pwr"/>+ <pin name="VREF+" x="-17.78" y="12.7" length="middle" direction="pwr"/>+ <pin name="VDDA" x="-17.78" y="10.16" length="middle" direction="pwr"/>+ <pin name="PA0/WKUP" x="-17.78" y="7.62" length="middle" direction="io"/>+ <pin name="PA1" x="-17.78" y="5.08" length="middle" direction="io"/>+ <pin name="PA2" x="-17.78" y="2.54" length="middle" direction="io"/>+ <pin name="PA3" x="-17.78" y="0" length="middle" direction="io"/>+ <pin name="VSS@2" x="-17.78" y="-2.54" length="middle" direction="pwr"/>+ <pin name="VDD@2" x="-17.78" y="-5.08" length="middle" direction="pwr"/>+ <pin name="PA4" x="-17.78" y="-7.62" length="middle" direction="io"/>+ <pin name="PA5" x="-17.78" y="-10.16" length="middle" direction="io"/>+ <pin name="PA6" x="-17.78" y="-12.7" length="middle" direction="io"/>+ <pin name="PA7" x="-17.78" y="-15.24" length="middle" direction="io"/>+ <pin name="PC4" x="-17.78" y="-17.78" length="middle" direction="io"/>+ <pin name="PC5" x="-17.78" y="-20.32" length="middle" direction="io"/>+ <pin name="PB0" x="-17.78" y="-22.86" length="middle" direction="io"/>+ <pin name="PB1" x="-17.78" y="-25.4" length="middle" direction="io"/>+ <pin name="PB2" x="-17.78" y="-27.94" length="middle" direction="io"/>+ <pin name="PE7" x="-17.78" y="-30.48" length="middle" direction="io"/>+ <pin name="PE8" x="-17.78" y="-33.02" length="middle" direction="io"/>+ <pin name="PE9" x="-17.78" y="-35.56" length="middle" direction="io"/>+ <pin name="PE10" x="-17.78" y="-38.1" length="middle" direction="io"/>+ <pin name="PE11" x="-17.78" y="-40.64" length="middle" direction="io"/>+ <pin name="PE12" x="-17.78" y="-43.18" length="middle" direction="io"/>+ <pin name="PE13" x="-17.78" y="-45.72" length="middle" direction="io"/>+ <pin name="PE14" x="-17.78" y="-48.26" length="middle" direction="io"/>+ <pin name="PE15" x="-17.78" y="-50.8" length="middle" direction="io"/>+ <pin name="PB10" x="-17.78" y="-53.34" length="middle" direction="io"/>+ <pin name="PB11" x="-17.78" y="-55.88" length="middle" direction="io"/>+ <pin name="VCAP_1" x="-17.78" y="-58.42" length="middle" direction="pwr"/>+ <pin name="VSS@3" x="-17.78" y="-60.96" length="middle" direction="pwr"/>+ <pin name="VDD@3" x="-17.78" y="-63.5" length="middle" direction="pwr"/>+ <pin name="VDD@4" x="17.78" y="60.96" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@4" x="17.78" y="58.42" length="middle" direction="pwr" rot="R180"/>+ <pin name="PE1" x="17.78" y="55.88" length="middle" direction="io" rot="R180"/>+ <pin name="PE0" x="17.78" y="53.34" length="middle" direction="io" rot="R180"/>+ <pin name="PB9" x="17.78" y="50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PB8" x="17.78" y="48.26" length="middle" direction="io" rot="R180"/>+ <pin name="BOOT0" x="17.78" y="45.72" length="middle" direction="in" rot="R180"/>+ <pin name="PB7" x="17.78" y="43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PB6" x="17.78" y="40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PB5" x="17.78" y="38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PB4" x="17.78" y="35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PB3" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PD7" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PD6" x="17.78" y="27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PD5" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PD4" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PD3" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PD2" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PD1" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PD0" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>+ <pin name="PA15" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+ <pin name="PA14" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@5" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@5" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+ <pin name="VCAP_2" x="17.78" y="-7.62" length="middle" direction="pwr" rot="R180"/>+ <pin name="PA13" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PA12" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PA11" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PA10" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PA9" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PA8" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PC9" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PC8" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PC7" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PC6" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PD15" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PD14" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PD13" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PD12" x="17.78" y="-43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PD11" x="17.78" y="-45.72" length="middle" direction="io" rot="R180"/>+ <pin name="PD10" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>+ <pin name="PD9" x="17.78" y="-50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PD8" x="17.78" y="-53.34" length="middle" direction="io" rot="R180"/>+ <pin name="PB15" x="17.78" y="-55.88" length="middle" direction="io" rot="R180"/>+ <pin name="PB14" x="17.78" y="-58.42" length="middle" direction="io" rot="R180"/>+ <pin name="PB13" x="17.78" y="-60.96" length="middle" direction="io" rot="R180"/>+ <pin name="PB12" x="17.78" y="-63.5" length="middle" direction="io" rot="R180"/> </symbol> </symbols> <devicesets> <deviceset name="STM32F767VIT6" prefix="U">- <description></description>+ <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data</description> <gates> <gate name="G$1" symbol="STM32F767VIT6" x="0" y="0"/> </gates>@@ -299,19 +304,23 @@ <connect gate="G$1" pin="PE5" pad="4"/> <connect gate="G$1" pin="PE6" pad="5"/> <connect gate="G$1" pin="VBAT" pad="6"/>- <connect gate="G$1" pin="PF0" pad="10"/>- <connect gate="G$1" pin="PF1" pad="11"/>- <connect gate="G$1" pin="PF2" pad="12"/>- <connect gate="G$1" pin="PF3" pad="13"/>- <connect gate="G$1" pin="PF4" pad="14"/>- <connect gate="G$1" pin="PF5" pad="15"/>- <connect gate="G$1" pin="VSS" pad="16"/>- <connect gate="G$1" pin="VDD" pad="17"/>+ <connect gate="G$1" pin="PC13" pad="7"/>+ <connect gate="G$1" pin="PC14/OSC32_IN" pad="8"/>+ <connect gate="G$1" pin="PC15/OSC32_OUT" pad="9"/>+ <connect gate="G$1" pin="VSS" pad="10"/>+ <connect gate="G$1" pin="VDD" pad="11"/>+ <connect gate="G$1" pin="PH0/OSC_IN" pad="12"/>+ <connect gate="G$1" pin="PH1/OSC_OUT" pad="13"/>+ <connect gate="G$1" pin="NRST" pad="14"/>+ <connect gate="G$1" pin="PC0" pad="15"/>+ <connect gate="G$1" pin="PC1" pad="16"/>+ <connect gate="G$1" pin="PC2" pad="17"/>+ <connect gate="G$1" pin="PC3" pad="18"/> <connect gate="G$1" pin="VSSA" pad="19"/>- <connect gate="G$1" pin="VREF-" pad="20"/>- <connect gate="G$1" pin="VREF+" pad="21"/>- <connect gate="G$1" pin="VDDA" pad="22"/>- <connect gate="G$1" pin="PA0-WKUP" pad="23"/>+ <connect gate="G$1" pin="VREF+" pad="20"/>+ <connect gate="G$1" pin="VDDA" pad="21"/>+ <connect gate="G$1" pin="PA0/WKUP" pad="22"/>+ <connect gate="G$1" pin="PA1" pad="23"/> <connect gate="G$1" pin="PA2" pad="24"/> <connect gate="G$1" pin="PA3" pad="25"/> <connect gate="G$1" pin="VSS@2" pad="26"/>@@ -339,8 +348,6 @@ <connect gate="G$1" pin="VCAP_1" pad="48"/> <connect gate="G$1" pin="VSS@3" pad="49"/> <connect gate="G$1" pin="VDD@3" pad="50"/>- <connect gate="G$1" pin="PB12" pad="51"/>- <connect gate="G$1" pin="PB13" pad="52"/> <connect gate="G$1" pin="VDD@4" pad="100"/> <connect gate="G$1" pin="VSS@4" pad="99"/> <connect gate="G$1" pin="PE1" pad="98"/>@@ -351,8 +358,8 @@ <connect gate="G$1" pin="PB7" pad="93"/> <connect gate="G$1" pin="PB6" pad="92"/> <connect gate="G$1" pin="PB5" pad="91"/>- <connect gate="G$1" pin="PB4_NJTRST" pad="90"/>- <connect gate="G$1" pin="PB3_JTDO/TRACESWO" pad="89"/>+ <connect gate="G$1" pin="PB4" pad="90"/>+ <connect gate="G$1" pin="PB3" pad="89"/> <connect gate="G$1" pin="PD7" pad="88"/> <connect gate="G$1" pin="PD6" pad="87"/> <connect gate="G$1" pin="PD5" pad="86"/>@@ -364,12 +371,12 @@ <connect gate="G$1" pin="PC12" pad="80"/> <connect gate="G$1" pin="PC11" pad="79"/> <connect gate="G$1" pin="PC10" pad="78"/>- <connect gate="G$1" pin="PA15_JTDI" pad="77"/>- <connect gate="G$1" pin="PA14_JTCK-SWCLK" pad="76"/>+ <connect gate="G$1" pin="PA15" pad="77"/>+ <connect gate="G$1" pin="PA14" pad="76"/> <connect gate="G$1" pin="VDD@5" pad="75"/> <connect gate="G$1" pin="VSS@5" pad="74"/> <connect gate="G$1" pin="VCAP_2" pad="73"/>- <connect gate="G$1" pin="PA13_JTMS-SWDIO" pad="72"/>+ <connect gate="G$1" pin="PA13" pad="72"/> <connect gate="G$1" pin="PA12" pad="71"/> <connect gate="G$1" pin="PA11" pad="70"/> <connect gate="G$1" pin="PA10" pad="69"/>@@ -389,8 +396,20 @@ <connect gate="G$1" pin="PD8" pad="55"/> <connect gate="G$1" pin="PB15" pad="54"/> <connect gate="G$1" pin="PB14" pad="53"/>+ <connect gate="G$1" pin="PB13" pad="52"/>+ <connect gate="G$1" pin="PB12" pad="51"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="STM32F767VIT6" constant="no"/>+ <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+ <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586182752860819456" constant="no"/>+ <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/stm32f767vit6" constant="no"/>+ <attribute name="MOUSER_PN" value="511-STM32F767VIT6" constant="no"/>+ <attribute name="DIGIKEY_PN" value="497-16643-ND" constant="no"/>+ <attribute name="LCSC_PN" value="C91934" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>