component
STM32F722VET6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
← Commit history
Publish 0.1.1
5 files changed
+61−50
README.md+11−11@@ -15,13 +15,13 @@ STM32F722VET6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | 5 | PE6 | bidirectional | 5V-tolerant (FT) I/O; alternate functions TRACED3, TIM1_BKIN2, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, SAI2_MCK_B, FMC_A22, EVENTOUT. | | 6 | VBAT | power_in | Battery backup supply pin that keeps the RTC, the 32x32-bit backup registers and the backup SRAM powered in the lowest power modes when VDD is removed. | | 7 | PC13 | bidirectional | 5V-tolerant (FT) I/O supplied through the internal power switch (limited to 3 mA, output speed <=2 MHz with max 30 pF load); alternate function EVENTOUT, additional functions RTC_TAMP1/RTC_TS/RTC_OUT, WKUP4. |-| 8 | PC14-OSC32_IN(PC14) | bidirectional | 5V-tolerant (FT) I/O supplied through the power switch (3 mA limit, <=2 MHz/30 pF as output); alternate function EVENTOUT, additional function OSC32_IN for the 32.768 kHz RTC crystal. |-| 9 | PC15-OSC32_OUT(PC15) | bidirectional | 5V-tolerant (FT) I/O supplied through the power switch (3 mA limit, <=2 MHz/30 pF as output); alternate function EVENTOUT, additional function OSC32_OUT for the 32.768 kHz RTC crystal. |+| 8 | PC14-OSC32_IN | bidirectional | 5V-tolerant (FT) I/O supplied through the power switch (3 mA limit, <=2 MHz/30 pF as output); alternate function EVENTOUT, additional function OSC32_IN for the 32.768 kHz RTC crystal. |+| 9 | PC15-OSC32_OUT | bidirectional | 5V-tolerant (FT) I/O supplied through the power switch (3 mA limit, <=2 MHz/30 pF as output); alternate function EVENTOUT, additional function OSC32_OUT for the 32.768 kHz RTC crystal. | | 10 | VSS | power_in | Digital ground supply pin. | | 11 | VDD | power_in | Digital power supply pin, 1.7 V to 3.6 V application supply voltage. | | 12 | PH0-OSC_IN | bidirectional | 5V-tolerant (FT, except in oscillator mode) I/O; alternate function EVENTOUT, additional function OSC_IN for the 4-26 MHz external crystal/resonator input. | | 13 | PH1-OSC_OUT | bidirectional | 5V-tolerant (FT, except in oscillator mode) I/O; alternate function EVENTOUT, additional function OSC_OUT for the 4-26 MHz external crystal/resonator output. |-| 14 | NRST | bidirectional | Bidirectional reset pin with an internal weak pull-up resistor to VDD; driving it low generates a device reset. |+| 14 | NRST | input | Bidirectional reset pin with an internal weak pull-up resistor to VDD; driving it low generates a device reset. | | 15 | PC0 | bidirectional | 5V-tolerant (FT) I/O; alternate functions SAI2_FS_B, OTG_HS_ULPI_STP, FMC_SDNWE, EVENTOUT; additional functions ADC1_IN10, ADC2_IN10, ADC3_IN10. | | 16 | PC1 | bidirectional | 5V-tolerant (FT) I/O; alternate functions TRACED0, SPI2_MOSI/I2S2_SD, SAI1_SD_A, EVENTOUT; additional functions ADC1_IN11, ADC2_IN11, ADC3_IN11, RTC_TAMP3, WKUP3. | | 17 | PC2 | bidirectional | 5V-tolerant (FT) I/O; alternate functions SPI2_MISO, OTG_HS_ULPI_DIR, FMC_SDNE0, EVENTOUT; additional functions ADC1_IN12, ADC2_IN12, ADC3_IN12. |@@ -55,7 +55,7 @@ STM32F722VET6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | 45 | PE15 | bidirectional | 5V-tolerant (FT) I/O; alternate functions TIM1_BKIN, FMC_D12, EVENTOUT. | | 46 | PB10 | bidirectional | 5V-tolerant with I2C Fm+ option (FTf) I/O; alternate functions TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX, OTG_HS_ULPI_D3, EVENTOUT. | | 47 | PB11 | bidirectional | 5V-tolerant with I2C Fm+ option (FTf) I/O; alternate functions TIM2_CH4, I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, EVENTOUT. |-| 48 | VCAP_1 | power_out | External decoupling capacitor connection pin for the internal 1.2 V voltage regulator output supplying the core and digital logic. |+| 48 | VCAP_1 | power_in | External decoupling capacitor connection pin for the internal 1.2 V voltage regulator output supplying the core and digital logic. | | 49 | VSS | power_in | Digital ground supply pin. | | 50 | VDD | power_in | Digital power supply pin, 1.7 V to 3.6 V application supply voltage. | | 51 | PB12 | bidirectional | 5V-tolerant (FT) I/O; alternate functions TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, OTG_HS_ULPI_D5, OTG_HS_ID, EVENTOUT. |@@ -79,12 +79,12 @@ STM32F722VET6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | 69 | PA10 | bidirectional | 5V-tolerant (FT) I/O; alternate functions TIM1_CH3, USART1_RX, OTG_FS_ID, EVENTOUT. | | 70 | PA11 | bidirectional | 5V-tolerant (FT) I/O; alternate functions TIM1_CH4, USART1_CTS, CAN1_RX, OTG_FS_DM, EVENTOUT. | | 71 | PA12 | bidirectional | 5V-tolerant (FT) I/O; alternate functions TIM1_ETR, USART1_RTS, SAI2_FS_B, CAN1_TX, OTG_FS_DP, EVENTOUT. |-| 72 | PA13(JTMS-SWDIO) | bidirectional | 5V-tolerant (FT) I/O; default JTMS-SWDIO debug function, alternate function EVENTOUT. |-| 73 | VCAP_2 | power_out | External decoupling capacitor connection pin for the internal 1.2 V voltage regulator output supplying the core and digital logic. |+| 72 | PA13 | bidirectional | 5V-tolerant (FT) I/O; default JTMS-SWDIO debug function, alternate function EVENTOUT. |+| 73 | VCAP_2 | power_in | External decoupling capacitor connection pin for the internal 1.2 V voltage regulator output supplying the core and digital logic. | | 74 | VSS | power_in | Digital ground supply pin. | | 75 | VDD | power_in | Digital power supply pin, 1.7 V to 3.6 V application supply voltage. |-| 76 | PA14(JTCK-SWCLK) | bidirectional | 5V-tolerant (FT) I/O; default JTCK-SWCLK debug function, alternate function EVENTOUT. |-| 77 | PA15(JTDI) | bidirectional | 5V-tolerant (FT) I/O; default JTDI debug function, alternate functions TIM2_CH1/TIM2_ETR, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, UART4_RTS, EVENTOUT. |+| 76 | PA14 | bidirectional | 5V-tolerant (FT) I/O; default JTCK-SWCLK debug function, alternate function EVENTOUT. |+| 77 | PA15 | bidirectional | 5V-tolerant (FT) I/O; default JTDI debug function, alternate functions TIM2_CH1/TIM2_ETR, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, UART4_RTS, EVENTOUT. | | 78 | PC10 | bidirectional | 5V-tolerant (FT) I/O; alternate functions SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDMMC1_D2, EVENTOUT. | | 79 | PC11 | bidirectional | 5V-tolerant (FT) I/O; alternate functions SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDMMC1_D3, EVENTOUT. | | 80 | PC12 | bidirectional | 5V-tolerant (FT) I/O; alternate functions TRACED3, SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDMMC1_CK, EVENTOUT. |@@ -96,12 +96,12 @@ STM32F722VET6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | 86 | PD5 | bidirectional | 5V-tolerant (FT) I/O; alternate functions USART2_TX, FMC_NWE, EVENTOUT. | | 87 | PD6 | bidirectional | 5V-tolerant (FT) I/O; alternate functions SPI3_MOSI/I2S3_SD, SAI1_SD_A, USART2_RX, SDMMC2_CK, FMC_NWAIT, EVENTOUT. | | 88 | PD7 | bidirectional | 5V-tolerant (FT) I/O; alternate functions USART2_CK, SDMMC2_CMD, FMC_NE1, EVENTOUT. |-| 89 | PB3(JTDO/TRACESWO) | bidirectional | 5V-tolerant (FT) I/O; default JTDO/TRACESWO debug function, alternate functions TIM2_CH2, SPI1_SCK/I2S1_CK, SPI3_SCK/I2S3_CK, SDMMC2_D2, EVENTOUT. |-| 90 | PB4(NJTRST) | bidirectional | 5V-tolerant (FT) I/O; default NJTRST debug function, alternate functions TIM3_CH1, SPI1_MISO, SPI3_MISO, SPI2_NSS/I2S2_WS, SDMMC2_D3, EVENTOUT. |+| 89 | PB3 | bidirectional | 5V-tolerant (FT) I/O; default JTDO/TRACESWO debug function, alternate functions TIM2_CH2, SPI1_SCK/I2S1_CK, SPI3_SCK/I2S3_CK, SDMMC2_D2, EVENTOUT. |+| 90 | PB4 | bidirectional | 5V-tolerant (FT) I/O; default NJTRST debug function, alternate functions TIM3_CH1, SPI1_MISO, SPI3_MISO, SPI2_NSS/I2S2_WS, SDMMC2_D3, EVENTOUT. | | 91 | PB5 | bidirectional | 5V-tolerant (FT) I/O; alternate functions TIM3_CH2, I2C1_SMBA, SPI1_MOSI/I2S1_SD, SPI3_MOSI/I2S3_SD, OTG_HS_ULPI_D7, FMC_SDCKE1, EVENTOUT. | | 92 | PB6 | bidirectional | 5V-tolerant with I2C Fm+ option (FTf) I/O; alternate functions TIM4_CH1, I2C1_SCL, USART1_TX, QUADSPI_BK1_NCS, FMC_SDNE1, EVENTOUT. | | 93 | PB7 | bidirectional | 5V-tolerant with I2C Fm+ option (FTf) I/O; alternate functions TIM4_CH2, I2C1_SDA, USART1_RX, FMC_NL, EVENTOUT. |-| 94 | BOOT | input | Dedicated boot mode selection input pin (structure B), sampled at reset to select the boot memory; also used as the VPP Flash programming voltage input. |+| 94 | BOOT0 | input | | | 95 | PB8 | bidirectional | 5V-tolerant with I2C Fm+ option (FTf) I/O; alternate functions TIM4_CH3, TIM10_CH1, I2C1_SCL, CAN1_RX, SDMMC2_D4, SDMMC1_D4, EVENTOUT. | | 96 | PB9 | bidirectional | 5V-tolerant with I2C Fm+ option (FTf) I/O; alternate functions TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, CAN1_TX, SDMMC2_D5, SDMMC1_D5, EVENTOUT. | | 97 | PE0 | bidirectional | 5V-tolerant (FT) I/O; alternate functions TIM4_ETR, LPTIM1_ETR, UART8_RX, SAI2_MCK_A, FMC_NBL0, EVENTOUT. |
package.json+2−2@@ -1,6 +1,6 @@ { "slug": "stm32f722vet6",- "version": "0.1.0",+ "version": "0.1.1", "type": "component", "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.", "tags": [@@ -700,4 +700,4 @@ "footprint": "viewers/footprint.html" } }-}+}
page.json+4−4@@ -4,7 +4,7 @@ "slug": "stm32f722vet6", "title": "STM32F722VET6", "brief": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.1.1", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -727,7 +727,7 @@ "viewers/symbol.html", "viewers/footprint.html" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "org": "adom" }
stm32f722vet6.kicad_sym+11−11@@ -37,11 +37,11 @@ (number "7" (effects (font (size 1.27 1.27)))) ) (pin bidirectional line (at -17.78 43.18 0) (length 5.08)- (name "PC14-OSC32_IN(PC14)" (effects (font (size 1.27 1.27))))+ (name "PC14-OSC32_IN" (effects (font (size 1.27 1.27)))) (number "8" (effects (font (size 1.27 1.27)))) ) (pin bidirectional line (at -17.78 40.64 0) (length 5.08)- (name "PC15-OSC32_OUT(PC15)" (effects (font (size 1.27 1.27))))+ (name "PC15-OSC32_OUT" (effects (font (size 1.27 1.27)))) (number "9" (effects (font (size 1.27 1.27)))) ) (pin power_in line (at -17.78 38.10 0) (length 5.08)@@ -60,7 +60,7 @@ (name "PH1-OSC_OUT" (effects (font (size 1.27 1.27)))) (number "13" (effects (font (size 1.27 1.27)))) )- (pin bidirectional line (at -17.78 27.94 0) (length 5.08)+ (pin input line (at -17.78 27.94 0) (length 5.08) (name "NRST" (effects (font (size 1.27 1.27)))) (number "14" (effects (font (size 1.27 1.27)))) )@@ -196,7 +196,7 @@ (name "PB11" (effects (font (size 1.27 1.27)))) (number "47" (effects (font (size 1.27 1.27)))) )- (pin power_out line (at -17.78 -58.42 0) (length 5.08)+ (pin power_in line (at -17.78 -58.42 0) (length 5.08) (name "VCAP_1" (effects (font (size 1.27 1.27)))) (number "48" (effects (font (size 1.27 1.27)))) )@@ -233,7 +233,7 @@ (number "95" (effects (font (size 1.27 1.27)))) ) (pin input line (at 17.78 45.72 180) (length 5.08)- (name "BOOT" (effects (font (size 1.27 1.27))))+ (name "BOOT0" (effects (font (size 1.27 1.27)))) (number "94" (effects (font (size 1.27 1.27)))) ) (pin bidirectional line (at 17.78 43.18 180) (length 5.08)@@ -249,11 +249,11 @@ (number "91" (effects (font (size 1.27 1.27)))) ) (pin bidirectional line (at 17.78 35.56 180) (length 5.08)- (name "PB4(NJTRST)" (effects (font (size 1.27 1.27))))+ (name "PB4" (effects (font (size 1.27 1.27)))) (number "90" (effects (font (size 1.27 1.27)))) ) (pin bidirectional line (at 17.78 33.02 180) (length 5.08)- (name "PB3(JTDO/TRACESWO)" (effects (font (size 1.27 1.27))))+ (name "PB3" (effects (font (size 1.27 1.27)))) (number "89" (effects (font (size 1.27 1.27)))) ) (pin bidirectional line (at 17.78 30.48 180) (length 5.08)@@ -301,11 +301,11 @@ (number "78" (effects (font (size 1.27 1.27)))) ) (pin bidirectional line (at 17.78 2.54 180) (length 5.08)- (name "PA15(JTDI)" (effects (font (size 1.27 1.27))))+ (name "PA15" (effects (font (size 1.27 1.27)))) (number "77" (effects (font (size 1.27 1.27)))) ) (pin bidirectional line (at 17.78 0.00 180) (length 5.08)- (name "PA14(JTCK-SWCLK)" (effects (font (size 1.27 1.27))))+ (name "PA14" (effects (font (size 1.27 1.27)))) (number "76" (effects (font (size 1.27 1.27)))) ) (pin power_in line (at 17.78 -2.54 180) (length 5.08)@@ -316,12 +316,12 @@ (name "VSS" (effects (font (size 1.27 1.27)))) (number "74" (effects (font (size 1.27 1.27)))) )- (pin power_out line (at 17.78 -7.62 180) (length 5.08)+ (pin power_in line (at 17.78 -7.62 180) (length 5.08) (name "VCAP_2" (effects (font (size 1.27 1.27)))) (number "73" (effects (font (size 1.27 1.27)))) ) (pin bidirectional line (at 17.78 -10.16 180) (length 5.08)- (name "PA13(JTMS-SWDIO)" (effects (font (size 1.27 1.27))))+ (name "PA13" (effects (font (size 1.27 1.27)))) (number "72" (effects (font (size 1.27 1.27)))) ) (pin bidirectional line (at 17.78 -12.70 180) (length 5.08)
stm32f722vet6.lbr+33−22@@ -50,7 +50,7 @@ <layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> </layers> <library>-<description></description>+<description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data</description> <packages> <package name="LQFP-100_14x14mm_P0.5mm"> <description>LQFP-100, 14 x 14 mm, 0.5 mm pitch</description>@@ -180,6 +180,7 @@ </packages> <symbols> <symbol name="STM32F722VET6">+ <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data</description> <wire x1="-12.7" y1="63.5" x2="12.7" y2="63.5" width="0.254" layer="94"/> <wire x1="12.7" y1="63.5" x2="12.7" y2="-66.04" width="0.254" layer="94"/> <wire x1="12.7" y1="-66.04" x2="-12.7" y2="-66.04" width="0.254" layer="94"/>@@ -193,13 +194,13 @@ <pin name="PE6" x="-17.78" y="50.8" length="middle" direction="io"/> <pin name="VBAT" x="-17.78" y="48.26" length="middle" direction="pwr"/> <pin name="PC13" x="-17.78" y="45.72" length="middle" direction="io"/>- <pin name="PC14-OSC32_IN_PC14" x="-17.78" y="43.18" length="middle" direction="io"/>- <pin name="PC15-OSC32_OUT_PC15" x="-17.78" y="40.64" length="middle" direction="io"/>+ <pin name="PC14-OSC32_IN" x="-17.78" y="43.18" length="middle" direction="io"/>+ <pin name="PC15-OSC32_OUT" x="-17.78" y="40.64" length="middle" direction="io"/> <pin name="VSS" x="-17.78" y="38.1" length="middle" direction="pwr"/> <pin name="VDD" x="-17.78" y="35.56" length="middle" direction="pwr"/> <pin name="PH0-OSC_IN" x="-17.78" y="33.02" length="middle" direction="io"/> <pin name="PH1-OSC_OUT" x="-17.78" y="30.48" length="middle" direction="io"/>- <pin name="NRST" x="-17.78" y="27.94" length="middle" direction="io"/>+ <pin name="NRST" x="-17.78" y="27.94" length="middle" direction="in"/> <pin name="PC0" x="-17.78" y="25.4" length="middle" direction="io"/> <pin name="PC1" x="-17.78" y="22.86" length="middle" direction="io"/> <pin name="PC2" x="-17.78" y="20.32" length="middle" direction="io"/>@@ -233,7 +234,7 @@ <pin name="PE15" x="-17.78" y="-50.8" length="middle" direction="io"/> <pin name="PB10" x="-17.78" y="-53.34" length="middle" direction="io"/> <pin name="PB11" x="-17.78" y="-55.88" length="middle" direction="io"/>- <pin name="VCAP_1" x="-17.78" y="-58.42" length="middle" direction="out"/>+ <pin name="VCAP_1" x="-17.78" y="-58.42" length="middle" direction="pwr"/> <pin name="VSS@3" x="-17.78" y="-60.96" length="middle" direction="pwr"/> <pin name="VDD@3" x="-17.78" y="-63.5" length="middle" direction="pwr"/> <pin name="VDD@4" x="17.78" y="60.96" length="middle" direction="pwr" rot="R180"/>@@ -242,12 +243,12 @@ <pin name="PE0" x="17.78" y="53.34" length="middle" direction="io" rot="R180"/> <pin name="PB9" x="17.78" y="50.8" length="middle" direction="io" rot="R180"/> <pin name="PB8" x="17.78" y="48.26" length="middle" direction="io" rot="R180"/>- <pin name="BOOT" x="17.78" y="45.72" length="middle" direction="in" rot="R180"/>+ <pin name="BOOT0" x="17.78" y="45.72" length="middle" direction="in" rot="R180"/> <pin name="PB7" x="17.78" y="43.18" length="middle" direction="io" rot="R180"/> <pin name="PB6" x="17.78" y="40.64" length="middle" direction="io" rot="R180"/> <pin name="PB5" x="17.78" y="38.1" length="middle" direction="io" rot="R180"/>- <pin name="PB4_NJTRST" x="17.78" y="35.56" length="middle" direction="io" rot="R180"/>- <pin name="PB3_JTDO/TRACESWO" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PB4" x="17.78" y="35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PB3" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/> <pin name="PD7" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/> <pin name="PD6" x="17.78" y="27.94" length="middle" direction="io" rot="R180"/> <pin name="PD5" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>@@ -259,12 +260,12 @@ <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/> <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/> <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>- <pin name="PA15_JTDI" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>- <pin name="PA14_JTCK-SWCLK" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="PA15" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+ <pin name="PA14" x="17.78" y="0" length="middle" direction="io" rot="R180"/> <pin name="VDD@5" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/> <pin name="VSS@5" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>- <pin name="VCAP_2" x="17.78" y="-7.62" length="middle" direction="out" rot="R180"/>- <pin name="PA13_JTMS-SWDIO" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="VCAP_2" x="17.78" y="-7.62" length="middle" direction="pwr" rot="R180"/>+ <pin name="PA13" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/> <pin name="PA12" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/> <pin name="PA11" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/> <pin name="PA10" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>@@ -290,7 +291,7 @@ </symbols> <devicesets> <deviceset name="STM32F722VET6" prefix="U">- <description></description>+ <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data</description> <gates> <gate name="G$1" symbol="STM32F722VET6" x="0" y="0"/> </gates>@@ -304,8 +305,8 @@ <connect gate="G$1" pin="PE6" pad="5"/> <connect gate="G$1" pin="VBAT" pad="6"/> <connect gate="G$1" pin="PC13" pad="7"/>- <connect gate="G$1" pin="PC14-OSC32_IN_PC14" pad="8"/>- <connect gate="G$1" pin="PC15-OSC32_OUT_PC15" pad="9"/>+ <connect gate="G$1" pin="PC14-OSC32_IN" pad="8"/>+ <connect gate="G$1" pin="PC15-OSC32_OUT" pad="9"/> <connect gate="G$1" pin="VSS" pad="10"/> <connect gate="G$1" pin="VDD" pad="11"/> <connect gate="G$1" pin="PH0-OSC_IN" pad="12"/>@@ -353,12 +354,12 @@ <connect gate="G$1" pin="PE0" pad="97"/> <connect gate="G$1" pin="PB9" pad="96"/> <connect gate="G$1" pin="PB8" pad="95"/>- <connect gate="G$1" pin="BOOT" pad="94"/>+ <connect gate="G$1" pin="BOOT0" pad="94"/> <connect gate="G$1" pin="PB7" pad="93"/> <connect gate="G$1" pin="PB6" pad="92"/> <connect gate="G$1" pin="PB5" pad="91"/>- <connect gate="G$1" pin="PB4_NJTRST" pad="90"/>- <connect gate="G$1" pin="PB3_JTDO/TRACESWO" pad="89"/>+ <connect gate="G$1" pin="PB4" pad="90"/>+ <connect gate="G$1" pin="PB3" pad="89"/> <connect gate="G$1" pin="PD7" pad="88"/> <connect gate="G$1" pin="PD6" pad="87"/> <connect gate="G$1" pin="PD5" pad="86"/>@@ -370,12 +371,12 @@ <connect gate="G$1" pin="PC12" pad="80"/> <connect gate="G$1" pin="PC11" pad="79"/> <connect gate="G$1" pin="PC10" pad="78"/>- <connect gate="G$1" pin="PA15_JTDI" pad="77"/>- <connect gate="G$1" pin="PA14_JTCK-SWCLK" pad="76"/>+ <connect gate="G$1" pin="PA15" pad="77"/>+ <connect gate="G$1" pin="PA14" pad="76"/> <connect gate="G$1" pin="VDD@5" pad="75"/> <connect gate="G$1" pin="VSS@5" pad="74"/> <connect gate="G$1" pin="VCAP_2" pad="73"/>- <connect gate="G$1" pin="PA13_JTMS-SWDIO" pad="72"/>+ <connect gate="G$1" pin="PA13" pad="72"/> <connect gate="G$1" pin="PA12" pad="71"/> <connect gate="G$1" pin="PA11" pad="70"/> <connect gate="G$1" pin="PA10" pad="69"/>@@ -398,7 +399,17 @@ <connect gate="G$1" pin="PB13" pad="52"/> <connect gate="G$1" pin="PB12" pad="51"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="STM32F722VET6" constant="no"/>+ <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+ <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588858520867377152" constant="no"/>+ <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/stm32f722vet6" constant="no"/>+ <attribute name="MOUSER_PN" value="511-STM32F722VET6" constant="no"/>+ <attribute name="DIGIKEY_PN" value="497-17185-ND" constant="no"/>+ <attribute name="LCSC_PN" value="C132372" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>