component
STM32F469VIT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
← Commit history
Publish 0.1.1
5 files changed
+229−204
README.md+14−12@@ -9,15 +9,16 @@ STM32F469VIT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | Pin | Name | Type | Function | |---|---|---|---| | 1 | PE2 | bidirectional | GPIO Port E pin 2, alternate functions include TRACECLK, SPI4_SCK, SAI1_MCLK_A with 5V tolerant I/O structure. |+| 2 | VSS | power_in | Ground supply connection. | | 3 | VBAT | power_in | Backup battery supply for RTC, backup SRAM and backup registers, 1.8V to 3.6V. | | 4 | PC13 | bidirectional | GPIO Port C pin 13 with RTC tamper or timestamp capability, 5V tolerant through power switch with 3mA current limit. |-| 5 | PC14-OSC32_IN | bidirectional | GPIO Port C pin 14 or 32 kHz oscillator input, 5V tolerant through power switch with limited current capability. |-| 6 | PC15-OSC32_OUT | bidirectional | GPIO Port C pin 15 or 32 kHz oscillator output, 5V tolerant through power switch with limited current capability. |+| 5 | PC14/OSC32_IN | bidirectional | GPIO Port C pin 14 or 32 kHz oscillator input, 5V tolerant through power switch with limited current capability. |+| 6 | PC15/OSC32_OUT | bidirectional | GPIO Port C pin 15 or 32 kHz oscillator output, 5V tolerant through power switch with limited current capability. | | 7 | VSS | power_in | Ground supply connection. | | 8 | VDD | power_in | Main positive supply voltage, 1.7V to 3.6V. |-| 9 | PH0-OSC_IN | bidirectional | GPIO Port H pin 0 or external oscillator input for 4-26 MHz crystal, 5V tolerant. |-| 10 | PH1-OSC_OUT | bidirectional | GPIO Port H pin 1 or external oscillator output for 4-26 MHz crystal, 5V tolerant. |-| 11 | NRST | bidirectional | Active-low reset pin with internal weak pull-up resistor, resets device on low level. |+| 9 | PH0/OSC_IN | bidirectional | GPIO Port H pin 0 or external oscillator input for 4-26 MHz crystal, 5V tolerant. |+| 10 | PH1/OSC_OUT | bidirectional | GPIO Port H pin 1 or external oscillator output for 4-26 MHz crystal, 5V tolerant. |+| 11 | NRST | input | Active-low reset pin with internal weak pull-up resistor, resets device on low level. | | 12 | PC0 | bidirectional | GPIO Port C pin 0 with analog channel ADC123_IN10, alternate functions include OTG_HS_ULPI_STP, 5V tolerant. | | 13 | PC1 | bidirectional | GPIO Port C pin 1 with analog channel ADC123_IN11, alternate functions include SPI2_MOSI, ETH_MDC, 5V tolerant. | | 14 | PC2 | bidirectional | GPIO Port C pin 2 with analog channel ADC123_IN12, alternate functions include SPI2_MISO, OTG_HS_ULPI_DIR, 5V tolerant. |@@ -25,7 +26,7 @@ STM32F469VIT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | 16 | VSSA | power_in | Analog ground supply for ADCs and DAC. | | 17 | VREF+ | power_in | Positive reference voltage for ADCs, 1.7V to 3.6V. | | 18 | VDDA | power_in | Analog power supply for ADCs and temperature sensor, 1.7V to 3.6V. |-| 19 | PA0-WKUP | bidirectional | GPIO Port A pin 0 with wakeup capability and analog channel ADC123_IN0, alternate timer/UART functions, 5V tolerant. |+| 19 | PA0/WKUP | bidirectional | GPIO Port A pin 0 with wakeup capability and analog channel ADC123_IN0, alternate timer/UART functions, 5V tolerant. | | 20 | PA1 | bidirectional | GPIO Port A pin 1 with analog channel ADC123_IN1, alternate functions include TIM2_CH2, USART2_RTS, 5V tolerant. | | 21 | PA2 | bidirectional | GPIO Port A pin 2 with analog channel ADC123_IN2, alternate functions include TIM2_CH3, USART2_TX, 5V tolerant. | | 22 | PA3 | bidirectional | GPIO Port A pin 3 with analog channel ADC123_IN3, alternate functions include TIM2_CH4, USART2_RX, 5V tolerant. |@@ -37,7 +38,7 @@ STM32F469VIT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | 28 | PA7 | bidirectional | GPIO Port A pin 7 with analog channel ADC12_IN7, 5V tolerant, alternate functions include TIM1_CH1N, SPI1_MOSI, QUADSPI_CLK. | | 29 | PB0 | bidirectional | GPIO Port B pin 0 with analog channel ADC12_IN8, 5V tolerant, alternate functions include TIM1_CH2N, TIM3_CH3. | | 30 | PB1 | bidirectional | GPIO Port B pin 1 with analog channel ADC12_IN9, 5V tolerant, alternate functions include TIM1_CH3N, TIM3_CH4. |-| 31 | PB2-BOOT1 | bidirectional | GPIO Port B pin 2 with boot selection capability, 5V tolerant, floating input after reset. |+| 31 | PB2/BOOT1 | bidirectional | GPIO Port B pin 2 with boot selection capability, 5V tolerant, floating input after reset. | | 32 | PE7 | bidirectional | GPIO Port E pin 7, 5V tolerant, alternate functions include TIM1_ETR, UART7_RX, QUADSPI_BK2_IO0, FMC_D4. | | 33 | PE8 | bidirectional | GPIO Port E pin 8, 5V tolerant, alternate functions include TIM1_CH1N, UART7_TX, QUADSPI_BK2_IO1, FMC_D5. | | 34 | PE9 | bidirectional | GPIO Port E pin 9, 5V tolerant, alternate functions include TIM1_CH1, QUADSPI_BK2_IO2, FMC_D6. |@@ -81,11 +82,12 @@ STM32F469VIT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | 72 | PA10 | bidirectional | GPIO Port A pin 10, 5V tolerant, alternate functions include TIM1_CH3, USART1_RX, OTG_FS_ID, DCMI_D1. | | 73 | PA11 | bidirectional | GPIO Port A pin 11, 5V tolerant, alternate functions include TIM1_CH4, USART1_CTS, CAN1_RX, OTG_FS_DM. | | 74 | PA12 | bidirectional | GPIO Port A pin 12, 5V tolerant, alternate functions include TIM1_ETR, USART1_RTS, CAN1_TX, OTG_FS_DP. |-| 75 | PA13(JTMS-SWDIO) | bidirectional | GPIO Port A pin 13, JTAG test mode select and SWD data I/O, 5V tolerant, debug interface pin. |+| 75 | PA13 | bidirectional | GPIO Port A pin 13, JTAG test mode select and SWD data I/O, 5V tolerant, debug interface pin. | | 76 | VCAP2 | power_in | External capacitor connection for PLL voltage regulator, typically 1-10 µF capacitor to ground. | | 77 | VDD | power_in | Main positive supply voltage, 1.7V to 3.6V. |-| 79 | PA14(JTCK-SWCLK) | bidirectional | GPIO Port A pin 14, JTAG test clock and SWD clock, 5V tolerant, debug interface pin. |-| 80 | PA15(JTDI) | bidirectional | GPIO Port A pin 15, JTAG test data input, 5V tolerant, alternate SPI/timer functions, debug interface pin. |+| 78 | VSS | power_in | Ground supply connection. |+| 79 | PA14 | bidirectional | GPIO Port A pin 14, JTAG test clock and SWD clock, 5V tolerant, debug interface pin. |+| 80 | PA15 | bidirectional | GPIO Port A pin 15, JTAG test data input, 5V tolerant, alternate SPI/timer functions, debug interface pin. | | 81 | PC10 | bidirectional | GPIO Port C pin 10, 5V tolerant, alternate functions include SPI3_SCK, USART3_TX, QUADSPI_BK1_IO1, SDIO_D2. | | 82 | PC11 | bidirectional | GPIO Port C pin 11, 5V tolerant, alternate functions include SPI3_MISO, USART3_RX, QUADSPI_BK2_NCS, SDIO_D3. | | 83 | PC12 | bidirectional | GPIO Port C pin 12, 5V tolerant, alternate functions include TRACED3, SPI3_MOSI, USART3_CK, UART5_TX, SDIO_CK. |@@ -97,8 +99,8 @@ STM32F469VIT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | 89 | PD5 | bidirectional | GPIO Port D pin 5, 5V tolerant, alternate functions include USART2_TX, FMC_NWE. | | 90 | PD6 | bidirectional | GPIO Port D pin 6, 5V tolerant, alternate functions include SPI3_MOSI, USART2_RX, FMC_NWAIT, DCMI_D10. | | 91 | PD7 | bidirectional | GPIO Port D pin 7, 5V tolerant, alternate functions include USART2_CK, FMC_NE1. |-| 92 | PB3(JTDO/TRACESWO) | bidirectional | GPIO Port B pin 3, JTAG test data output and serial wire output, 5V tolerant, debug interface pin. |-| 93 | PB4(NJTRST) | bidirectional | GPIO Port B pin 4, JTAG test reset, 5V tolerant, alternate TIM3 and SPI functions, debug interface pin. |+| 92 | PB3 | bidirectional | GPIO Port B pin 3, JTAG test data output and serial wire output, 5V tolerant, debug interface pin. |+| 93 | PB4 | bidirectional | GPIO Port B pin 4, JTAG test reset, 5V tolerant, alternate TIM3 and SPI functions, debug interface pin. | | 94 | PB5 | bidirectional | GPIO Port B pin 5, 5V tolerant, alternate functions include TIM3_CH2, I2C1_SMBA, SPI1_MOSI, CAN2_RX. | | 95 | PB6 | bidirectional | GPIO Port B pin 6, 5V tolerant, alternate functions include TIM4_CH1, I2C1_SCL, USART1_TX, CAN2_TX, QUADSPI_BK1_NCS. | | 96 | PB7 | bidirectional | GPIO Port B pin 7, 5V tolerant, alternate functions include TIM4_CH2, I2C1_SDA, USART1_RX, FMC_NL. |
package.json+2−2@@ -1,6 +1,6 @@ { "slug": "stm32f469vit6",- "version": "0.1.0",+ "version": "0.1.1", "type": "component", "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.", "tags": [@@ -673,4 +673,4 @@ "footprint": "viewers/footprint.html" } }-}+}
page.json+4−4@@ -4,7 +4,7 @@ "slug": "stm32f469vit6", "title": "STM32F469VIT6", "brief": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.1.1", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -700,7 +700,7 @@ "viewers/symbol.html", "viewers/footprint.html" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "org": "adom" }
stm32f469vit6.kicad_sym+94−86@@ -1,10 +1,10 @@ (kicad_symbol_lib (version 20211014) (generator ds2sf_rect) (symbol "STM32F469VIT6" (in_bom yes) (on_board yes) (property "Reference" "U" (at 0 66.04 0) (effects (font (size 1.27 1.27))))- (property "Value" "STM32F469VIT6" (at 0 -66.04 0) (effects (font (size 1.27 1.27))))+ (property "Value" "STM32F469VIT6" (at 0 -68.58 0) (effects (font (size 1.27 1.27)))) (property "Footprint" "" (at 0 0 0) (effects (font (size 1.27 1.27)) hide)) (symbol "STM32F469VIT6_0_1"- (rectangle (start -12.70 63.50) (end 12.70 -63.50)+ (rectangle (start -12.70 63.50) (end 12.70 -66.04) (stroke (width 0.254) (type default)) (fill (type background))) ) (symbol "STM32F469VIT6_1_1"@@ -13,194 +13,198 @@ (number "1" (effects (font (size 1.27 1.27)))) ) (pin power_in line (at -17.78 58.42 0) (length 5.08)+ (name "VSS" (effects (font (size 1.27 1.27))))+ (number "2" (effects (font (size 1.27 1.27))))+ )+ (pin power_in line (at -17.78 55.88 0) (length 5.08) (name "VBAT" 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direction="io" rot="R180"/> <pin name="PD5" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>@@ -255,40 +257,41 @@ <pin name="PC12" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/> <pin name="PC11" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/> <pin name="PC10" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>- <pin name="PA15_JTDI" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>- <pin name="PA14_JTCK-SWCLK" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>- <pin name="VDD@5" x="17.78" y="5.08" length="middle" direction="pwr" rot="R180"/>- <pin name="VCAP2" x="17.78" y="2.54" length="middle" direction="pwr" rot="R180"/>- <pin name="PA13_JTMS-SWDIO" x="17.78" y="0" length="middle" direction="io" rot="R180"/>- <pin name="PA12" x="17.78" y="-2.54" length="middle" direction="io" rot="R180"/>- <pin name="PA11" x="17.78" y="-5.08" length="middle" direction="io" rot="R180"/>- <pin name="PA10" x="17.78" y="-7.62" length="middle" direction="io" rot="R180"/>- <pin name="PA9" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>- <pin name="PA8" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>- <pin name="PC9" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>- <pin name="PC8" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>- <pin name="PC7" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>- <pin name="PC6" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>- <pin name="VDDUSB" x="17.78" y="-25.4" length="middle" direction="pwr" rot="R180"/>- <pin name="DSIHOST_D1N" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>- <pin name="DSIHOST_D1P" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>- <pin name="VDD12DSI" x="17.78" y="-33.02" length="middle" direction="pwr" rot="R180"/>- <pin name="DSIHOST_CKN" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>- <pin name="DSIHOST_CKP" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>- <pin name="VSSDSI" x="17.78" y="-40.64" length="middle" direction="pwr" rot="R180"/>- <pin name="DSIHOST_D0N" x="17.78" y="-43.18" length="middle" direction="io" rot="R180"/>- <pin name="DSIHOST_D0P" x="17.78" y="-45.72" length="middle" direction="io" rot="R180"/>- <pin name="VCAPDSI" x="17.78" y="-48.26" length="middle" direction="pwr" rot="R180"/>- <pin name="VDDDSI" x="17.78" y="-50.8" length="middle" direction="pwr" rot="R180"/>- <pin name="PD15" x="17.78" y="-53.34" length="middle" direction="io" rot="R180"/>- <pin name="PD14" x="17.78" y="-55.88" length="middle" direction="io" rot="R180"/>- <pin name="PD10" x="17.78" y="-58.42" length="middle" direction="io" rot="R180"/>- <pin name="PD9" x="17.78" y="-60.96" length="middle" direction="io" rot="R180"/>+ <pin name="PA15" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PA14" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>+ <pin name="VSS@5" x="17.78" y="5.08" length="middle" direction="pwr" rot="R180"/>+ <pin name="VDD@5" x="17.78" y="2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="VCAP2" x="17.78" y="0" length="middle" direction="pwr" rot="R180"/>+ <pin name="PA13" x="17.78" y="-2.54" length="middle" direction="io" rot="R180"/>+ <pin name="PA12" x="17.78" y="-5.08" length="middle" direction="io" rot="R180"/>+ <pin name="PA11" x="17.78" y="-7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PA10" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PA9" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PA8" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PC9" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PC8" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PC7" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PC6" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="VDDUSB" x="17.78" y="-27.94" length="middle" direction="pwr" rot="R180"/>+ <pin name="DSIHOST_D1N" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+ <pin name="DSIHOST_D1P" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+ <pin name="VDD12DSI" x="17.78" y="-35.56" length="middle" direction="pwr" rot="R180"/>+ <pin name="DSIHOST_CKN" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>+ <pin name="DSIHOST_CKP" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+ <pin name="VSSDSI" x="17.78" y="-43.18" length="middle" direction="pwr" rot="R180"/>+ <pin name="DSIHOST_D0N" x="17.78" y="-45.72" length="middle" direction="io" rot="R180"/>+ <pin name="DSIHOST_D0P" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>+ <pin name="VCAPDSI" x="17.78" y="-50.8" length="middle" direction="pwr" rot="R180"/>+ <pin name="VDDDSI" x="17.78" y="-53.34" length="middle" direction="pwr" rot="R180"/>+ <pin name="PD15" x="17.78" y="-55.88" length="middle" direction="io" rot="R180"/>+ <pin name="PD14" x="17.78" y="-58.42" length="middle" direction="io" rot="R180"/>+ <pin name="PD10" x="17.78" y="-60.96" length="middle" direction="io" rot="R180"/>+ <pin name="PD9" x="17.78" y="-63.5" length="middle" direction="io" rot="R180"/> </symbol> </symbols> <devicesets> <deviceset name="STM32F469VIT6" prefix="U">- <description></description>+ <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data</description> <gates> <gate name="G$1" symbol="STM32F469VIT6" x="0" y="0"/> </gates>@@ -296,14 +299,15 @@ <device name="" package="LQFP-100_14x14mm_P0.5mm"> <connects> <connect gate="G$1" pin="PE2" pad="1"/>+ <connect gate="G$1" pin="VSS" pad="2"/> <connect gate="G$1" pin="VBAT" pad="3"/> <connect gate="G$1" pin="PC13" pad="4"/>- <connect gate="G$1" pin="PC14-OSC32_IN" pad="5"/>- <connect gate="G$1" pin="PC15-OSC32_OUT" pad="6"/>- <connect gate="G$1" pin="VSS" pad="7"/>+ <connect gate="G$1" pin="PC14/OSC32_IN" pad="5"/>+ <connect gate="G$1" pin="PC15/OSC32_OUT" pad="6"/>+ <connect gate="G$1" pin="VSS@2" pad="7"/> <connect gate="G$1" pin="VDD" pad="8"/>- <connect gate="G$1" pin="PH0-OSC_IN" pad="9"/>- <connect gate="G$1" pin="PH1-OSC_OUT" pad="10"/>+ <connect gate="G$1" pin="PH0/OSC_IN" pad="9"/>+ <connect gate="G$1" pin="PH1/OSC_OUT" pad="10"/> <connect gate="G$1" pin="NRST" pad="11"/> <connect gate="G$1" pin="PC0" pad="12"/> <connect gate="G$1" pin="PC1" pad="13"/>@@ -312,11 +316,11 @@ <connect gate="G$1" pin="VSSA" pad="16"/> <connect gate="G$1" pin="VREF+" pad="17"/> <connect gate="G$1" pin="VDDA" pad="18"/>- <connect gate="G$1" pin="PA0-WKUP" pad="19"/>+ <connect gate="G$1" pin="PA0/WKUP" pad="19"/> <connect gate="G$1" pin="PA1" pad="20"/> <connect gate="G$1" pin="PA2" pad="21"/> <connect gate="G$1" pin="PA3" pad="22"/>- <connect gate="G$1" pin="VSS@2" pad="23"/>+ <connect gate="G$1" pin="VSS@3" pad="23"/> <connect gate="G$1" pin="VDD@2" pad="24"/> <connect gate="G$1" pin="PA4" pad="25"/> <connect gate="G$1" pin="PA5" pad="26"/>@@ -324,7 +328,7 @@ <connect gate="G$1" pin="PA7" pad="28"/> <connect gate="G$1" pin="PB0" pad="29"/> <connect gate="G$1" pin="PB1" pad="30"/>- <connect gate="G$1" pin="PB2-BOOT1" pad="31"/>+ <connect gate="G$1" pin="PB2/BOOT1" pad="31"/> <connect gate="G$1" pin="PE7" pad="32"/> <connect gate="G$1" pin="PE8" pad="33"/> <connect gate="G$1" pin="PE9" pad="34"/>@@ -337,7 +341,7 @@ <connect gate="G$1" pin="PB10" pad="41"/> <connect gate="G$1" pin="PB11" pad="42"/> <connect gate="G$1" pin="VCAP1" pad="43"/>- <connect gate="G$1" pin="VSS@3" pad="44"/>+ <connect gate="G$1" pin="VSS@4" pad="44"/> <connect gate="G$1" pin="VDD@3" pad="45"/> <connect gate="G$1" pin="PB12" pad="46"/> <connect gate="G$1" pin="PB13" pad="47"/>@@ -351,8 +355,8 @@ <connect gate="G$1" pin="PB7" pad="96"/> <connect gate="G$1" pin="PB6" pad="95"/> <connect gate="G$1" pin="PB5" pad="94"/>- <connect gate="G$1" pin="PB4_NJTRST" pad="93"/>- <connect gate="G$1" pin="PB3_JTDO/TRACESWO" pad="92"/>+ <connect gate="G$1" pin="PB4" pad="93"/>+ <connect gate="G$1" pin="PB3" pad="92"/> <connect gate="G$1" pin="PD7" pad="91"/> <connect gate="G$1" pin="PD6" pad="90"/> <connect gate="G$1" pin="PD5" pad="89"/>@@ -364,11 +368,12 @@ <connect gate="G$1" pin="PC12" pad="83"/> <connect gate="G$1" pin="PC11" pad="82"/> <connect gate="G$1" pin="PC10" pad="81"/>- <connect gate="G$1" pin="PA15_JTDI" pad="80"/>- <connect gate="G$1" pin="PA14_JTCK-SWCLK" pad="79"/>+ <connect gate="G$1" pin="PA15" pad="80"/>+ <connect gate="G$1" pin="PA14" pad="79"/>+ <connect gate="G$1" pin="VSS@5" pad="78"/> <connect gate="G$1" pin="VDD@5" pad="77"/> <connect gate="G$1" pin="VCAP2" pad="76"/>- <connect gate="G$1" pin="PA13_JTMS-SWDIO" pad="75"/>+ <connect gate="G$1" pin="PA13" pad="75"/> <connect gate="G$1" pin="PA12" pad="74"/> <connect gate="G$1" pin="PA11" pad="73"/> <connect gate="G$1" pin="PA10" pad="72"/>@@ -394,7 +399,17 @@ <connect gate="G$1" pin="PD10" pad="52"/> <connect gate="G$1" pin="PD9" pad="51"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="STM32F469VIT6" constant="no"/>+ <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+ <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603155505737187328" constant="no"/>+ <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/stm32f469vit6" constant="no"/>+ <attribute name="MOUSER_PN" value="511-STM32F469VIT6" constant="no"/>+ <attribute name="DIGIKEY_PN" value="497-16782-ND" constant="no"/>+ <attribute name="LCSC_PN" value="C2970187" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>