component
STM32F469VET6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+136@@ -0,0 +1,136 @@+# STM32F469VET6++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)++STM32F469VET6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PE2 | bidirectional | 5 V tolerant (FT) I/O, floating input after reset; alternate functions TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, ETH_MII_TXD3, FMC_A23, EVENTOUT. |+| 2 | VSS | power_in | Ground supply pin. |+| 3 | VBAT | power_in | Backup supply for RTC, backup registers and backup SRAM (VBAT = 1.8 to 3.6 V per block diagram). |+| 4 | PC13 | bidirectional | FT I/O supplied through the power switch (3 mA sink limit), so output speed must not exceed 2 MHz with max 30 pF load and it must not source current; additional functions RTC_TAMP1/RTC_TS/RTC_OUT. |+| 5 | PC14-OSC32_IN | bidirectional | FT I/O (PC14) supplied through the power switch with 2 MHz/30 pF output limit; additional function OSC32_IN for the 32 kHz oscillator, not 5 V tolerant in oscillator mode. |+| 6 | PC15-OSC32_OUT | bidirectional | FT I/O (PC15) supplied through the power switch with 2 MHz/30 pF output limit; additional function OSC32_OUT for the 32 kHz oscillator, not 5 V tolerant in oscillator mode. |+| 7 | VSS | power_in | Ground supply pin. |+| 8 | VDD | power_in | Digital supply pin (application supply 1.7 V to 3.6 V). |+| 9 | PH0-OSC_IN | bidirectional | FT I/O (PH0) with additional function OSC_IN for the 4-to-26 MHz crystal oscillator, not 5 V tolerant in oscillator mode. |+| 10 | PH1-OSC_OUT | bidirectional | FT I/O (PH1) with additional function OSC_OUT for the 4-to-26 MHz crystal oscillator, not 5 V tolerant in oscillator mode. |+| 11 | NRST | bidirectional | Bidirectional reset pin with weak pull-up resistor. |+| 12 | PC0 | bidirectional | FT I/O; ADC123_IN10 analog input and alternate functions OTG_HS_ULPI_STP, FMC_SDNWE, LCD_R5, EVENTOUT; 5 V tolerant except in analog mode. |+| 13 | PC1 | bidirectional | FT I/O; ADC123_IN11 analog input and alternate functions TRACED0, SPI2_MOSI/I2S2_SD, SAI1_SD_A, ETH_MDC, EVENTOUT. |+| 14 | PC2 | bidirectional | FT I/O; ADC123_IN12 analog input and alternate functions SPI2_MISO, I2S2ext_SD, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0. |+| 15 | PC3 | bidirectional | FT I/O; ADC123_IN13 analog input and alternate functions SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0. |+| 16 | VSSA | power_in | Analog ground supply pin. |+| 17 | VREF+ | power_in | Positive analog reference voltage input for the ADCs and DACs. |+| 18 | VDDA | power_in | Analog supply pin. |+| 19 | PA0-WKUP | bidirectional | FT I/O; ADC123_IN0 and WKUP additional functions, alternate functions TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, ETH_MII_CRS. |+| 20 | PA1 | bidirectional | FT I/O; ADC123_IN1 and alternate functions TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, ETH_MII_RX_CLK/ETH_RMII_REF_CLK, LCD_R2. |+| 21 | PA2 | bidirectional | FT I/O; ADC123_IN2 and alternate functions TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, ETH_MDIO, LCD_R1. |+| 22 | PA3 | bidirectional | FT I/O; ADC123_IN3 and alternate functions TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, LCD_B2, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5. |+| 23 | VSS | power_in | Ground supply pin. |+| 24 | VDD | power_in | Digital supply pin (application supply 1.7 V to 3.6 V). |+| 25 | PA4 | bidirectional | 3.3 V tolerant I/O directly connected to analog (TTa); ADC12_IN4 and DAC_OUT1, alternate functions SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC. |+| 26 | PA5 | bidirectional | TTa I/O; ADC12_IN5 and DAC_OUT2, alternate functions TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK, OTG_HS_ULPI_CK, LCD_R4. |+| 27 | PA6 | bidirectional | FT I/O; ADC12_IN6 and alternate functions TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM13_CH1, DCMI_PIXCLK, LCD_G2. |+| 28 | PA7 | bidirectional | FT I/O; ADC12_IN7 and alternate functions TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM14_CH1, QUADSPI_CLK, ETH_MII_RX_DV/ETH_RMII_CRS_DV, FMC_SDNWE. |+| 29 | PB0 | bidirectional | FT I/O; ADC12_IN8 and alternate functions TIM1_CH2N, TIM3_CH3, TIM8_CH2N, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2, LCD_G1. |+| 30 | PB1 | bidirectional | FT I/O; ADC12_IN9 and alternate functions TIM1_CH3N, TIM3_CH4, TIM8_CH3N, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3, LCD_G0. |+| 31 | PB2-BOOT1 | bidirectional | FT I/O that also serves as BOOT1 boot-mode selection; alternate function EVENTOUT. |+| 32 | PE7 | bidirectional | FT I/O; alternate functions TIM1_ETR, UART7_Rx, QUADSPI_BK2_IO0, FMC_D4, EVENTOUT. |+| 33 | PE8 | bidirectional | FT I/O; alternate functions TIM1_CH1N, UART7_Tx, QUADSPI_BK2_IO1, FMC_D5, EVENTOUT. |+| 34 | PE9 | bidirectional | FT I/O; alternate functions TIM1_CH1, QUADSPI_BK2_IO2, FMC_D6, EVENTOUT. |+| 35 | PE10 | bidirectional | FT I/O; alternate functions TIM1_CH2N, QUADSPI_BK2_IO3, FMC_D7, EVENTOUT. |+| 36 | PE11 | bidirectional | FT I/O; alternate functions TIM1_CH2, SPI4_NSS, FMC_D8, LCD_G3, EVENTOUT. |+| 37 | PE12 | bidirectional | FT I/O; alternate functions TIM1_CH3N, SPI4_SCK, FMC_D9, LCD_B4, EVENTOUT. |+| 38 | PE13 | bidirectional | FT I/O; alternate functions TIM1_CH3, SPI4_MISO, FMC_D10, LCD_DE, EVENTOUT. |+| 39 | PE14 | bidirectional | FT I/O; alternate functions TIM1_CH4, SPI4_MOSI, FMC_D11, LCD_CLK, EVENTOUT. |+| 40 | PE15 | bidirectional | FT I/O; alternate functions TIM1_BKIN, FMC_D12, LCD_R7, EVENTOUT. |+| 41 | PB10 | bidirectional | FT I/O; alternate functions TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX, QUADSPI_BK1_NCS, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4. |+| 42 | PB11 | bidirectional | FT I/O; alternate functions TIM2_CH4, I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN, DSIHOST_TE, LCD_G5. |+| 43 | VCAP1 | passive | Connection for the external capacitor of the internal 1.2 V voltage regulator (VCAP1/VCAP2 external capacitor). |+| 44 | VSS | power_in | Ground supply pin. |+| 45 | VDD | power_in | Digital supply pin (application supply 1.7 V to 3.6 V). |+| 46 | PB12 | bidirectional | FT I/O; alternate functions TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0, OTG_HS_ID. |+| 47 | PB13 | bidirectional | FT I/O; additional function OTG_HS_VBUS, alternate functions TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1. |+| 48 | PB14 | bidirectional | FT I/O; alternate functions TIM1_CH2N, TIM8_CH2N, SPI2_MISO, I2S2ext_SD, USART3_RTS, TIM12_CH1, OTG_HS_DM. |+| 49 | PB15 | bidirectional | FT I/O; alternate functions RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI/I2S2_SD, TIM12_CH2, OTG_HS_DP. |+| 50 | PD8 | bidirectional | FT I/O; alternate functions USART3_TX, FMC_D13, EVENTOUT. |+| 51 | PD9 | bidirectional | FT I/O; alternate functions USART3_RX, FMC_D14, EVENTOUT. |+| 52 | PD10 | bidirectional | FT I/O; alternate functions USART3_CK, FMC_D15, LCD_B3, EVENTOUT. |+| 53 | PD14 | bidirectional | FT I/O; alternate functions TIM4_CH3, FMC_D0, EVENTOUT. |+| 54 | PD15 | bidirectional | FT I/O; alternate functions TIM4_CH4, FMC_D1, EVENTOUT. |+| 55 | VDDDSI | power_in | Supply pin for the MIPI DSI host. |+| 56 | VCAPDSI | passive | DSI supply pin for an external capacitor (listed as a supply pin, VCAPDSI). |+| 57 | DSIHOST_D0P | bidirectional | MIPI DSI data lane 0 positive I/O. |+| 58 | DSIHOST_D0N | bidirectional | MIPI DSI data lane 0 negative I/O. |+| 59 | VSSDSI | power_in | Ground supply pin for the DSI host. |+| 60 | DSIHOST_CKP | bidirectional | MIPI DSI clock lane positive I/O. |+| 61 | DSIHOST_CKN | bidirectional | MIPI DSI clock lane negative I/O. |+| 62 | VDD12DSI | power_in | 1.2 V supply pin for the DSI host (VDD12DSI). |+| 63 | DSIHOST_D1P | bidirectional | MIPI DSI data lane 1 positive I/O. |+| 64 | DSIHOST_D1N | bidirectional | MIPI DSI data lane 1 negative I/O. |+| 65 | VDDUSB | power_in | Dedicated USB supply for the on-chip OTG PHYs (VDDUSB = 3.0 to 3.6 V). |+| 66 | PC6 | bidirectional | FT I/O; alternate functions TIM3_CH1, TIM8_CH1, I2S2_MCK, USART6_TX, SDIO_D6, DCMI_D0, LCD_HSYNC. |+| 67 | PC7 | bidirectional | FT I/O; alternate functions TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, SDIO_D7, DCMI_D1, LCD_G6. |+| 68 | PC8 | bidirectional | FT I/O; alternate functions TRACED1, TIM3_CH3, TIM8_CH3, USART6_CK, SDIO_D0, DCMI_D2. |+| 69 | PC9 | bidirectional | FT I/O; alternate functions MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, QUADSPI_BK1_IO0, SDIO_D1, DCMI_D3. |+| 70 | PA8 | bidirectional | FT I/O; alternate functions MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, OTG_FS_SOF, LCD_R6. |+| 71 | PA9 | bidirectional | FT I/O; additional function OTG_FS_VBUS, alternate functions TIM1_CH2, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX, DCMI_D0. |+| 72 | PA10 | bidirectional | FT I/O; alternate functions TIM1_CH3, USART1_RX, OTG_FS_ID, DCMI_D1. |+| 73 | PA11 | bidirectional | FT I/O; alternate functions TIM1_CH4, USART1_CTS, CAN1_RX, OTG_FS_DM, LCD_R4. |+| 74 | PA12 | bidirectional | FT I/O; alternate functions TIM1_ETR, USART1_RTS, CAN1_TX, OTG_FS_DP, LCD_R5. |+| 75 | PA13(JTMS-SWDIO) | bidirectional | FT I/O whose function after reset is JTMS-SWDIO debug pin. |+| 76 | VCAP2 | passive | Connection for the external capacitor of the internal 1.2 V voltage regulator (VCAP1/VCAP2 external capacitor). |+| 77 | VDD | power_in | Digital supply pin (application supply 1.7 V to 3.6 V). |+| 78 | VSS | power_in | Ground supply pin. |+| 79 | PA14(JTCK-SWCLK) | bidirectional | FT I/O whose function after reset is JTCK-SWCLK debug clock pin. |+| 80 | PA15(JTDI) | bidirectional | FT I/O whose function after reset is JTDI; alternate functions TIM2_CH1/TIM2_ETR, SPI1_NSS, SPI3_NSS/I2S3_WS. |+| 81 | PC10 | bidirectional | FT I/O; alternate functions SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDIO_D2, DCMI_D8, LCD_R2. |+| 82 | PC11 | bidirectional | FT I/O; alternate functions I2S3ext_SD, SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDIO_D3, DCMI_D4. |+| 83 | PC12 | bidirectional | FT I/O; alternate functions TRACED3, SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDIO_CK, DCMI_D9. |+| 84 | PD0 | bidirectional | FT I/O; alternate functions CAN1_RX, FMC_D2, EVENTOUT. |+| 85 | PD1 | bidirectional | FT I/O; alternate functions CAN1_TX, FMC_D3, EVENTOUT. |+| 86 | PD2 | bidirectional | FT I/O; alternate functions TRACED2, TIM3_ETR, UART5_RX, SDIO_CMD, DCMI_D11. |+| 87 | PD3 | bidirectional | FT I/O; alternate functions SPI2_SCK/I2S2_CK, USART2_CTS, FMC_CLK, DCMI_D5, LCD_G7. |+| 88 | PD4 | bidirectional | FT I/O; alternate functions USART2_RTS, FMC_NOE, EVENTOUT. |+| 89 | PD5 | bidirectional | FT I/O; alternate functions USART2_TX, FMC_NWE, EVENTOUT. |+| 90 | PD6 | bidirectional | FT I/O; alternate functions SPI3_MOSI/I2S3_SD, SAI1_SD_A, USART2_RX, FMC_NWAIT, DCMI_D10, LCD_B2. |+| 91 | PD7 | bidirectional | FT I/O; alternate functions USART2_CK, FMC_NE1, EVENTOUT. |+| 92 | PB3(JTDO/TRACESWO) | bidirectional | FT I/O whose function after reset is JTDO/TRACESWO; alternate functions TIM2_CH2, SPI1_SCK, SPI3_SCK/I2S3_CK. |+| 93 | PB4(NJTRST) | bidirectional | FT I/O whose function after reset is NJTRST; alternate functions TIM3_CH1, SPI1_MISO, SPI3_MISO, I2S3ext_SD. |+| 94 | PB5 | bidirectional | FT I/O; alternate functions TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI/I2S3_SD, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1, DCMI_D10, LCD_G7. |+| 95 | PB6 | bidirectional | FT I/O; alternate functions TIM4_CH1, I2C1_SCL, USART1_TX, CAN2_TX, QUADSPI_BK1_NCS, FMC_SDNE1, DCMI_D5. |+| 96 | PB7 | bidirectional | FT I/O; alternate functions TIM4_CH2, I2C1_SDA, USART1_RX, FMC_NL, DCMI_VSYNC. |+| 97 | BOOT0 | input | Dedicated boot mode selection input pin (also VPP function). |+| 98 | PB8 | bidirectional | FT I/O; alternate functions TIM4_CH3, TIM10_CH1, I2C1_SCL, CAN1_RX, ETH_MII_TXD3, SDIO_D4, DCMI_D6, LCD_B6. |+| 99 | PB9 | bidirectional | FT I/O; alternate functions TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, CAN1_TX, SDIO_D5, DCMI_D7, LCD_B7. |+| 100 | VDD | power_in | Digital supply pin (application supply 1.7 V to 3.6 V). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-100(14x14) |+| Category | Embedded Processors & Controllers |+| Pins | 100 |++## CAD (KiCad official)++- Symbol: `STM32F469VET6`+- Footprint: `Package_QFP:LQFP-100_14x14mm_P0.5mm`+- 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)+- 3D model files: `stm32f469vet6-etched.step` / `stm32f469vet6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f469vet6.step` / `stm32f469vet6.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922360392638464) (220 pp, sha256 `a7b7191d1d38665a`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32f469vet6-datasheet.pdf)
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Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32f469vet6",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32f469vet6.kicad_sym",+ "stm32f469vet6.kicad_mod",+ "stm32f469vet6.glb",+ "stm32f469vet6.step",+ "stm32f469vet6.lbr",+ "docs/hero.png",+ "docs/stm32f469vet6-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm32f469vet6-hero.glb",+ "stm32f469vet6-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM32F469VET6",+ "manufacturer": "STMicroelectronics",+ "package": "LQFP-100(14x14)",+ "pin_count": 100,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922360392638464",+ "parts": {+ "symbol": "stm32f469vet6.kicad_sym",+ "footprint": "stm32f469vet6.kicad_mod",+ "model_3d": "stm32f469vet6-hero.glb",+ "model_3d_plain": "stm32f469vet6.glb",+ "model_3d_step": "stm32f469vet6-etched.step",+ "model_3d_step_plain": "stm32f469vet6.step",+ "lbr": "stm32f469vet6.lbr"+ },+ "distributor_links": {+ "lcsc": "C1344952",+ "digikey": "497-16780-ND",+ "mouser": "511-STM32F469VET6"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T07:53:13Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-16780-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32F469VET6",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "PE2",+ "type": "bidirectional",+ "description": "5 V tolerant (FT) I/O, floating input after reset; alternate functions TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, ETH_MII_TXD3, FMC_A23, EVENTOUT."+ },+ {+ "number": "2",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground supply pin."+ },+ {+ "number": "3",+ "name": "VBAT",+ "type": "power_in",+ "description": "Backup supply for RTC, backup registers and backup SRAM (VBAT = 1.8 to 3.6 V per block diagram)."+ },+ {+ "number": "4",+ "name": "PC13",+ "type": "bidirectional",+ "description": "FT I/O supplied through the power switch (3 mA sink limit), so output speed must not exceed 2 MHz with max 30 pF load and it must not source current; additional functions RTC_TAMP1/RTC_TS/RTC_OUT."+ },+ {+ "number": "5",+ "name": "PC14-OSC32_IN",+ "type": "bidirectional",+ "description": "FT I/O (PC14) supplied through the power switch with 2 MHz/30 pF output limit; additional function OSC32_IN for the 32 kHz oscillator, not 5 V tolerant in oscillator mode."+ },+ {+ "number": "6",+ "name": "PC15-OSC32_OUT",+ "type": "bidirectional",+ "description": "FT I/O (PC15) supplied through the power switch with 2 MHz/30 pF output limit; additional function OSC32_OUT for the 32 kHz oscillator, not 5 V tolerant in oscillator mode."+ },+ {+ "number": "7",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground supply pin."+ },+ {+ "number": "8",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital supply pin (application supply 1.7 V to 3.6 V)."+ },+ {+ "number": "9",+ "name": "PH0-OSC_IN",+ "type": "bidirectional",+ "description": "FT I/O (PH0) with additional function OSC_IN for the 4-to-26 MHz crystal oscillator, not 5 V tolerant in oscillator mode."+ },+ {+ "number": "10",+ "name": "PH1-OSC_OUT",+ "type": "bidirectional",+ "description": "FT I/O (PH1) with additional function OSC_OUT for the 4-to-26 MHz crystal oscillator, not 5 V tolerant in oscillator mode."+ },+ {+ "number": "11",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Bidirectional reset pin with weak pull-up resistor."+ },+ {+ "number": "12",+ "name": "PC0",+ "type": "bidirectional",+ "description": "FT I/O; ADC123_IN10 analog input and alternate functions OTG_HS_ULPI_STP, FMC_SDNWE, LCD_R5, EVENTOUT; 5 V tolerant except in analog mode."+ },+ {+ "number": "13",+ "name": "PC1",+ "type": "bidirectional",+ "description": "FT I/O; ADC123_IN11 analog input and alternate functions TRACED0, SPI2_MOSI/I2S2_SD, SAI1_SD_A, ETH_MDC, EVENTOUT."+ },+ {+ "number": "14",+ "name": "PC2",+ "type": "bidirectional",+ "description": "FT I/O; ADC123_IN12 analog input and alternate functions SPI2_MISO, I2S2ext_SD, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0."+ },+ {+ "number": "15",+ "name": "PC3",+ "type": "bidirectional",+ "description": "FT I/O; ADC123_IN13 analog input and alternate functions SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0."+ },+ {+ "number": "16",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground supply pin."+ },+ {+ "number": "17",+ "name": "VREF+",+ "type": "power_in",+ "description": "Positive analog reference voltage input for the ADCs and DACs."+ },+ {+ "number": "18",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog supply pin."+ },+ {+ "number": "19",+ "name": "PA0-WKUP",+ "type": "bidirectional",+ "description": "FT I/O; ADC123_IN0 and WKUP additional functions, alternate functions TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, ETH_MII_CRS."+ },+ {+ "number": "20",+ "name": "PA1",+ "type": "bidirectional",+ "description": "FT I/O; ADC123_IN1 and alternate functions TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, ETH_MII_RX_CLK/ETH_RMII_REF_CLK, LCD_R2."+ },+ {+ "number": "21",+ "name": "PA2",+ "type": "bidirectional",+ "description": "FT I/O; ADC123_IN2 and alternate functions TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, ETH_MDIO, LCD_R1."+ },+ {+ "number": "22",+ "name": "PA3",+ "type": "bidirectional",+ "description": "FT I/O; ADC123_IN3 and alternate functions TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, LCD_B2, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5."+ },+ {+ "number": "23",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground supply pin."+ },+ {+ "number": "24",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital supply pin (application supply 1.7 V to 3.6 V)."+ },+ {+ "number": "25",+ "name": "PA4",+ "type": "bidirectional",+ "description": "3.3 V tolerant I/O directly connected to analog (TTa); ADC12_IN4 and DAC_OUT1, alternate functions SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC."+ },+ {+ "number": "26",+ "name": "PA5",+ "type": "bidirectional",+ "description": "TTa I/O; ADC12_IN5 and DAC_OUT2, alternate functions TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK, OTG_HS_ULPI_CK, LCD_R4."+ },+ {+ "number": "27",+ "name": "PA6",+ "type": "bidirectional",+ "description": "FT I/O; ADC12_IN6 and alternate functions TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM13_CH1, DCMI_PIXCLK, LCD_G2."+ },+ {+ "number": "28",+ "name": "PA7",+ "type": "bidirectional",+ "description": "FT I/O; ADC12_IN7 and alternate functions TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM14_CH1, QUADSPI_CLK, ETH_MII_RX_DV/ETH_RMII_CRS_DV, FMC_SDNWE."+ },+ {+ "number": "29",+ "name": "PB0",+ "type": "bidirectional",+ "description": "FT I/O; ADC12_IN8 and alternate functions TIM1_CH2N, TIM3_CH3, TIM8_CH2N, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2, LCD_G1."+ },+ {+ "number": "30",+ "name": "PB1",+ "type": "bidirectional",+ "description": "FT I/O; ADC12_IN9 and alternate functions TIM1_CH3N, TIM3_CH4, TIM8_CH3N, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3, LCD_G0."+ },+ {+ "number": "31",+ "name": "PB2-BOOT1",+ "type": "bidirectional",+ "description": "FT I/O that also serves as BOOT1 boot-mode selection; alternate function EVENTOUT."+ },+ {+ "number": "32",+ "name": "PE7",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM1_ETR, UART7_Rx, QUADSPI_BK2_IO0, FMC_D4, EVENTOUT."+ },+ {+ "number": "33",+ "name": "PE8",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM1_CH1N, UART7_Tx, QUADSPI_BK2_IO1, FMC_D5, EVENTOUT."+ },+ {+ "number": "34",+ "name": "PE9",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM1_CH1, QUADSPI_BK2_IO2, FMC_D6, EVENTOUT."+ },+ {+ "number": "35",+ "name": "PE10",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM1_CH2N, QUADSPI_BK2_IO3, FMC_D7, EVENTOUT."+ },+ {+ "number": "36",+ "name": "PE11",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM1_CH2, SPI4_NSS, FMC_D8, LCD_G3, EVENTOUT."+ },+ {+ "number": "37",+ "name": "PE12",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM1_CH3N, SPI4_SCK, FMC_D9, LCD_B4, EVENTOUT."+ },+ {+ "number": "38",+ "name": "PE13",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM1_CH3, SPI4_MISO, FMC_D10, LCD_DE, EVENTOUT."+ },+ {+ "number": "39",+ "name": "PE14",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM1_CH4, SPI4_MOSI, FMC_D11, LCD_CLK, EVENTOUT."+ },+ {+ "number": "40",+ "name": "PE15",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM1_BKIN, FMC_D12, LCD_R7, EVENTOUT."+ },+ {+ "number": "41",+ "name": "PB10",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX, QUADSPI_BK1_NCS, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4."+ },+ {+ "number": "42",+ "name": "PB11",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM2_CH4, I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN, DSIHOST_TE, LCD_G5."+ },+ {+ "number": "43",+ "name": "VCAP1",+ "type": "passive",+ "description": "Connection for the external capacitor of the internal 1.2 V voltage regulator (VCAP1/VCAP2 external capacitor)."+ },+ {+ "number": "44",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground supply pin."+ },+ {+ "number": "45",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital supply pin (application supply 1.7 V to 3.6 V)."+ },+ {+ "number": "46",+ "name": "PB12",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0, OTG_HS_ID."+ },+ {+ "number": "47",+ "name": "PB13",+ "type": "bidirectional",+ "description": "FT I/O; additional function OTG_HS_VBUS, alternate functions TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1."+ },+ {+ "number": "48",+ "name": "PB14",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM1_CH2N, TIM8_CH2N, SPI2_MISO, I2S2ext_SD, USART3_RTS, TIM12_CH1, OTG_HS_DM."+ },+ {+ "number": "49",+ "name": "PB15",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI/I2S2_SD, TIM12_CH2, OTG_HS_DP."+ },+ {+ "number": "50",+ "name": "PD8",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions USART3_TX, FMC_D13, EVENTOUT."+ },+ {+ "number": "51",+ "name": "PD9",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions USART3_RX, FMC_D14, EVENTOUT."+ },+ {+ "number": "52",+ "name": "PD10",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions USART3_CK, FMC_D15, LCD_B3, EVENTOUT."+ },+ {+ "number": "53",+ "name": "PD14",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM4_CH3, FMC_D0, EVENTOUT."+ },+ {+ "number": "54",+ "name": "PD15",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM4_CH4, FMC_D1, EVENTOUT."+ },+ {+ "number": "55",+ "name": "VDDDSI",+ "type": "power_in",+ "description": "Supply pin for the MIPI DSI host."+ },+ {+ "number": "56",+ "name": "VCAPDSI",+ "type": "passive",+ "description": "DSI supply pin for an external capacitor (listed as a supply pin, VCAPDSI)."+ },+ {+ "number": "57",+ "name": "DSIHOST_D0P",+ "type": "bidirectional",+ "description": "MIPI DSI data lane 0 positive I/O."+ },+ {+ "number": "58",+ "name": "DSIHOST_D0N",+ "type": "bidirectional",+ "description": "MIPI DSI data lane 0 negative I/O."+ },+ {+ "number": "59",+ "name": "VSSDSI",+ "type": "power_in",+ "description": "Ground supply pin for the DSI host."+ },+ {+ "number": "60",+ "name": "DSIHOST_CKP",+ "type": "bidirectional",+ "description": "MIPI DSI clock lane positive I/O."+ },+ {+ "number": "61",+ "name": "DSIHOST_CKN",+ "type": "bidirectional",+ "description": "MIPI DSI clock lane negative I/O."+ },+ {+ "number": "62",+ "name": "VDD12DSI",+ "type": "power_in",+ "description": "1.2 V supply pin for the DSI host (VDD12DSI)."+ },+ {+ "number": "63",+ "name": "DSIHOST_D1P",+ "type": "bidirectional",+ "description": "MIPI DSI data lane 1 positive I/O."+ },+ {+ "number": "64",+ "name": "DSIHOST_D1N",+ "type": "bidirectional",+ "description": "MIPI DSI data lane 1 negative I/O."+ },+ {+ "number": "65",+ "name": "VDDUSB",+ "type": "power_in",+ "description": "Dedicated USB supply for the on-chip OTG PHYs (VDDUSB = 3.0 to 3.6 V)."+ },+ {+ "number": "66",+ "name": "PC6",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM3_CH1, TIM8_CH1, I2S2_MCK, USART6_TX, SDIO_D6, DCMI_D0, LCD_HSYNC."+ },+ {+ "number": "67",+ "name": "PC7",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, SDIO_D7, DCMI_D1, LCD_G6."+ },+ {+ "number": "68",+ "name": "PC8",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TRACED1, TIM3_CH3, TIM8_CH3, USART6_CK, SDIO_D0, DCMI_D2."+ },+ {+ "number": "69",+ "name": "PC9",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, QUADSPI_BK1_IO0, SDIO_D1, DCMI_D3."+ },+ {+ "number": "70",+ "name": "PA8",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, OTG_FS_SOF, LCD_R6."+ },+ {+ "number": "71",+ "name": "PA9",+ "type": "bidirectional",+ "description": "FT I/O; additional function OTG_FS_VBUS, alternate functions TIM1_CH2, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX, DCMI_D0."+ },+ {+ "number": "72",+ "name": "PA10",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM1_CH3, USART1_RX, OTG_FS_ID, DCMI_D1."+ },+ {+ "number": "73",+ "name": "PA11",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM1_CH4, USART1_CTS, CAN1_RX, OTG_FS_DM, LCD_R4."+ },+ {+ "number": "74",+ "name": "PA12",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM1_ETR, USART1_RTS, CAN1_TX, OTG_FS_DP, LCD_R5."+ },+ {+ "number": "75",+ "name": "PA13(JTMS-SWDIO)",+ "type": "bidirectional",+ "description": "FT I/O whose function after reset is JTMS-SWDIO debug pin."+ },+ {+ "number": "76",+ "name": "VCAP2",+ "type": "passive",+ "description": "Connection for the external capacitor of the internal 1.2 V voltage regulator (VCAP1/VCAP2 external capacitor)."+ },+ {+ "number": "77",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital supply pin (application supply 1.7 V to 3.6 V)."+ },+ {+ "number": "78",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground supply pin."+ },+ {+ "number": "79",+ "name": "PA14(JTCK-SWCLK)",+ "type": "bidirectional",+ "description": "FT I/O whose function after reset is JTCK-SWCLK debug clock pin."+ },+ {+ "number": "80",+ "name": "PA15(JTDI)",+ "type": "bidirectional",+ "description": "FT I/O whose function after reset is JTDI; alternate functions TIM2_CH1/TIM2_ETR, SPI1_NSS, SPI3_NSS/I2S3_WS."+ },+ {+ "number": "81",+ "name": "PC10",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDIO_D2, DCMI_D8, LCD_R2."+ },+ {+ "number": "82",+ "name": "PC11",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions I2S3ext_SD, SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDIO_D3, DCMI_D4."+ },+ {+ "number": "83",+ "name": "PC12",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TRACED3, SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDIO_CK, DCMI_D9."+ },+ {+ "number": "84",+ "name": "PD0",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions CAN1_RX, FMC_D2, EVENTOUT."+ },+ {+ "number": "85",+ "name": "PD1",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions CAN1_TX, FMC_D3, EVENTOUT."+ },+ {+ "number": "86",+ "name": "PD2",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TRACED2, TIM3_ETR, UART5_RX, SDIO_CMD, DCMI_D11."+ },+ {+ "number": "87",+ "name": "PD3",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions SPI2_SCK/I2S2_CK, USART2_CTS, FMC_CLK, DCMI_D5, LCD_G7."+ },+ {+ "number": "88",+ "name": "PD4",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions USART2_RTS, FMC_NOE, EVENTOUT."+ },+ {+ "number": "89",+ "name": "PD5",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions USART2_TX, FMC_NWE, EVENTOUT."+ },+ {+ "number": "90",+ "name": "PD6",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions SPI3_MOSI/I2S3_SD, SAI1_SD_A, USART2_RX, FMC_NWAIT, DCMI_D10, LCD_B2."+ },+ {+ "number": "91",+ "name": "PD7",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions USART2_CK, FMC_NE1, EVENTOUT."+ },+ {+ "number": "92",+ "name": "PB3(JTDO/TRACESWO)",+ "type": "bidirectional",+ "description": "FT I/O whose function after reset is JTDO/TRACESWO; alternate functions TIM2_CH2, SPI1_SCK, SPI3_SCK/I2S3_CK."+ },+ {+ "number": "93",+ "name": "PB4(NJTRST)",+ "type": "bidirectional",+ "description": "FT I/O whose function after reset is NJTRST; alternate functions TIM3_CH1, SPI1_MISO, SPI3_MISO, I2S3ext_SD."+ },+ {+ "number": "94",+ "name": "PB5",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI/I2S3_SD, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1, DCMI_D10, LCD_G7."+ },+ {+ "number": "95",+ "name": "PB6",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM4_CH1, I2C1_SCL, USART1_TX, CAN2_TX, QUADSPI_BK1_NCS, FMC_SDNE1, DCMI_D5."+ },+ {+ "number": "96",+ "name": "PB7",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM4_CH2, I2C1_SDA, USART1_RX, FMC_NL, DCMI_VSYNC."+ },+ {+ "number": "97",+ "name": "BOOT0",+ "type": "input",+ "description": "Dedicated boot mode selection input pin (also VPP function)."+ },+ {+ "number": "98",+ "name": "PB8",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM4_CH3, TIM10_CH1, I2C1_SCL, CAN1_RX, ETH_MII_TXD3, SDIO_D4, DCMI_D6, LCD_B6."+ },+ {+ "number": "99",+ "name": "PB9",+ "type": "bidirectional",+ "description": "FT I/O; alternate functions TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, CAN1_TX, SDIO_D5, DCMI_D7, LCD_B7."+ },+ {+ "number": "100",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital supply pin (application supply 1.7 V to 3.6 V)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: VSS and VDD pins: Multiple ground and power supply pins exist at positions not fully enumerated. Typ; PC4 position: Verified as pin 15 in LQFP100 from Table 10, but diagram reference on page 48 should b; Alternative DSI pins: Some configurations may use different pin assignments. Verify Figure 3 on page"+ ],+ "pages_sent": 82,+ "cost_usd": 0.7146,+ "at": "2026-10-07T07:52:37"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922360392638464",+ "pages": 220,+ "sha256": "a7b7191d1d38665a",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 100,+ "described": 100,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm32f469vet6.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 16,+ 16,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "51720097260ffba41c3062f85f67623721102fa535901c47cb555a1f444feeb3",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm32f469vet6-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 16,+ 16,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "9e9da6697d415c0f898fafcc8a34db7f825c01a2f525ab76722406782ebd8fdb",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}