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STM32F469IIT6

Public Made by Adom

by adom

STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-176(24x24). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32f469iit6factory-2.0.0extractor-text
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Publish 0.1.1

Ray ·ad16c70cee ·5d ago ·parent 31e0806
5 files changed +845−834
README.md+173−173package.json+2−2page.json+4−4stm32f469iit6.kicad_sym+320−320stm32f469iit6.lbr+346−335
README.md+173−173
@@ -8,182 +8,182 @@ STM32F469IIT6 from STMicroelectronics, in a LQFP-176(24x24). Pinout and pin desc  | Pin | Name | Type | Function | |---|---|---|---|-| 1 | PE2 | output | Port E pin 2; can be configured as TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, ETH_MII_TXD3, FMC_A23, or general-purpose I/O. |-| 2 | PE3 | output | Port E pin 3; can be configured as TRACED0, SAI1_SD_B, FMC_A19, or general-purpose I/O. |-| 3 | PE4 | output | Port E pin 4; can be configured as TRACED1, SPI4_NSS, SAI1_FS_A, FMC_A20, DCMI_D4, LCD_B0, or general-purpose I/O. |-| 4 | PE5 | output | Port E pin 5; can be configured as TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, FMC_A21, DCMI_D6, LCD_G0, or general-purpose I/O. |-| 5 | PE6 | output | Port E pin 6; can be configured as TRACED3, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, FMC_A22, DCMI_D7, LCD_G1, or general-purpose I/O. |-| 6 | VSS | power_in | Ground reference. |-| 7 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |-| 8 | VBAT | power_in | Supply voltage for RTC, backup SRAM, and backup registers, typically connected to battery or VDD. |-| 9 | PI8 | output | Port I pin 8; can be configured as RTC_TAMP1/RTC_TAMP2/RTC_TS or general-purpose I/O; supplied through power switch with 3 mA limit. |-| 10 | PC13 | output | Port C pin 13; can be configured as RTC_TAMP1/RTC_TS/RTC_OUT or general-purpose I/O; supplied through power switch with 3 mA limit. |-| 11 | PC14-OSC32_IN | output | Port C pin 14 / 32 kHz oscillator input; default function is OSC32_IN; can be configured as general-purpose I/O; supplied through power switch with 3 mA limit. |-| 12 | PC15-OSC32_OUT | output | Port C pin 15 / 32 kHz oscillator output; default function is OSC32_OUT; can be configured as general-purpose I/O; supplied through power switch with 3 mA limit. |-| 13 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |-| 14 | PI9 | output | Port I pin 9; can be configured as CAN1_RX, FMC_D30, LCD_VSYNC, or general-purpose I/O. |-| 15 | PI10 | output | Port I pin 10; can be configured as ETH_MII_RX_ER, FMC_D31, LCD_HSYNC, or general-purpose I/O. |-| 16 | PI11 | output | Port I pin 11; can be configured as LCD_G6, OTG_HS_ULPI_DIR, or general-purpose I/O. |-| 17 | VSS | power_in | Ground reference. |-| 18 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |-| 19 | PF3 | output | Port F pin 3; can be configured as FMC_A3 or general-purpose I/O; ADC3_IN9 analog input. |-| 20 | PF4 | output | Port F pin 4; can be configured as FMC_A4 or general-purpose I/O; ADC3_IN14 analog input. |-| 21 | PF5 | output | Port F pin 5; can be configured as FMC_A5 or general-purpose I/O; ADC3_IN15 analog input. |+| 1 | PE2 | bidirectional | Port E pin 2; can be configured as TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, ETH_MII_TXD3, FMC_A23, or general-purpose I/O. |+| 2 | PE3 | bidirectional | Port E pin 3; can be configured as TRACED0, SAI1_SD_B, FMC_A19, or general-purpose I/O. |+| 3 | PE4 | bidirectional | Port E pin 4; can be configured as TRACED1, SPI4_NSS, SAI1_FS_A, FMC_A20, DCMI_D4, LCD_B0, or general-purpose I/O. |+| 4 | PE5 | bidirectional | Port E pin 5; can be configured as TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, FMC_A21, DCMI_D6, LCD_G0, or general-purpose I/O. |+| 5 | PE6 | bidirectional | Port E pin 6; can be configured as TRACED3, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, FMC_A22, DCMI_D7, LCD_G1, or general-purpose I/O. |+| 6 | VBAT | power_in | Supply voltage for RTC, backup SRAM, and backup registers, typically connected to battery or VDD. |+| 7 | PI8 | bidirectional | Port I pin 8; can be configured as RTC_TAMP1/RTC_TAMP2/RTC_TS or general-purpose I/O; supplied through power switch with 3 mA limit. |+| 8 | PC13 | bidirectional | Port C pin 13; can be configured as RTC_TAMP1/RTC_TS/RTC_OUT or general-purpose I/O; supplied through power switch with 3 mA limit. |+| 9 | PC14/OSC32_IN | bidirectional | Port C pin 14 / 32 kHz oscillator input; default function is OSC32_IN; can be configured as general-purpose I/O; supplied through power switch with 3 mA limit. |+| 10 | PC15/OSC32_OUT | bidirectional | Port C pin 15 / 32 kHz oscillator output; default function is OSC32_OUT; can be configured as general-purpose I/O; supplied through power switch with 3 mA limit. |+| 11 | PI9 | bidirectional | Port I pin 9; can be configured as CAN1_RX, FMC_D30, LCD_VSYNC, or general-purpose I/O. |+| 12 | PI10 | bidirectional | Port I pin 10; can be configured as ETH_MII_RX_ER, FMC_D31, LCD_HSYNC, or general-purpose I/O. |+| 13 | PI11 | bidirectional | Port I pin 11; can be configured as LCD_G6, OTG_HS_ULPI_DIR, or general-purpose I/O. |+| 14 | VSS | power_in | Ground reference. |+| 15 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 16 | PF0 | bidirectional |  |+| 17 | PF1 | bidirectional |  |+| 18 | PF2 | bidirectional |  |+| 19 | PF3 | bidirectional | Port F pin 3; can be configured as FMC_A3 or general-purpose I/O; ADC3_IN9 analog input. |+| 20 | PF4 | bidirectional | Port F pin 4; can be configured as FMC_A4 or general-purpose I/O; ADC3_IN14 analog input. |+| 21 | PF5 | bidirectional | Port F pin 5; can be configured as FMC_A5 or general-purpose I/O; ADC3_IN15 analog input. | | 22 | VSS | power_in | Ground reference. | | 23 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |-| 24 | PF6 | output | Port F pin 6; can be configured as TIM10_CH1, SPI5_NSS, SAI1_SD_B, UART7_Rx, QUADSPI_BK1_IO3, or general-purpose I/O; ADC3_IN4 analog input. |-| 25 | PF7 | output | Port F pin 7; can be configured as TIM11_CH1, SPI5_SCK, SAI1_MCLK_B, UART7_Tx, QUADSPI_BK1_IO2, or general-purpose I/O; ADC3_IN5 analog input. |-| 26 | PF8 | output | Port F pin 8; can be configured as SPI5_MISO, SAI1_SCK_B, TIM13_CH1, QUADSPI_BK1_IO0, or general-purpose I/O; ADC3_IN6 analog input. |-| 27 | PF9 | output | Port F pin 9; can be configured as SPI5_MOSI, SAI1_FS_B, TIM14_CH1, QUADSPI_BK1_IO1, or general-purpose I/O; ADC3_IN7 analog input. |-| 28 | PF10 | output | Port F pin 10; can be configured as QUADSPI_CLK, DCMI_D11, LCD_DE, or general-purpose I/O; ADC3_IN8 analog input. |-| 29 | PH0-OSC_IN | output | Port H pin 0 / high-speed oscillator input; default function is OSC_IN; can be configured as general-purpose I/O. |-| 30 | PH1-OSC_OUT | output | Port H pin 1 / high-speed oscillator output; default function is OSC_OUT; can be configured as general-purpose I/O. |-| 31 | NRST | bidirectional | Active-low reset input with internal weak pull-up; assert reset when pulled below VRST(L) threshold; used for system reset control. |-| 32 | PC0 | output | Port C pin 0; can be configured as OTG_HS_ULPI_STP, FMC_SDNWE, LCD_R5, or general-purpose I/O; ADC123_IN10 analog input. |-| 33 | PC1 | output | Port C pin 1; can be configured as TRACED0, SPI2_MOSI/I2S2_SD, SAI1_SD_A, ETH_MDC, or general-purpose I/O; ADC123_IN11 analog input. |-| 34 | PC2 | output | Port C pin 2; can be configured as SPI2_MISO, I2S2ext_SD, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0, or general-purpose I/O; ADC123_IN12 analog input. |-| 35 | PC3 | output | Port C pin 3; can be configured as SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0, or general-purpose I/O; ADC123_IN13 analog input. |+| 24 | PF6 | bidirectional | Port F pin 6; can be configured as TIM10_CH1, SPI5_NSS, SAI1_SD_B, UART7_Rx, QUADSPI_BK1_IO3, or general-purpose I/O; ADC3_IN4 analog input. |+| 25 | PF7 | bidirectional | Port F pin 7; can be configured as TIM11_CH1, SPI5_SCK, SAI1_MCLK_B, UART7_Tx, QUADSPI_BK1_IO2, or general-purpose I/O; ADC3_IN5 analog input. |+| 26 | PF8 | bidirectional | Port F pin 8; can be configured as SPI5_MISO, SAI1_SCK_B, TIM13_CH1, QUADSPI_BK1_IO0, or general-purpose I/O; ADC3_IN6 analog input. |+| 27 | PF9 | bidirectional | Port F pin 9; can be configured as SPI5_MOSI, SAI1_FS_B, TIM14_CH1, QUADSPI_BK1_IO1, or general-purpose I/O; ADC3_IN7 analog input. |+| 28 | PF10 | bidirectional | Port F pin 10; can be configured as QUADSPI_CLK, DCMI_D11, LCD_DE, or general-purpose I/O; ADC3_IN8 analog input. |+| 29 | PH0/OSC_IN | bidirectional | Port H pin 0 / high-speed oscillator input; default function is OSC_IN; can be configured as general-purpose I/O. |+| 30 | PH1/OSC_OUT | bidirectional | Port H pin 1 / high-speed oscillator output; default function is OSC_OUT; can be configured as general-purpose I/O. |+| 31 | NRST | input | Active-low reset input with internal weak pull-up; assert reset when pulled below VRST(L) threshold; used for system reset control. |+| 32 | PC0 | bidirectional | Port C pin 0; can be configured as OTG_HS_ULPI_STP, FMC_SDNWE, LCD_R5, or general-purpose I/O; ADC123_IN10 analog input. |+| 33 | PC1 | bidirectional | Port C pin 1; can be configured as TRACED0, SPI2_MOSI/I2S2_SD, SAI1_SD_A, ETH_MDC, or general-purpose I/O; ADC123_IN11 analog input. |+| 34 | PC2 | bidirectional | Port C pin 2; can be configured as SPI2_MISO, I2S2ext_SD, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0, or general-purpose I/O; ADC123_IN12 analog input. |+| 35 | PC3 | bidirectional | Port C pin 3; can be configured as SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0, or general-purpose I/O; ADC123_IN13 analog input. | | 36 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |-| 37 | VSS | power_in | Ground reference. |-| 38 | VSSA | power_in | Analog ground reference for ADC. |-| 39 | VREF- | power_in | ADC reference voltage negative input; typically connected to VSSA or ground. |-| 40 | VREF+ | power_in | ADC reference voltage positive input; 1.62 V to 3.6 V; decoupled with 100 nF capacitor. |-| 41 | VDDA | power_in | Analog supply voltage for ADC and comparators; 1.62 V to 3.6 V. |-| 42 | PA0-WKUP | output | Port A pin 0 / wakeup pin; can be configured as TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, ETH_MII_CRS, or general-purpose I/O; ADC123_IN0 analog input; wakeup from low-power modes. |-| 43 | PA1 | output | Port A pin 1; can be configured as TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, ETH_MII_RX_CLK/ETH_RMII_REF_CLK, LCD_R2, or general-purpose I/O; ADC123_IN1 analog input. |-| 44 | PA2 | output | Port A pin 2; can be configured as TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, ETH_MDIO, LCD_R1, or general-purpose I/O; ADC123_IN2 analog input. |-| 45 | PH2 | output | Port H pin 2; can be configured as QUADSPI_BK2_IO0, ETH_MII_CRS, FMC_SDCKE0, LCD_R0, or general-purpose I/O. |-| 46 | PH3 | output | Port H pin 3; can be configured as QUADSPI_BK2_IO1, ETH_MII_COL, FMC_SDNE0, LCD_R1, or general-purpose I/O. |-| 47 | PH4 | output | Port H pin 4; can be configured as I2C2_SCL, LCD_G5, OTG_HS_ULPI_NXT, LCD_G4, or general-purpose I/O. |-| 48 | PH5 | output | Port H pin 5; can be configured as I2C2_SDA, SPI5_NSS, FMC_SDNWE, or general-purpose I/O. |-| 49 | PA3 | output | Port A pin 3; can be configured as TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, LCD_B2, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5, or general-purpose I/O; ADC123_IN3 analog input. |-| 50 | VSS | power_in | Ground reference. |-| 51 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |-| 52 | PA4 | output | Port A pin 4; can be configured as SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC, or general-purpose I/O; ADC12_IN4 analog input; DAC_OUT1 analog output. |-| 53 | PA5 | output | Port A pin 5; can be configured as TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK, OTG_HS_ULPI_CK, LCD_R4, or general-purpose I/O; ADC12_IN5 analog input; DAC_OUT2 analog output. |-| 54 | PA6 | output | Port A pin 6; can be configured as TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM13_CH1, DCMI_PIXCLK, LCD_G2, or general-purpose I/O; ADC12_IN6 analog input. |-| 55 | PA7 | output | Port A pin 7; can be configured as TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM14_CH1, QUADSPI_CLK, ETH_MII_RX_DV/ETH_RMII_CRS_DV, FMC_SDNWE, or general-purpose I/O; ADC12_IN7 analog input. |-| 56 | PB0 | output | Port B pin 0; can be configured as TIM1_CH2N, TIM3_CH3, TIM8_CH2N, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2, LCD_G1, or general-purpose I/O; ADC12_IN8 analog input. |-| 57 | PB1 | output | Port B pin 1; can be configured as TIM1_CH3N, TIM3_CH4, TIM8_CH3N, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3, LCD_G0, or general-purpose I/O; ADC12_IN9 analog input. |-| 58 | PB2-BOOT1 | output | Port B pin 2 / boot configuration pin; can be configured as general-purpose I/O. |-| 59 | PI15 | output | Port I pin 15; can be configured as LCD_G2, LCD_R0, or general-purpose I/O. |-| 60 | PJ0 | output | Port J pin 0; can be configured as LCD_R7, LCD_R1, or general-purpose I/O. |-| 61 | PJ1 | output | Port J pin 1; can be configured as LCD_R2 or general-purpose I/O. |-| 62 | PJ2 | output | Port J pin 2; can be configured as DSIHOST_TE, LCD_R3, or general-purpose I/O. |-| 63 | PJ3 | output | Port J pin 3; can be configured as LCD_R4 or general-purpose I/O. |-| 64 | PJ4 | output | Port J pin 4; can be configured as LCD_R5 or general-purpose I/O. |-| 65 | PF11 | output | Port F pin 11; can be configured as SPI5_MOSI, FMC_SDNRAS, DCMI_D12, or general-purpose I/O. |-| 66 | PF12 | output | Port F pin 12; can be configured as FMC_A6 or general-purpose I/O. |-| 67 | VSS | power_in | Ground reference. |-| 68 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |-| 69 | PF13 | output | Port F pin 13; can be configured as FMC_A7 or general-purpose I/O. |-| 70 | PF14 | output | Port F pin 14; can be configured as FMC_A8 or general-purpose I/O. |-| 71 | PF15 | output | Port F pin 15; can be configured as FMC_A9 or general-purpose I/O. |-| 72 | PG0 | output | Port G pin 0; can be configured as FMC_A10 or general-purpose I/O. |-| 73 | PG1 | output | Port G pin 1; can be configured as FMC_A11 or general-purpose I/O. |-| 74 | PE7 | output | Port E pin 7; can be configured as TIM1_ETR, UART7_Rx, QUADSPI_BK2_IO0, FMC_D4, or general-purpose I/O. |-| 75 | PE8 | output | Port E pin 8; can be configured as TIM1_CH1N, UART7_Tx, QUADSPI_BK2_IO1, FMC_D5, or general-purpose I/O. |-| 76 | PE9 | output | Port E pin 9; can be configured as TIM1_CH1, QUADSPI_BK2_IO2, FMC_D6, or general-purpose I/O. |-| 77 | PE10 | output | Port E pin 10; can be configured as TIM1_CH2N, QUADSPI_BK2_IO3, FMC_D7, or general-purpose I/O. |-| 78 | PE11 | output | Port E pin 11; can be configured as TIM1_CH2, SPI4_NSS, FMC_D8, LCD_G3, or general-purpose I/O. |-| 79 | PE12 | output | Port E pin 12; can be configured as TIM1_CH3N, SPI4_SCK, FMC_D9, LCD_B4, or general-purpose I/O. |-| 80 | PE13 | output | Port E pin 13; can be configured as TIM1_CH3, SPI4_MISO, FMC_D10, LCD_DE, or general-purpose I/O. |-| 81 | PE14 | output | Port E pin 14; can be configured as TIM1_CH4, SPI4_MOSI, FMC_D11, LCD_CLK, or general-purpose I/O. |-| 82 | PE15 | output | Port E pin 15; can be configured as TIM1_BKIN, FMC_D12, LCD_R7, or general-purpose I/O. |-| 83 | PB10 | output | Port B pin 10; can be configured as TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX, QUADSPI_BK1_NCS, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4, or general-purpose I/O. |-| 84 | PB11 | output | Port B pin 11; can be configured as TIM2_CH4, I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN, DSIHOST_TE, LCD_G5, or general-purpose I/O. |-| 85 | VCAP1 | passive | Decoupling capacitor pin for core voltage regulator; connect 4.7 µF ceramic capacitor to ground. |-| 86 | VSS | power_in | Ground reference. |-| 87 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |-| 88 | PH6 | output | Port H pin 6; can be configured as I2C2_SMBA, SPI5_SCK, TIM12_CH1, ETH_MII_RXD2, FMC_SDNE1, DCMI_D8, or general-purpose I/O. |-| 89 | PH7 | output | Port H pin 7; can be configured as I2C3_SCL, SPI5_MISO, ETH_MII_RXD3, FMC_SDCKE1, DCMI_D9, or general-purpose I/O. |-| 90 | PH8 | output | Port H pin 8; can be configured as I2C3_SDA, FMC_D16, DCMI_HSYNC, LCD_R2, or general-purpose I/O. |-| 91 | PH9 | output | Port H pin 9; can be configured as I2C3_SMBA, TIM12_CH2, FMC_D17, DCMI_D0, LCD_R3, or general-purpose I/O. |-| 92 | PH10 | output | Port H pin 10; can be configured as TIM5_CH1, FMC_D18, DCMI_D1, LCD_R4, or general-purpose I/O. |-| 93 | PH11 | output | Port H pin 11; can be configured as TIM5_CH2, FMC_D19, DCMI_D2, LCD_R5, or general-purpose I/O. |-| 94 | PH12 | output | Port H pin 12; can be configured as TIM5_CH3, FMC_D20, DCMI_D3, LCD_R6, or general-purpose I/O. |-| 95 | PH13 | output | Port H pin 13; can be configured as TIM8_CH1N, CAN1_TX, FMC_D21, LCD_G2, or general-purpose I/O. |-| 96 | PH14 | output | Port H pin 14; can be configured as TIM8_CH2N, FMC_D22, DCMI_D4, LCD_G3, or general-purpose I/O. |-| 97 | PH15 | output | Port H pin 15; can be configured as TIM8_CH3N, FMC_D23, DCMI_D11, LCD_G4, or general-purpose I/O. |-| 98 | PI0 | output | Port I pin 0; can be configured as TIM5_CH4, SPI2_NSS/I2S2_WS, FMC_D24, DCMI_D13, LCD_G5, or general-purpose I/O. |-| 99 | PI1 | output | Port I pin 1; can be configured as SPI2_SCK/I2S2_CK, FMC_D25, DCMI_D8, LCD_G6, or general-purpose I/O. |-| 100 | PI2 | output | Port I pin 2; can be configured as TIM8_CH4, SPI2_MISO, I2S2ext_SD, FMC_D26, DCMI_D9, LCD_G7, or general-purpose I/O. |-| 101 | PI3 | output | Port I pin 3; can be configured as TIM8_ETR, SPI2_MOSI/I2S2_SD, FMC_D27, DCMI_D10, or general-purpose I/O. |-| 102 | PI4 | output | Port I pin 4; can be configured as TIM8_BKIN, FMC_NBL2, DCMI_D5, LCD_B4, or general-purpose I/O. |-| 103 | PI5 | output | Port I pin 5; can be configured as TIM8_CH1, FMC_NBL3, DCMI_VSYNC, LCD_B5, or general-purpose I/O. |-| 104 | PI6 | output | Port I pin 6; can be configured as TIM8_CH2, FMC_D28, DCMI_D6, LCD_B6, or general-purpose I/O. |-| 105 | PI7 | output | Port I pin 7; can be configured as TIM8_CH3, FMC_D29, DCMI_D7, LCD_B7, or general-purpose I/O. |-| 106 | PB12 | output | Port B pin 12; can be configured as TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0, OTG_HS_ID, or general-purpose I/O. |-| 107 | PB13 | output | Port B pin 13; can be configured as TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1, or general-purpose I/O; OTG_HS_VBUS analog input. |-| 108 | PB14 | output | Port B pin 14; can be configured as TIM1_CH2N, TIM8_CH2N, SPI2_MISO, I2S2ext_SD, USART3_RTS, TIM12_CH1, OTG_HS_DM, or general-purpose I/O. |-| 109 | PB15 | output | Port B pin 15; can be configured as RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI/I2S2_SD, TIM12_CH2, OTG_HS_DP, or general-purpose I/O. |-| 110 | PD8 | output | Port D pin 8; can be configured as USART3_TX, FMC_D13, or general-purpose I/O. |-| 111 | PD9 | output | Port D pin 9; can be configured as USART3_RX, FMC_D14, or general-purpose I/O. |-| 112 | PD10 | output | Port D pin 10; can be configured as USART3_CK, FMC_D15, LCD_B3, or general-purpose I/O. |-| 113 | PD11 | output | Port D pin 11; can be configured as USART3_CTS, QUADSPI_BK1_IO0, FMC_A16/FMC_CLE, or general-purpose I/O. |-| 114 | PD12 | output | Port D pin 12; can be configured as TIM4_CH1, USART3_RTS, QUADSPI_BK1_IO1, FMC_A17/FMC_ALE, or general-purpose I/O. |-| 115 | PD13 | output | Port D pin 13; can be configured as TIM4_CH2, QUADSPI_BK1_IO3, FMC_A18, or general-purpose I/O. |-| 116 | VSS | power_in | Ground reference. |-| 117 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |-| 118 | PD14 | output | Port D pin 14; can be configured as TIM4_CH3, FMC_D0, or general-purpose I/O. |-| 119 | PD15 | output | Port D pin 15; can be configured as TIM4_CH4, FMC_D1, or general-purpose I/O. |-| 120 | VDDDSI | power_in | DSI host supply voltage. |-| 121 | VSS | power_in | Ground reference. |-| 122 | VCAPDSI | passive | DSI host regulator decoupling capacitor pin. |-| 123 | VDD12DSI | power_in | DSI 1.2 V internal regulator output and PLL supply voltage. |-| 124 | DSIHOST_D0P | output | MIPI DSI host data lane 0 positive signal. |-| 125 | DSIHOST_D0N | output | MIPI DSI host data lane 0 negative signal. |-| 126 | VSSDSI | power_in | DSI ground reference. |-| 127 | DSIHOST_CKP | output | MIPI DSI host clock lane positive signal. |-| 128 | DSIHOST_CKN | output | MIPI DSI host clock lane negative signal. |-| 129 | VDD12DSI | power_in | DSI 1.2 V internal regulator output and PLL supply voltage. |-| 130 | DSIHOST_D1P | output | MIPI DSI host data lane 1 positive signal. |-| 131 | DSIHOST_D1N | output | MIPI DSI host data lane 1 negative signal. |-| 132 | VSSDSI | power_in | DSI ground reference. |-| 133 | PG2 | output | Port G pin 2; can be configured as FMC_A12 or general-purpose I/O. |-| 134 | PG3 | output | Port G pin 3; can be configured as FMC_A13 or general-purpose I/O. |-| 135 | PG4 | output | Port G pin 4; can be configured as FMC_A14/FMC_BA0 or general-purpose I/O. |-| 136 | PG5 | output | Port G pin 5; can be configured as FMC_A15/FMC_BA1 or general-purpose I/O. |-| 137 | PG6 | output | Port G pin 6; can be configured as DCMI_D12, LCD_R7, or general-purpose I/O. |-| 138 | PG7 | output | Port G pin 7; can be configured as SAI1_MCLK_A, USART6_CK, FMC_INT, DCMI_D13, LCD_CLK, or general-purpose I/O. |-| 139 | PG8 | output | Port G pin 8; can be configured as SPI6_NSS, USART6_RTS, ETH_PPS_OUT, FMC_SDCLK, LCD_G7, or general-purpose I/O. |-| 140 | VSS | power_in | Ground reference. |-| 141 | VDDUSB | power_in | USB dedicated supply voltage (1.62 V to 3.6 V); can be independent from VDD for full-speed operation. |-| 142 | PC6 | output | Port C pin 6; can be configured as TIM3_CH1, TIM8_CH1, I2S2_MCK, USART6_TX, SDIO_D6, DCMI_D0, LCD_HSYNC, or general-purpose I/O. |-| 143 | PC7 | output | Port C pin 7; can be configured as TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, SDIO_D7, DCMI_D1, LCD_G6, or general-purpose I/O. |-| 144 | PC8 | output | Port C pin 8; can be configured as TRACED1, TIM3_CH3, TIM8_CH3, USART6_CK, SDIO_D0, DCMI_D2, or general-purpose I/O. |-| 145 | PC9 | output | Port C pin 9; can be configured as MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, QUADSPI_BK1_IO0, SDIO_D1, DCMI_D3, or general-purpose I/O. |-| 146 | PA8 | output | Port A pin 8; can be configured as MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, OTG_FS_SOF, LCD_R6, or general-purpose I/O. |-| 147 | PA9 | output | Port A pin 9; can be configured as TIM1_CH2, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX, DCMI_D0, or general-purpose I/O; OTG_FS_VBUS analog input. |-| 148 | PA10 | output | Port A pin 10; can be configured as TIM1_CH3, USART1_RX, OTG_FS_ID, DCMI_D1, or general-purpose I/O. |-| 149 | PA11 | output | Port A pin 11; can be configured as TIM1_CH4, USART1_CTS, CAN1_RX, OTG_FS_DM, LCD_R4, or general-purpose I/O. |-| 150 | PA12 | output | Port A pin 12; can be configured as TIM1_ETR, USART1_RTS, CAN1_TX, OTG_FS_DP, LCD_R5, or general-purpose I/O. |-| 151 | PA13(JTMS-SWDIO) | output | Port A pin 13 / JTAG TMS / SWD I/O; shared between JTAG and SWD debug interfaces. |-| 152 | VCAP2 | passive | Decoupling capacitor pin for core voltage regulator; connect 4.7 µF ceramic capacitor to ground. |-| 153 | VSS | power_in | Ground reference. |-| 154 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |-| 155 | PH13 | output | Port H pin 13; can be configured as TIM8_CH1N, CAN1_TX, FMC_D21, LCD_G2, or general-purpose I/O. |-| 156 | PH14 | output | Port H pin 14; can be configured as TIM8_CH2N, FMC_D22, DCMI_D4, LCD_G3, or general-purpose I/O. |-| 157 | PH15 | output | Port H pin 15; can be configured as TIM8_CH3N, FMC_D23, DCMI_D11, LCD_G4, or general-purpose I/O. |-| 158 | PI0 | output | Port I pin 0; can be configured as TIM5_CH4, SPI2_NSS/I2S2_WS, FMC_D24, DCMI_D13, LCD_G5, or general-purpose I/O. |-| 159 | PI1 | output | Port I pin 1; can be configured as SPI2_SCK/I2S2_CK, FMC_D25, DCMI_D8, LCD_G6, or general-purpose I/O. |-| 160 | PI2 | output | Port I pin 2; can be configured as TIM8_CH4, SPI2_MISO, I2S2ext_SD, FMC_D26, DCMI_D9, LCD_G7, or general-purpose I/O. |-| 161 | PI3 | output | Port I pin 3; can be configured as TIM8_ETR, SPI2_MOSI/I2S2_SD, FMC_D27, DCMI_D10, or general-purpose I/O. |-| 162 | PG9 | output | Port G pin 9; can be configured as USART6_RX, QUADSPI_BK2_IO2, FMC_NE2/FMC_NCE, DCMI_VSYNC, or general-purpose I/O. |-| 163 | PG10 | output | Port G pin 10; can be configured as LCD_G3, FMC_NE3, DCMI_D2, LCD_B2, or general-purpose I/O. |-| 164 | PG11 | output | Port G pin 11; can be configured as ETH_MII_TX_EN/ETH_RMII_TX_EN, DCMI_D3, LCD_B3, or general-purpose I/O. |-| 165 | PG12 | output | Port G pin 12; can be configured as SPI6_MISO, USART6_RTS, LCD_B4, FMC_NE4, LCD_B1, or general-purpose I/O. |-| 166 | PG13 | output | Port G pin 13; can be configured as TRACED0, SPI6_SCK, USART6_CTS, ETH_MII_TXD0/ETH_RMII_TXD0, FMC_A24, LCD_R0, or general-purpose I/O. |-| 167 | PG14 | output | Port G pin 14; can be configured as TRACED1, SPI6_MOSI, USART6_TX, QUADSPI_BK2_IO3, ETH_MII_TXD1/ETH_RMII_TXD1, FMC_A25, LCD_B0, or general-purpose I/O. |-| 168 | VSS | power_in | Ground reference. |-| 169 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |-| 170 | PA14(JTCK-SWCLK) | output | Port A pin 14 / JTAG TCK / SWD clock; shared between JTAG and SWD debug interfaces. |-| 171 | PA15(JTDI) | output | Port A pin 15 / JTAG TDI; can also be configured as TIM2_CH1/TIM2_ETR, SPI1_NSS, SPI3_NSS/I2S3_WS, or general-purpose I/O. |-| 172 | PC10 | output | Port C pin 10; can be configured as SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDIO_D2, DCMI_D8, LCD_R2, or general-purpose I/O. |-| 173 | PC11 | output | Port C pin 11; can be configured as I2S3ext_SD, SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDIO_D3, DCMI_D4, or general-purpose I/O. |-| 174 | PC12 | output | Port C pin 12; can be configured as TRACED3, SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDIO_CK, DCMI_D9, or general-purpose I/O. |-| 175 | PD0 | output | Port D pin 0; can be configured as CAN1_RX, FMC_D2, or general-purpose I/O. |-| 176 | PD1 | output | Port D pin 1; can be configured as CAN1_TX, FMC_D3, or general-purpose I/O. |+| 37 | VSSA | power_in | Analog ground reference for ADC. |+| 38 | VREF+ | power_in | ADC reference voltage positive input; 1.62 V to 3.6 V; decoupled with 100 nF capacitor. |+| 39 | VDDA | power_in | Analog supply voltage for ADC and comparators; 1.62 V to 3.6 V. |+| 40 | PA0/WKUP | bidirectional | Port A pin 0 / wakeup pin; can be configured as TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, ETH_MII_CRS, or general-purpose I/O; ADC123_IN0 analog input; wakeup from low-power modes. |+| 41 | PA1 | bidirectional | Port A pin 1; can be configured as TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, ETH_MII_RX_CLK/ETH_RMII_REF_CLK, LCD_R2, or general-purpose I/O; ADC123_IN1 analog input. |+| 42 | PA2 | bidirectional | Port A pin 2; can be configured as TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, ETH_MDIO, LCD_R1, or general-purpose I/O; ADC123_IN2 analog input. |+| 43 | PH2 | bidirectional | Port H pin 2; can be configured as QUADSPI_BK2_IO0, ETH_MII_CRS, FMC_SDCKE0, LCD_R0, or general-purpose I/O. |+| 44 | PH3 | bidirectional | Port H pin 3; can be configured as QUADSPI_BK2_IO1, ETH_MII_COL, FMC_SDNE0, LCD_R1, or general-purpose I/O. |+| 45 | PH4 | bidirectional | Port H pin 4; can be configured as I2C2_SCL, LCD_G5, OTG_HS_ULPI_NXT, LCD_G4, or general-purpose I/O. |+| 46 | PH5 | bidirectional | Port H pin 5; can be configured as I2C2_SDA, SPI5_NSS, FMC_SDNWE, or general-purpose I/O. |+| 47 | PA3 | bidirectional | Port A pin 3; can be configured as TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, LCD_B2, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5, or general-purpose I/O; ADC123_IN3 analog input. |+| 48 | BYPASS_REG | input |  |+| 49 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 50 | PA4 | bidirectional | Port A pin 4; can be configured as SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC, or general-purpose I/O; ADC12_IN4 analog input; DAC_OUT1 analog output. |+| 51 | PA5 | bidirectional | Port A pin 5; can be configured as TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK, OTG_HS_ULPI_CK, LCD_R4, or general-purpose I/O; ADC12_IN5 analog input; DAC_OUT2 analog output. |+| 52 | PA6 | bidirectional | Port A pin 6; can be configured as TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM13_CH1, DCMI_PIXCLK, LCD_G2, or general-purpose I/O; ADC12_IN6 analog input. |+| 53 | PA7 | bidirectional | Port A pin 7; can be configured as TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM14_CH1, QUADSPI_CLK, ETH_MII_RX_DV/ETH_RMII_CRS_DV, FMC_SDNWE, or general-purpose I/O; ADC12_IN7 analog input. |+| 54 | PC4 | bidirectional |  |+| 55 | PC5 | bidirectional |  |+| 56 | PB0 | bidirectional | Port B pin 0; can be configured as TIM1_CH2N, TIM3_CH3, TIM8_CH2N, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2, LCD_G1, or general-purpose I/O; ADC12_IN8 analog input. |+| 57 | PB1 | bidirectional | Port B pin 1; can be configured as TIM1_CH3N, TIM3_CH4, TIM8_CH3N, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3, LCD_G0, or general-purpose I/O; ADC12_IN9 analog input. |+| 58 | PB2/BOOT1 | bidirectional | Port B pin 2 / boot configuration pin; can be configured as general-purpose I/O. |+| 59 | PF11 | bidirectional | Port F pin 11; can be configured as SPI5_MOSI, FMC_SDNRAS, DCMI_D12, or general-purpose I/O. |+| 60 | PF12 | bidirectional | Port F pin 12; can be configured as FMC_A6 or general-purpose I/O. |+| 61 | VSS | power_in | Ground reference. |+| 62 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 63 | PF13 | bidirectional | Port F pin 13; can be configured as FMC_A7 or general-purpose I/O. |+| 64 | PF14 | bidirectional | Port F pin 14; can be configured as FMC_A8 or general-purpose I/O. |+| 65 | PF15 | bidirectional | Port F pin 15; can be configured as FMC_A9 or general-purpose I/O. |+| 66 | PG0 | bidirectional | Port G pin 0; can be configured as FMC_A10 or general-purpose I/O. |+| 67 | PG1 | bidirectional | Port G pin 1; can be configured as FMC_A11 or general-purpose I/O. |+| 68 | PE7 | bidirectional | Port E pin 7; can be configured as TIM1_ETR, UART7_Rx, QUADSPI_BK2_IO0, FMC_D4, or general-purpose I/O. |+| 69 | PE8 | bidirectional | Port E pin 8; can be configured as TIM1_CH1N, UART7_Tx, QUADSPI_BK2_IO1, FMC_D5, or general-purpose I/O. |+| 70 | PE9 | bidirectional | Port E pin 9; can be configured as TIM1_CH1, QUADSPI_BK2_IO2, FMC_D6, or general-purpose I/O. |+| 71 | VSS | power_in | Ground reference. |+| 72 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 73 | PE10 | bidirectional | Port E pin 10; can be configured as TIM1_CH2N, QUADSPI_BK2_IO3, FMC_D7, or general-purpose I/O. |+| 74 | PE11 | bidirectional | Port E pin 11; can be configured as TIM1_CH2, SPI4_NSS, FMC_D8, LCD_G3, or general-purpose I/O. |+| 75 | PE12 | bidirectional | Port E pin 12; can be configured as TIM1_CH3N, SPI4_SCK, FMC_D9, LCD_B4, or general-purpose I/O. |+| 76 | PE13 | bidirectional | Port E pin 13; can be configured as TIM1_CH3, SPI4_MISO, FMC_D10, LCD_DE, or general-purpose I/O. |+| 77 | PE14 | bidirectional | Port E pin 14; can be configured as TIM1_CH4, SPI4_MOSI, FMC_D11, LCD_CLK, or general-purpose I/O. |+| 78 | PE15 | bidirectional | Port E pin 15; can be configured as TIM1_BKIN, FMC_D12, LCD_R7, or general-purpose I/O. |+| 79 | PB10 | bidirectional | Port B pin 10; can be configured as TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX, QUADSPI_BK1_NCS, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4, or general-purpose I/O. |+| 80 | PB11 | bidirectional | Port B pin 11; can be configured as TIM2_CH4, I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN, DSIHOST_TE, LCD_G5, or general-purpose I/O. |+| 81 | VCAP1 | power_in | Decoupling capacitor pin for core voltage regulator; connect 4.7 µF ceramic capacitor to ground. |+| 82 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 83 | PH6 | bidirectional | Port H pin 6; can be configured as I2C2_SMBA, SPI5_SCK, TIM12_CH1, ETH_MII_RXD2, FMC_SDNE1, DCMI_D8, or general-purpose I/O. |+| 84 | PH7 | bidirectional | Port H pin 7; can be configured as I2C3_SCL, SPI5_MISO, ETH_MII_RXD3, FMC_SDCKE1, DCMI_D9, or general-purpose I/O. |+| 85 | PB12 | bidirectional | Port B pin 12; can be configured as TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0, OTG_HS_ID, or general-purpose I/O. |+| 86 | PB13 | bidirectional | Port B pin 13; can be configured as TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1, or general-purpose I/O; OTG_HS_VBUS analog input. |+| 87 | PB14 | bidirectional | Port B pin 14; can be configured as TIM1_CH2N, TIM8_CH2N, SPI2_MISO, I2S2ext_SD, USART3_RTS, TIM12_CH1, OTG_HS_DM, or general-purpose I/O. |+| 88 | PB15 | bidirectional | Port B pin 15; can be configured as RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI/I2S2_SD, TIM12_CH2, OTG_HS_DP, or general-purpose I/O. |+| 89 | PD8 | bidirectional | Port D pin 8; can be configured as USART3_TX, FMC_D13, or general-purpose I/O. |+| 90 | PD9 | bidirectional | Port D pin 9; can be configured as USART3_RX, FMC_D14, or general-purpose I/O. |+| 91 | PD10 | bidirectional | Port D pin 10; can be configured as USART3_CK, FMC_D15, LCD_B3, or general-purpose I/O. |+| 92 | PD11 | bidirectional | Port D pin 11; can be configured as USART3_CTS, QUADSPI_BK1_IO0, FMC_A16/FMC_CLE, or general-purpose I/O. |+| 93 | PD12 | bidirectional | Port D pin 12; can be configured as TIM4_CH1, USART3_RTS, QUADSPI_BK1_IO1, FMC_A17/FMC_ALE, or general-purpose I/O. |+| 94 | PD13 | bidirectional | Port D pin 13; can be configured as TIM4_CH2, QUADSPI_BK1_IO3, FMC_A18, or general-purpose I/O. |+| 95 | VSS | power_in | Ground reference. |+| 96 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 97 | PD14 | bidirectional | Port D pin 14; can be configured as TIM4_CH3, FMC_D0, or general-purpose I/O. |+| 98 | PD15 | bidirectional | Port D pin 15; can be configured as TIM4_CH4, FMC_D1, or general-purpose I/O. |+| 99 | VDDDSI | power_in | DSI host supply voltage. |+| 100 | VCAPDSI | power_in | DSI host regulator decoupling capacitor pin. |+| 101 | DSIHOST_D0P | bidirectional | MIPI DSI host data lane 0 positive signal. |+| 102 | DSIHOST_D0N | bidirectional | MIPI DSI host data lane 0 negative signal. |+| 103 | VSSDSI | power_in | DSI ground reference. |+| 104 | DSIHOST_CKP | bidirectional | MIPI DSI host clock lane positive signal. |+| 105 | DSIHOST_CKN | bidirectional | MIPI DSI host clock lane negative signal. |+| 106 | VDD12DSI | power_in | DSI 1.2 V internal regulator output and PLL supply voltage. |+| 107 | DSIHOST_D1P | bidirectional | MIPI DSI host data lane 1 positive signal. |+| 108 | DSIHOST_D1N | bidirectional | MIPI DSI host data lane 1 negative signal. |+| 109 | VSSDSI | power_in | DSI ground reference. |+| 110 | PG2 | bidirectional | Port G pin 2; can be configured as FMC_A12 or general-purpose I/O. |+| 111 | PG3 | bidirectional | Port G pin 3; can be configured as FMC_A13 or general-purpose I/O. |+| 112 | PG4 | bidirectional | Port G pin 4; can be configured as FMC_A14/FMC_BA0 or general-purpose I/O. |+| 113 | PG5 | bidirectional | Port G pin 5; can be configured as FMC_A15/FMC_BA1 or general-purpose I/O. |+| 114 | PG6 | bidirectional | Port G pin 6; can be configured as DCMI_D12, LCD_R7, or general-purpose I/O. |+| 115 | PG7 | bidirectional | Port G pin 7; can be configured as SAI1_MCLK_A, USART6_CK, FMC_INT, DCMI_D13, LCD_CLK, or general-purpose I/O. |+| 116 | PG8 | bidirectional | Port G pin 8; can be configured as SPI6_NSS, USART6_RTS, ETH_PPS_OUT, FMC_SDCLK, LCD_G7, or general-purpose I/O. |+| 117 | VSS | power_in | Ground reference. |+| 118 | VDDUSB | power_in | USB dedicated supply voltage (1.62 V to 3.6 V); can be independent from VDD for full-speed operation. |+| 119 | PC6 | bidirectional | Port C pin 6; can be configured as TIM3_CH1, TIM8_CH1, I2S2_MCK, USART6_TX, SDIO_D6, DCMI_D0, LCD_HSYNC, or general-purpose I/O. |+| 120 | PC7 | bidirectional | Port C pin 7; can be configured as TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, SDIO_D7, DCMI_D1, LCD_G6, or general-purpose I/O. |+| 121 | PC8 | bidirectional | Port C pin 8; can be configured as TRACED1, TIM3_CH3, TIM8_CH3, USART6_CK, SDIO_D0, DCMI_D2, or general-purpose I/O. |+| 122 | PC9 | bidirectional | Port C pin 9; can be configured as MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, QUADSPI_BK1_IO0, SDIO_D1, DCMI_D3, or general-purpose I/O. |+| 123 | PA8 | bidirectional | Port A pin 8; can be configured as MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, OTG_FS_SOF, LCD_R6, or general-purpose I/O. |+| 124 | PA9 | bidirectional | Port A pin 9; can be configured as TIM1_CH2, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX, DCMI_D0, or general-purpose I/O; OTG_FS_VBUS analog input. |+| 125 | PA10 | bidirectional | Port A pin 10; can be configured as TIM1_CH3, USART1_RX, OTG_FS_ID, DCMI_D1, or general-purpose I/O. |+| 126 | PA11 | bidirectional | Port A pin 11; can be configured as TIM1_CH4, USART1_CTS, CAN1_RX, OTG_FS_DM, LCD_R4, or general-purpose I/O. |+| 127 | PA12 | bidirectional | Port A pin 12; can be configured as TIM1_ETR, USART1_RTS, CAN1_TX, OTG_FS_DP, LCD_R5, or general-purpose I/O. |+| 128 | PA13 | bidirectional |  |+| 129 | VCAP2 | power_in | Decoupling capacitor pin for core voltage regulator; connect 4.7 µF ceramic capacitor to ground. |+| 130 | VSS | power_in | Ground reference. |+| 131 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 132 | PI0 | bidirectional | Port I pin 0; can be configured as TIM5_CH4, SPI2_NSS/I2S2_WS, FMC_D24, DCMI_D13, LCD_G5, or general-purpose I/O. |+| 133 | PI1 | bidirectional | Port I pin 1; can be configured as SPI2_SCK/I2S2_CK, FMC_D25, DCMI_D8, LCD_G6, or general-purpose I/O. |+| 134 | PI3 | bidirectional | Port I pin 3; can be configured as TIM8_ETR, SPI2_MOSI/I2S2_SD, FMC_D27, DCMI_D10, or general-purpose I/O. |+| 135 | VSS | power_in | Ground reference. |+| 136 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 137 | PA14 | bidirectional |  |+| 138 | PA15 | bidirectional |  |+| 139 | PC10 | bidirectional | Port C pin 10; can be configured as SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDIO_D2, DCMI_D8, LCD_R2, or general-purpose I/O. |+| 140 | PC11 | bidirectional | Port C pin 11; can be configured as I2S3ext_SD, SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDIO_D3, DCMI_D4, or general-purpose I/O. |+| 141 | PC12 | bidirectional | Port C pin 12; can be configured as TRACED3, SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDIO_CK, DCMI_D9, or general-purpose I/O. |+| 142 | PD0 | bidirectional | Port D pin 0; can be configured as CAN1_RX, FMC_D2, or general-purpose I/O. |+| 143 | PD1 | bidirectional | Port D pin 1; can be configured as CAN1_TX, FMC_D3, or general-purpose I/O. |+| 144 | PD2 | bidirectional |  |+| 145 | PD3 | bidirectional |  |+| 146 | PD4 | bidirectional |  |+| 147 | PD5 | bidirectional |  |+| 148 | VSS | power_in | Ground reference. |+| 149 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 150 | PD6 | bidirectional |  |+| 151 | PD7 | bidirectional |  |+| 152 | PG9 | bidirectional | Port G pin 9; can be configured as USART6_RX, QUADSPI_BK2_IO2, FMC_NE2/FMC_NCE, DCMI_VSYNC, or general-purpose I/O. |+| 153 | PG10 | bidirectional | Port G pin 10; can be configured as LCD_G3, FMC_NE3, DCMI_D2, LCD_B2, or general-purpose I/O. |+| 154 | PG11 | bidirectional | Port G pin 11; can be configured as ETH_MII_TX_EN/ETH_RMII_TX_EN, DCMI_D3, LCD_B3, or general-purpose I/O. |+| 155 | PG12 | bidirectional | Port G pin 12; can be configured as SPI6_MISO, USART6_RTS, LCD_B4, FMC_NE4, LCD_B1, or general-purpose I/O. |+| 156 | PG13 | bidirectional | Port G pin 13; can be configured as TRACED0, SPI6_SCK, USART6_CTS, ETH_MII_TXD0/ETH_RMII_TXD0, FMC_A24, LCD_R0, or general-purpose I/O. |+| 157 | PG14 | bidirectional | Port G pin 14; can be configured as TRACED1, SPI6_MOSI, USART6_TX, QUADSPI_BK2_IO3, ETH_MII_TXD1/ETH_RMII_TXD1, FMC_A25, LCD_B0, or general-purpose I/O. |+| 158 | VSS | power_in | Ground reference. |+| 159 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 160 | PG15 | bidirectional |  |+| 161 | PB3 | bidirectional |  |+| 162 | PB4 | bidirectional |  |+| 163 | PB5 | bidirectional |  |+| 164 | PB6 | bidirectional |  |+| 165 | PB7 | bidirectional |  |+| 166 | BOOT0 | input |  |+| 167 | PB8 | bidirectional |  |+| 168 | PB9 | bidirectional |  |+| 169 | PE0 | bidirectional |  |+| 170 | PE1 | bidirectional |  |+| 171 | PDR_ON | input |  |+| 172 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 173 | PI4 | bidirectional | Port I pin 4; can be configured as TIM8_BKIN, FMC_NBL2, DCMI_D5, LCD_B4, or general-purpose I/O. |+| 174 | PI5 | bidirectional | Port I pin 5; can be configured as TIM8_CH1, FMC_NBL3, DCMI_VSYNC, LCD_B5, or general-purpose I/O. |+| 175 | PI6 | bidirectional | Port I pin 6; can be configured as TIM8_CH2, FMC_D28, DCMI_D6, LCD_B6, or general-purpose I/O. |+| 176 | PI7 | bidirectional | Port I pin 7; can be configured as TIM8_CH3, FMC_D29, DCMI_D7, LCD_B7, or general-purpose I/O. |  ## Key specifications
package.json+2−2
@@ -1,6 +1,6 @@ {   "slug": "stm32f469iit6",-  "version": "0.1.0",+  "version": "0.1.1",   "type": "component",   "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-176(24x24). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",   "tags": [@@ -1141,4 +1141,4 @@       "footprint": "viewers/footprint.html"     }   }-}\ No newline at end of file+}
page.json+4−4
@@ -4,7 +4,7 @@   "slug": "stm32f469iit6",   "title": "STM32F469IIT6",   "brief": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-176(24x24). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",-  "version": "0.1.0",+  "version": "0.1.1",   "license": "CC-BY-SA-4.0",   "tags": [     "component",@@ -1168,7 +1168,7 @@     "viewers/symbol.html",     "viewers/footprint.html"   ],-  "visibility": {-    "public": true-  }+  "visibility": "public",+  "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-176(24x24). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+  "org": "adom" }\ No newline at end of file
stm32f469iit6.kicad_sym+320−320
@@ -8,87 +8,87 @@       (stroke (width 0.254) (type default)) (fill (type background)))     )     (symbol "STM32F469IIT6_1_1"-    (pin output line (at -17.78 109.22 0) (length 5.08)+    (pin bidirectional line (at -17.78 109.22 0) (length 5.08)       (name "PE2" (effects (font (size 1.27 1.27))))       (number "1" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 106.68 0) (length 5.08)+    (pin bidirectional line (at -17.78 106.68 0) (length 5.08)       (name "PE3" (effects (font (size 1.27 1.27))))       (number "2" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 104.14 0) (length 5.08)+    (pin bidirectional line (at -17.78 104.14 0) (length 5.08)       (name "PE4" (effects (font (size 1.27 1.27))))       (number "3" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 101.60 0) (length 5.08)+    (pin bidirectional line (at -17.78 101.60 0) (length 5.08)       (name "PE5" (effects (font (size 1.27 1.27))))       (number "4" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 99.06 0) (length 5.08)+    (pin bidirectional line (at -17.78 99.06 0) (length 5.08)       (name "PE6" (effects (font (size 1.27 1.27))))       (number "5" (effects (font (size 1.27 1.27))))     )     (pin power_in line (at -17.78 96.52 0) (length 5.08)-      (name "VSS" (effects (font (size 1.27 1.27))))+      (name "VBAT" (effects (font (size 1.27 1.27))))       (number "6" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at -17.78 93.98 0) (length 5.08)-      (name "VDD" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 93.98 0) (length 5.08)+      (name "PI8" (effects (font (size 1.27 1.27))))       (number "7" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at -17.78 91.44 0) (length 5.08)-      (name "VBAT" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 91.44 0) (length 5.08)+      (name "PC13" (effects (font (size 1.27 1.27))))       (number "8" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 88.90 0) (length 5.08)-      (name "PI8" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 88.90 0) (length 5.08)+      (name "PC14/OSC32_IN" (effects (font (size 1.27 1.27))))       (number "9" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 86.36 0) (length 5.08)-      (name "PC13" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 86.36 0) (length 5.08)+      (name "PC15/OSC32_OUT" (effects (font (size 1.27 1.27))))       (number "10" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 83.82 0) (length 5.08)-      (name "PC14-OSC32_IN" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 83.82 0) (length 5.08)+      (name "PI9" (effects (font (size 1.27 1.27))))       (number "11" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 81.28 0) (length 5.08)-      (name "PC15-OSC32_OUT" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 81.28 0) (length 5.08)+      (name "PI10" (effects (font (size 1.27 1.27))))       (number "12" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at -17.78 78.74 0) (length 5.08)-      (name "VDD" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 78.74 0) (length 5.08)+      (name "PI11" (effects (font (size 1.27 1.27))))       (number "13" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 76.20 0) (length 5.08)-      (name "PI9" (effects (font (size 1.27 1.27))))+    (pin power_in line (at -17.78 76.20 0) (length 5.08)+      (name "VSS" (effects (font (size 1.27 1.27))))       (number "14" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 73.66 0) (length 5.08)-      (name "PI10" (effects (font (size 1.27 1.27))))+    (pin power_in line (at -17.78 73.66 0) (length 5.08)+      (name "VDD" (effects (font (size 1.27 1.27))))       (number "15" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 71.12 0) (length 5.08)-      (name "PI11" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 71.12 0) (length 5.08)+      (name "PF0" (effects (font (size 1.27 1.27))))       (number "16" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at -17.78 68.58 0) (length 5.08)-      (name "VSS" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 68.58 0) (length 5.08)+      (name "PF1" (effects (font (size 1.27 1.27))))       (number "17" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at -17.78 66.04 0) (length 5.08)-      (name "VDD" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 66.04 0) (length 5.08)+      (name "PF2" (effects (font (size 1.27 1.27))))       (number "18" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 63.50 0) (length 5.08)+    (pin bidirectional line (at -17.78 63.50 0) (length 5.08)       (name "PF3" (effects (font (size 1.27 1.27))))       (number "19" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 60.96 0) (length 5.08)+    (pin bidirectional line (at -17.78 60.96 0) (length 5.08)       (name "PF4" (effects (font (size 1.27 1.27))))       (number "20" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 58.42 0) (length 5.08)+    (pin bidirectional line (at -17.78 58.42 0) (length 5.08)       (name "PF5" (effects (font (size 1.27 1.27))))       (number "21" (effects (font (size 1.27 1.27))))     )@@ -100,51 +100,51 @@       (name "VDD" (effects (font (size 1.27 1.27))))       (number "23" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 50.80 0) (length 5.08)+    (pin bidirectional line (at -17.78 50.80 0) (length 5.08)       (name "PF6" (effects (font (size 1.27 1.27))))       (number "24" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 48.26 0) (length 5.08)+    (pin bidirectional line (at -17.78 48.26 0) (length 5.08)       (name "PF7" (effects (font (size 1.27 1.27))))       (number "25" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 45.72 0) (length 5.08)+    (pin bidirectional line (at -17.78 45.72 0) (length 5.08)       (name "PF8" (effects (font (size 1.27 1.27))))       (number "26" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 43.18 0) (length 5.08)+    (pin bidirectional line (at -17.78 43.18 0) (length 5.08)       (name "PF9" (effects (font (size 1.27 1.27))))       (number "27" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 40.64 0) (length 5.08)+    (pin bidirectional line (at -17.78 40.64 0) (length 5.08)       (name "PF10" (effects (font (size 1.27 1.27))))       (number "28" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 38.10 0) (length 5.08)-      (name "PH0-OSC_IN" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 38.10 0) (length 5.08)+      (name "PH0/OSC_IN" (effects (font (size 1.27 1.27))))       (number "29" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 35.56 0) (length 5.08)-      (name "PH1-OSC_OUT" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 35.56 0) (length 5.08)+      (name "PH1/OSC_OUT" (effects (font (size 1.27 1.27))))       (number "30" (effects (font (size 1.27 1.27))))     )-    (pin bidirectional line (at -17.78 33.02 0) (length 5.08)+    (pin input line (at -17.78 33.02 0) (length 5.08)       (name "NRST" (effects (font (size 1.27 1.27))))       (number "31" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 30.48 0) (length 5.08)+    (pin bidirectional line (at -17.78 30.48 0) (length 5.08)       (name "PC0" (effects (font (size 1.27 1.27))))       (number "32" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 27.94 0) (length 5.08)+    (pin bidirectional line (at -17.78 27.94 0) (length 5.08)       (name "PC1" (effects (font (size 1.27 1.27))))       (number "33" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 25.40 0) (length 5.08)+    (pin bidirectional line (at -17.78 25.40 0) (length 5.08)       (name "PC2" (effects (font (size 1.27 1.27))))       (number "34" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 22.86 0) (length 5.08)+    (pin bidirectional line (at -17.78 22.86 0) (length 5.08)       (name "PC3" (effects (font (size 1.27 1.27))))       (number "35" (effects (font (size 1.27 1.27))))     )@@ -153,563 +153,563 @@       (number "36" (effects (font (size 1.27 1.27))))     )     (pin power_in line (at -17.78 17.78 0) (length 5.08)-      (name "VSS" (effects (font (size 1.27 1.27))))+      (name "VSSA" (effects (font (size 1.27 1.27))))       (number "37" (effects (font (size 1.27 1.27))))     )     (pin power_in line (at -17.78 15.24 0) (length 5.08)-      (name "VSSA" (effects (font (size 1.27 1.27))))+      (name "VREF+" (effects (font (size 1.27 1.27))))       (number "38" (effects (font (size 1.27 1.27))))     )     (pin power_in line (at -17.78 12.70 0) (length 5.08)-      (name "VREF-" (effects (font (size 1.27 1.27))))+      (name "VDDA" (effects (font (size 1.27 1.27))))       (number "39" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at -17.78 10.16 0) (length 5.08)-      (name "VREF+" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 10.16 0) (length 5.08)+      (name "PA0/WKUP" (effects (font (size 1.27 1.27))))       (number "40" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at -17.78 7.62 0) (length 5.08)-      (name "VDDA" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 7.62 0) (length 5.08)+      (name "PA1" (effects (font (size 1.27 1.27))))       (number "41" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 5.08 0) (length 5.08)-      (name "PA0-WKUP" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 5.08 0) (length 5.08)+      (name "PA2" (effects (font (size 1.27 1.27))))       (number "42" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 2.54 0) (length 5.08)-      (name "PA1" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 2.54 0) (length 5.08)+      (name "PH2" (effects (font (size 1.27 1.27))))       (number "43" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 0.00 0) (length 5.08)-      (name "PA2" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 0.00 0) (length 5.08)+      (name "PH3" (effects (font (size 1.27 1.27))))       (number "44" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -2.54 0) (length 5.08)-      (name "PH2" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -2.54 0) (length 5.08)+      (name "PH4" (effects (font (size 1.27 1.27))))       (number "45" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -5.08 0) (length 5.08)-      (name "PH3" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -5.08 0) (length 5.08)+      (name "PH5" (effects (font (size 1.27 1.27))))       (number "46" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -7.62 0) (length 5.08)-      (name "PH4" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -7.62 0) (length 5.08)+      (name "PA3" (effects (font (size 1.27 1.27))))       (number "47" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -10.16 0) (length 5.08)-      (name "PH5" (effects (font (size 1.27 1.27))))+    (pin input line (at -17.78 -10.16 0) (length 5.08)+      (name "BYPASS_REG" (effects (font (size 1.27 1.27))))       (number "48" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -12.70 0) (length 5.08)-      (name "PA3" (effects (font (size 1.27 1.27))))+    (pin power_in line (at -17.78 -12.70 0) (length 5.08)+      (name "VDD" (effects (font (size 1.27 1.27))))       (number "49" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at -17.78 -15.24 0) (length 5.08)-      (name "VSS" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -15.24 0) (length 5.08)+      (name "PA4" (effects (font (size 1.27 1.27))))       (number "50" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at -17.78 -17.78 0) (length 5.08)-      (name "VDD" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -17.78 0) (length 5.08)+      (name "PA5" (effects (font (size 1.27 1.27))))       (number "51" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -20.32 0) (length 5.08)-      (name "PA4" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -20.32 0) (length 5.08)+      (name "PA6" (effects (font (size 1.27 1.27))))       (number "52" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -22.86 0) (length 5.08)-      (name "PA5" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -22.86 0) (length 5.08)+      (name "PA7" (effects (font (size 1.27 1.27))))       (number "53" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -25.40 0) (length 5.08)-      (name "PA6" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -25.40 0) (length 5.08)+      (name "PC4" (effects (font (size 1.27 1.27))))       (number "54" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -27.94 0) (length 5.08)-      (name "PA7" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -27.94 0) (length 5.08)+      (name "PC5" (effects (font (size 1.27 1.27))))       (number "55" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -30.48 0) (length 5.08)+    (pin bidirectional line (at -17.78 -30.48 0) (length 5.08)       (name "PB0" (effects (font (size 1.27 1.27))))       (number "56" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -33.02 0) (length 5.08)+    (pin bidirectional line (at -17.78 -33.02 0) (length 5.08)       (name "PB1" (effects (font (size 1.27 1.27))))       (number "57" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -35.56 0) (length 5.08)-      (name "PB2-BOOT1" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -35.56 0) (length 5.08)+      (name "PB2/BOOT1" (effects (font (size 1.27 1.27))))       (number "58" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -38.10 0) (length 5.08)-      (name "PI15" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -38.10 0) (length 5.08)+      (name "PF11" (effects (font (size 1.27 1.27))))       (number "59" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -40.64 0) (length 5.08)-      (name "PJ0" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -40.64 0) (length 5.08)+      (name "PF12" (effects (font (size 1.27 1.27))))       (number "60" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -43.18 0) (length 5.08)-      (name "PJ1" (effects (font (size 1.27 1.27))))+    (pin power_in line (at -17.78 -43.18 0) (length 5.08)+      (name "VSS" (effects (font (size 1.27 1.27))))       (number "61" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -45.72 0) (length 5.08)-      (name "PJ2" (effects (font (size 1.27 1.27))))+    (pin power_in line (at -17.78 -45.72 0) (length 5.08)+      (name "VDD" (effects (font (size 1.27 1.27))))       (number "62" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -48.26 0) (length 5.08)-      (name "PJ3" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -48.26 0) (length 5.08)+      (name "PF13" (effects (font (size 1.27 1.27))))       (number "63" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -50.80 0) (length 5.08)-      (name "PJ4" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -50.80 0) (length 5.08)+      (name "PF14" (effects (font (size 1.27 1.27))))       (number "64" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -53.34 0) (length 5.08)-      (name "PF11" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -53.34 0) (length 5.08)+      (name "PF15" (effects (font (size 1.27 1.27))))       (number "65" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -55.88 0) (length 5.08)-      (name "PF12" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -55.88 0) (length 5.08)+      (name "PG0" (effects (font (size 1.27 1.27))))       (number "66" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at -17.78 -58.42 0) (length 5.08)-      (name "VSS" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -58.42 0) (length 5.08)+      (name "PG1" (effects (font (size 1.27 1.27))))       (number "67" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at -17.78 -60.96 0) (length 5.08)-      (name "VDD" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -60.96 0) (length 5.08)+      (name "PE7" (effects (font (size 1.27 1.27))))       (number "68" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -63.50 0) (length 5.08)-      (name "PF13" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -63.50 0) (length 5.08)+      (name "PE8" (effects (font (size 1.27 1.27))))       (number "69" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -66.04 0) (length 5.08)-      (name "PF14" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -66.04 0) (length 5.08)+      (name "PE9" (effects (font (size 1.27 1.27))))       (number "70" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -68.58 0) (length 5.08)-      (name "PF15" (effects (font (size 1.27 1.27))))+    (pin power_in line (at -17.78 -68.58 0) (length 5.08)+      (name "VSS" (effects (font (size 1.27 1.27))))       (number "71" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -71.12 0) (length 5.08)-      (name "PG0" (effects (font (size 1.27 1.27))))+    (pin power_in line (at -17.78 -71.12 0) (length 5.08)+      (name "VDD" (effects (font (size 1.27 1.27))))       (number "72" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -73.66 0) (length 5.08)-      (name "PG1" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -73.66 0) (length 5.08)+      (name "PE10" (effects (font (size 1.27 1.27))))       (number "73" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -76.20 0) (length 5.08)-      (name "PE7" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -76.20 0) (length 5.08)+      (name "PE11" (effects (font (size 1.27 1.27))))       (number "74" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -78.74 0) (length 5.08)-      (name "PE8" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -78.74 0) (length 5.08)+      (name "PE12" (effects (font (size 1.27 1.27))))       (number "75" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -81.28 0) (length 5.08)-      (name "PE9" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -81.28 0) (length 5.08)+      (name "PE13" (effects (font (size 1.27 1.27))))       (number "76" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -83.82 0) (length 5.08)-      (name "PE10" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -83.82 0) (length 5.08)+      (name "PE14" (effects (font (size 1.27 1.27))))       (number "77" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -86.36 0) (length 5.08)-      (name "PE11" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -86.36 0) (length 5.08)+      (name "PE15" (effects (font (size 1.27 1.27))))       (number "78" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -88.90 0) (length 5.08)-      (name "PE12" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -88.90 0) (length 5.08)+      (name "PB10" (effects (font (size 1.27 1.27))))       (number "79" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -91.44 0) (length 5.08)-      (name "PE13" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -91.44 0) (length 5.08)+      (name "PB11" (effects (font (size 1.27 1.27))))       (number "80" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -93.98 0) (length 5.08)-      (name "PE14" (effects (font (size 1.27 1.27))))+    (pin power_in line (at -17.78 -93.98 0) (length 5.08)+      (name "VCAP1" (effects (font (size 1.27 1.27))))       (number "81" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -96.52 0) (length 5.08)-      (name "PE15" (effects (font (size 1.27 1.27))))+    (pin power_in line (at -17.78 -96.52 0) (length 5.08)+      (name "VDD" (effects (font (size 1.27 1.27))))       (number "82" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -99.06 0) (length 5.08)-      (name "PB10" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -99.06 0) (length 5.08)+      (name "PH6" (effects (font (size 1.27 1.27))))       (number "83" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -101.60 0) (length 5.08)-      (name "PB11" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -101.60 0) (length 5.08)+      (name "PH7" (effects (font (size 1.27 1.27))))       (number "84" (effects (font (size 1.27 1.27))))     )-    (pin passive line (at -17.78 -104.14 0) (length 5.08)-      (name "VCAP1" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -104.14 0) (length 5.08)+      (name "PB12" (effects (font (size 1.27 1.27))))       (number "85" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at -17.78 -106.68 0) (length 5.08)-      (name "VSS" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -106.68 0) (length 5.08)+      (name "PB13" (effects (font (size 1.27 1.27))))       (number "86" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at -17.78 -109.22 0) (length 5.08)-      (name "VDD" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -109.22 0) (length 5.08)+      (name "PB14" (effects (font (size 1.27 1.27))))       (number "87" (effects (font (size 1.27 1.27))))     )-    (pin output line (at -17.78 -111.76 0) (length 5.08)-      (name "PH6" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at -17.78 -111.76 0) (length 5.08)+      (name "PB15" (effects (font (size 1.27 1.27))))       (number "88" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 109.22 180) (length 5.08)-      (name "PD1" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 109.22 180) (length 5.08)+      (name "PI7" (effects (font (size 1.27 1.27))))       (number "176" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 106.68 180) (length 5.08)-      (name "PD0" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 106.68 180) (length 5.08)+      (name "PI6" (effects (font (size 1.27 1.27))))       (number "175" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 104.14 180) (length 5.08)-      (name "PC12" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 104.14 180) (length 5.08)+      (name "PI5" (effects (font (size 1.27 1.27))))       (number "174" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 101.60 180) (length 5.08)-      (name "PC11" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 101.60 180) (length 5.08)+      (name "PI4" (effects (font (size 1.27 1.27))))       (number "173" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 99.06 180) (length 5.08)-      (name "PC10" (effects (font (size 1.27 1.27))))+    (pin power_in line (at 17.78 99.06 180) (length 5.08)+      (name "VDD" (effects (font (size 1.27 1.27))))       (number "172" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 96.52 180) (length 5.08)-      (name "PA15(JTDI)" (effects (font (size 1.27 1.27))))+    (pin input line (at 17.78 96.52 180) (length 5.08)+      (name "PDR_ON" (effects (font (size 1.27 1.27))))       (number "171" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 93.98 180) (length 5.08)-      (name "PA14(JTCK-SWCLK)" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 93.98 180) (length 5.08)+      (name "PE1" (effects (font (size 1.27 1.27))))       (number "170" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at 17.78 91.44 180) (length 5.08)-      (name "VDD" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 91.44 180) (length 5.08)+      (name "PE0" (effects (font (size 1.27 1.27))))       (number "169" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at 17.78 88.90 180) (length 5.08)-      (name "VSS" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 88.90 180) (length 5.08)+      (name "PB9" (effects (font (size 1.27 1.27))))       (number "168" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 86.36 180) (length 5.08)-      (name "PG14" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 86.36 180) (length 5.08)+      (name "PB8" (effects (font (size 1.27 1.27))))       (number "167" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 83.82 180) (length 5.08)-      (name "PG13" (effects (font (size 1.27 1.27))))+    (pin input line (at 17.78 83.82 180) (length 5.08)+      (name "BOOT0" (effects (font (size 1.27 1.27))))       (number "166" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 81.28 180) (length 5.08)-      (name "PG12" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 81.28 180) (length 5.08)+      (name "PB7" (effects (font (size 1.27 1.27))))       (number "165" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 78.74 180) (length 5.08)-      (name "PG11" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 78.74 180) (length 5.08)+      (name "PB6" (effects (font (size 1.27 1.27))))       (number "164" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 76.20 180) (length 5.08)-      (name "PG10" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 76.20 180) (length 5.08)+      (name "PB5" (effects (font (size 1.27 1.27))))       (number "163" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 73.66 180) (length 5.08)-      (name "PG9" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 73.66 180) (length 5.08)+      (name "PB4" (effects (font (size 1.27 1.27))))       (number "162" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 71.12 180) (length 5.08)-      (name "PI3" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 71.12 180) (length 5.08)+      (name "PB3" (effects (font (size 1.27 1.27))))       (number "161" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 68.58 180) (length 5.08)-      (name "PI2" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 68.58 180) (length 5.08)+      (name "PG15" (effects (font (size 1.27 1.27))))       (number "160" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 66.04 180) (length 5.08)-      (name "PI1" (effects (font (size 1.27 1.27))))+    (pin power_in line (at 17.78 66.04 180) (length 5.08)+      (name "VDD" (effects (font (size 1.27 1.27))))       (number "159" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 63.50 180) (length 5.08)-      (name "PI0" (effects (font (size 1.27 1.27))))+    (pin power_in line (at 17.78 63.50 180) (length 5.08)+      (name "VSS" (effects (font (size 1.27 1.27))))       (number "158" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 60.96 180) (length 5.08)-      (name "PH15" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 60.96 180) (length 5.08)+      (name "PG14" (effects (font (size 1.27 1.27))))       (number "157" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 58.42 180) (length 5.08)-      (name "PH14" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 58.42 180) (length 5.08)+      (name "PG13" (effects (font (size 1.27 1.27))))       (number "156" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 55.88 180) (length 5.08)-      (name "PH13" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 55.88 180) (length 5.08)+      (name "PG12" (effects (font (size 1.27 1.27))))       (number "155" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at 17.78 53.34 180) (length 5.08)-      (name "VDD" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 53.34 180) (length 5.08)+      (name "PG11" (effects (font (size 1.27 1.27))))       (number "154" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at 17.78 50.80 180) (length 5.08)-      (name "VSS" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 50.80 180) (length 5.08)+      (name "PG10" (effects (font (size 1.27 1.27))))       (number "153" (effects (font (size 1.27 1.27))))     )-    (pin passive line (at 17.78 48.26 180) (length 5.08)-      (name "VCAP2" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 48.26 180) (length 5.08)+      (name "PG9" (effects (font (size 1.27 1.27))))       (number "152" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 45.72 180) (length 5.08)-      (name "PA13(JTMS-SWDIO)" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 45.72 180) (length 5.08)+      (name "PD7" (effects (font (size 1.27 1.27))))       (number "151" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 43.18 180) (length 5.08)-      (name "PA12" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 43.18 180) (length 5.08)+      (name "PD6" (effects (font (size 1.27 1.27))))       (number "150" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 40.64 180) (length 5.08)-      (name "PA11" (effects (font (size 1.27 1.27))))+    (pin power_in line (at 17.78 40.64 180) (length 5.08)+      (name "VDD" (effects (font (size 1.27 1.27))))       (number "149" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 38.10 180) (length 5.08)-      (name "PA10" (effects (font (size 1.27 1.27))))+    (pin power_in line (at 17.78 38.10 180) (length 5.08)+      (name "VSS" (effects (font (size 1.27 1.27))))       (number "148" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 35.56 180) (length 5.08)-      (name "PA9" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 35.56 180) (length 5.08)+      (name "PD5" (effects (font (size 1.27 1.27))))       (number "147" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 33.02 180) (length 5.08)-      (name "PA8" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 33.02 180) (length 5.08)+      (name "PD4" (effects (font (size 1.27 1.27))))       (number "146" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 30.48 180) (length 5.08)-      (name "PC9" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 30.48 180) (length 5.08)+      (name "PD3" (effects (font (size 1.27 1.27))))       (number "145" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 27.94 180) (length 5.08)-      (name "PC8" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 27.94 180) (length 5.08)+      (name "PD2" (effects (font (size 1.27 1.27))))       (number "144" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 25.40 180) (length 5.08)-      (name "PC7" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 25.40 180) (length 5.08)+      (name "PD1" (effects (font (size 1.27 1.27))))       (number "143" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 22.86 180) (length 5.08)-      (name "PC6" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 22.86 180) (length 5.08)+      (name "PD0" (effects (font (size 1.27 1.27))))       (number "142" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at 17.78 20.32 180) (length 5.08)-      (name "VDDUSB" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 20.32 180) (length 5.08)+      (name "PC12" (effects (font (size 1.27 1.27))))       (number "141" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at 17.78 17.78 180) (length 5.08)-      (name "VSS" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 17.78 180) (length 5.08)+      (name "PC11" (effects (font (size 1.27 1.27))))       (number "140" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 15.24 180) (length 5.08)-      (name "PG8" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 15.24 180) (length 5.08)+      (name "PC10" (effects (font (size 1.27 1.27))))       (number "139" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 12.70 180) (length 5.08)-      (name "PG7" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 12.70 180) (length 5.08)+      (name "PA15" (effects (font (size 1.27 1.27))))       (number "138" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 10.16 180) (length 5.08)-      (name "PG6" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 10.16 180) (length 5.08)+      (name "PA14" (effects (font (size 1.27 1.27))))       (number "137" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 7.62 180) (length 5.08)-      (name "PG5" (effects (font (size 1.27 1.27))))+    (pin power_in line (at 17.78 7.62 180) (length 5.08)+      (name "VDD" (effects (font (size 1.27 1.27))))       (number "136" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 5.08 180) (length 5.08)-      (name "PG4" (effects (font (size 1.27 1.27))))+    (pin power_in line (at 17.78 5.08 180) (length 5.08)+      (name "VSS" (effects (font (size 1.27 1.27))))       (number "135" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 2.54 180) (length 5.08)-      (name "PG3" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 2.54 180) (length 5.08)+      (name "PI3" (effects (font (size 1.27 1.27))))       (number "134" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 0.00 180) (length 5.08)-      (name "PG2" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 0.00 180) (length 5.08)+      (name "PI1" (effects (font (size 1.27 1.27))))       (number "133" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at 17.78 -2.54 180) (length 5.08)-      (name "VSSDSI" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -2.54 180) (length 5.08)+      (name "PI0" (effects (font (size 1.27 1.27))))       (number "132" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -5.08 180) (length 5.08)-      (name "DSIHOST_D1N" (effects (font (size 1.27 1.27))))+    (pin power_in line (at 17.78 -5.08 180) (length 5.08)+      (name "VDD" (effects (font (size 1.27 1.27))))       (number "131" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -7.62 180) (length 5.08)-      (name "DSIHOST_D1P" (effects (font (size 1.27 1.27))))+    (pin power_in line (at 17.78 -7.62 180) (length 5.08)+      (name "VSS" (effects (font (size 1.27 1.27))))       (number "130" (effects (font (size 1.27 1.27))))     )     (pin power_in line (at 17.78 -10.16 180) (length 5.08)-      (name "VDD12DSI" (effects (font (size 1.27 1.27))))+      (name "VCAP2" (effects (font (size 1.27 1.27))))       (number "129" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -12.70 180) (length 5.08)-      (name "DSIHOST_CKN" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -12.70 180) (length 5.08)+      (name "PA13" (effects (font (size 1.27 1.27))))       (number "128" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -15.24 180) (length 5.08)-      (name "DSIHOST_CKP" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -15.24 180) (length 5.08)+      (name "PA12" (effects (font (size 1.27 1.27))))       (number "127" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at 17.78 -17.78 180) (length 5.08)-      (name "VSSDSI" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -17.78 180) (length 5.08)+      (name "PA11" (effects (font (size 1.27 1.27))))       (number "126" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -20.32 180) (length 5.08)-      (name "DSIHOST_D0N" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -20.32 180) (length 5.08)+      (name "PA10" (effects (font (size 1.27 1.27))))       (number "125" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -22.86 180) (length 5.08)-      (name "DSIHOST_D0P" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -22.86 180) (length 5.08)+      (name "PA9" (effects (font (size 1.27 1.27))))       (number "124" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at 17.78 -25.40 180) (length 5.08)-      (name "VDD12DSI" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -25.40 180) (length 5.08)+      (name "PA8" (effects (font (size 1.27 1.27))))       (number "123" (effects (font (size 1.27 1.27))))     )-    (pin passive line (at 17.78 -27.94 180) (length 5.08)-      (name "VCAPDSI" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -27.94 180) (length 5.08)+      (name "PC9" (effects (font (size 1.27 1.27))))       (number "122" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at 17.78 -30.48 180) (length 5.08)-      (name "VSS" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -30.48 180) (length 5.08)+      (name "PC8" (effects (font (size 1.27 1.27))))       (number "121" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at 17.78 -33.02 180) (length 5.08)-      (name "VDDDSI" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -33.02 180) (length 5.08)+      (name "PC7" (effects (font (size 1.27 1.27))))       (number "120" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -35.56 180) (length 5.08)-      (name "PD15" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -35.56 180) (length 5.08)+      (name "PC6" (effects (font (size 1.27 1.27))))       (number "119" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -38.10 180) (length 5.08)-      (name "PD14" (effects (font (size 1.27 1.27))))+    (pin power_in line (at 17.78 -38.10 180) (length 5.08)+      (name "VDDUSB" (effects (font (size 1.27 1.27))))       (number "118" (effects (font (size 1.27 1.27))))     )     (pin power_in line (at 17.78 -40.64 180) (length 5.08)-      (name "VDD" (effects (font (size 1.27 1.27))))+      (name "VSS" (effects (font (size 1.27 1.27))))       (number "117" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at 17.78 -43.18 180) (length 5.08)-      (name "VSS" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -43.18 180) (length 5.08)+      (name "PG8" (effects (font (size 1.27 1.27))))       (number "116" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -45.72 180) (length 5.08)-      (name "PD13" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -45.72 180) (length 5.08)+      (name "PG7" (effects (font (size 1.27 1.27))))       (number "115" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -48.26 180) (length 5.08)-      (name "PD12" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -48.26 180) (length 5.08)+      (name "PG6" (effects (font (size 1.27 1.27))))       (number "114" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -50.80 180) (length 5.08)-      (name "PD11" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -50.80 180) (length 5.08)+      (name "PG5" (effects (font (size 1.27 1.27))))       (number "113" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -53.34 180) (length 5.08)-      (name "PD10" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -53.34 180) (length 5.08)+      (name "PG4" (effects (font (size 1.27 1.27))))       (number "112" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -55.88 180) (length 5.08)-      (name "PD9" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -55.88 180) (length 5.08)+      (name "PG3" (effects (font (size 1.27 1.27))))       (number "111" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -58.42 180) (length 5.08)-      (name "PD8" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -58.42 180) (length 5.08)+      (name "PG2" (effects (font (size 1.27 1.27))))       (number "110" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -60.96 180) (length 5.08)-      (name "PB15" (effects (font (size 1.27 1.27))))+    (pin power_in line (at 17.78 -60.96 180) (length 5.08)+      (name "VSSDSI" (effects (font (size 1.27 1.27))))       (number "109" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -63.50 180) (length 5.08)-      (name "PB14" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -63.50 180) (length 5.08)+      (name "DSIHOST_D1N" (effects (font (size 1.27 1.27))))       (number "108" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -66.04 180) (length 5.08)-      (name "PB13" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -66.04 180) (length 5.08)+      (name "DSIHOST_D1P" (effects (font (size 1.27 1.27))))       (number "107" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -68.58 180) (length 5.08)-      (name "PB12" (effects (font (size 1.27 1.27))))+    (pin power_in line (at 17.78 -68.58 180) (length 5.08)+      (name "VDD12DSI" (effects (font (size 1.27 1.27))))       (number "106" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -71.12 180) (length 5.08)-      (name "PI7" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -71.12 180) (length 5.08)+      (name "DSIHOST_CKN" (effects (font (size 1.27 1.27))))       (number "105" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -73.66 180) (length 5.08)-      (name "PI6" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -73.66 180) (length 5.08)+      (name "DSIHOST_CKP" (effects (font (size 1.27 1.27))))       (number "104" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -76.20 180) (length 5.08)-      (name "PI5" (effects (font (size 1.27 1.27))))+    (pin power_in line (at 17.78 -76.20 180) (length 5.08)+      (name "VSSDSI" (effects (font (size 1.27 1.27))))       (number "103" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -78.74 180) (length 5.08)-      (name "PI4" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -78.74 180) (length 5.08)+      (name "DSIHOST_D0N" (effects (font (size 1.27 1.27))))       (number "102" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -81.28 180) (length 5.08)-      (name "PI3" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -81.28 180) (length 5.08)+      (name "DSIHOST_D0P" (effects (font (size 1.27 1.27))))       (number "101" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -83.82 180) (length 5.08)-      (name "PI2" (effects (font (size 1.27 1.27))))+    (pin power_in line (at 17.78 -83.82 180) (length 5.08)+      (name "VCAPDSI" (effects (font (size 1.27 1.27))))       (number "100" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -86.36 180) (length 5.08)-      (name "PI1" (effects (font (size 1.27 1.27))))+    (pin power_in line (at 17.78 -86.36 180) (length 5.08)+      (name "VDDDSI" (effects (font (size 1.27 1.27))))       (number "99" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -88.90 180) (length 5.08)-      (name "PI0" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -88.90 180) (length 5.08)+      (name "PD15" (effects (font (size 1.27 1.27))))       (number "98" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -91.44 180) (length 5.08)-      (name "PH15" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -91.44 180) (length 5.08)+      (name "PD14" (effects (font (size 1.27 1.27))))       (number "97" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -93.98 180) (length 5.08)-      (name "PH14" (effects (font (size 1.27 1.27))))+    (pin power_in line (at 17.78 -93.98 180) (length 5.08)+      (name "VDD" (effects (font (size 1.27 1.27))))       (number "96" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -96.52 180) (length 5.08)-      (name "PH13" (effects (font (size 1.27 1.27))))+    (pin power_in line (at 17.78 -96.52 180) (length 5.08)+      (name "VSS" (effects (font (size 1.27 1.27))))       (number "95" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -99.06 180) (length 5.08)-      (name "PH12" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -99.06 180) (length 5.08)+      (name "PD13" (effects (font (size 1.27 1.27))))       (number "94" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -101.60 180) (length 5.08)-      (name "PH11" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -101.60 180) (length 5.08)+      (name "PD12" (effects (font (size 1.27 1.27))))       (number "93" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -104.14 180) (length 5.08)-      (name "PH10" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -104.14 180) (length 5.08)+      (name "PD11" (effects (font (size 1.27 1.27))))       (number "92" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -106.68 180) (length 5.08)-      (name "PH9" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -106.68 180) (length 5.08)+      (name "PD10" (effects (font (size 1.27 1.27))))       (number "91" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -109.22 180) (length 5.08)-      (name "PH8" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -109.22 180) (length 5.08)+      (name "PD9" (effects (font (size 1.27 1.27))))       (number "90" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 -111.76 180) (length 5.08)-      (name "PH7" (effects (font (size 1.27 1.27))))+    (pin bidirectional line (at 17.78 -111.76 180) (length 5.08)+      (name "PD8" (effects (font (size 1.27 1.27))))       (number "89" (effects (font (size 1.27 1.27))))     )     )
stm32f469iit6.lbr+346−335
@@ -50,7 +50,7 @@ <layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> </layers> <library>-<description></description>+<description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-176(24x24). Pinout checked against ST&apos;s open pin data</description> <packages> <package name="LQFP-176_24x24mm_P0.5mm">   <description>LQFP-176, 24 x 24 mm, 0.5 mm pitch</description>@@ -256,193 +256,194 @@ </packages> <symbols> <symbol name="STM32F469IIT6">+  <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-176(24x24). Pinout checked against ST&apos;s open pin data</description>   <wire x1="-12.7" y1="111.76" x2="12.7" y2="111.76" width="0.254" layer="94"/>   <wire x1="12.7" y1="111.76" x2="12.7" y2="-114.3" width="0.254" layer="94"/>   <wire x1="12.7" y1="-114.3" x2="-12.7" y2="-114.3" width="0.254" layer="94"/>   <wire x1="-12.7" y1="-114.3" x2="-12.7" y2="111.76" width="0.254" layer="94"/>   <text x="0.0000" y="114.3000" size="1.27" layer="95" align="center">&gt;NAME</text>   <text x="0.0000" y="-116.8400" size="1.27" layer="96" align="center">&gt;VALUE</text>-  <pin name="PE2" x="-17.78" y="109.22" length="middle" direction="out"/>-  <pin name="PE3" x="-17.78" y="106.68" length="middle" direction="out"/>-  <pin name="PE4" x="-17.78" y="104.14" length="middle" direction="out"/>-  <pin name="PE5" x="-17.78" y="101.6" length="middle" direction="out"/>-  <pin name="PE6" x="-17.78" y="99.06" length="middle" direction="out"/>-  <pin name="VSS" x="-17.78" y="96.52" length="middle" direction="pwr"/>-  <pin name="VDD" x="-17.78" y="93.98" length="middle" direction="pwr"/>-  <pin name="VBAT" x="-17.78" y="91.44" length="middle" direction="pwr"/>-  <pin name="PI8" x="-17.78" y="88.9" length="middle" direction="out"/>-  <pin name="PC13" x="-17.78" y="86.36" length="middle" direction="out"/>-  <pin name="PC14-OSC32_IN" x="-17.78" y="83.82" length="middle" direction="out"/>-  <pin name="PC15-OSC32_OUT" x="-17.78" y="81.28" length="middle" direction="out"/>-  <pin name="VDD@2" x="-17.78" y="78.74" length="middle" direction="pwr"/>-  <pin name="PI9" x="-17.78" y="76.2" length="middle" direction="out"/>-  <pin name="PI10" x="-17.78" y="73.66" length="middle" direction="out"/>-  <pin name="PI11" x="-17.78" y="71.12" length="middle" direction="out"/>-  <pin name="VSS@2" x="-17.78" y="68.58" length="middle" direction="pwr"/>-  <pin name="VDD@3" x="-17.78" y="66.04" length="middle" direction="pwr"/>-  <pin name="PF3" x="-17.78" y="63.5" length="middle" direction="out"/>-  <pin name="PF4" x="-17.78" y="60.96" length="middle" direction="out"/>-  <pin name="PF5" x="-17.78" y="58.42" length="middle" direction="out"/>-  <pin name="VSS@3" x="-17.78" y="55.88" length="middle" direction="pwr"/>-  <pin name="VDD@4" x="-17.78" y="53.34" length="middle" direction="pwr"/>-  <pin name="PF6" x="-17.78" y="50.8" length="middle" direction="out"/>-  <pin name="PF7" x="-17.78" y="48.26" length="middle" direction="out"/>-  <pin name="PF8" x="-17.78" y="45.72" length="middle" direction="out"/>-  <pin name="PF9" x="-17.78" y="43.18" length="middle" direction="out"/>-  <pin name="PF10" x="-17.78" y="40.64" length="middle" direction="out"/>-  <pin name="PH0-OSC_IN" x="-17.78" y="38.1" length="middle" direction="out"/>-  <pin name="PH1-OSC_OUT" x="-17.78" y="35.56" length="middle" direction="out"/>-  <pin name="NRST" x="-17.78" y="33.02" length="middle" direction="io"/>-  <pin name="PC0" x="-17.78" y="30.48" length="middle" direction="out"/>-  <pin name="PC1" x="-17.78" y="27.94" length="middle" direction="out"/>-  <pin name="PC2" x="-17.78" y="25.4" length="middle" direction="out"/>-  <pin name="PC3" x="-17.78" y="22.86" length="middle" direction="out"/>-  <pin name="VDD@5" x="-17.78" y="20.32" length="middle" direction="pwr"/>-  <pin name="VSS@4" x="-17.78" y="17.78" length="middle" direction="pwr"/>-  <pin name="VSSA" x="-17.78" y="15.24" length="middle" direction="pwr"/>-  <pin name="VREF-" x="-17.78" y="12.7" length="middle" direction="pwr"/>-  <pin name="VREF+" x="-17.78" y="10.16" length="middle" direction="pwr"/>-  <pin name="VDDA" x="-17.78" y="7.62" length="middle" direction="pwr"/>-  <pin name="PA0-WKUP" x="-17.78" y="5.08" length="middle" direction="out"/>-  <pin name="PA1" x="-17.78" y="2.54" length="middle" direction="out"/>-  <pin name="PA2" x="-17.78" y="0" length="middle" direction="out"/>-  <pin name="PH2" x="-17.78" y="-2.54" length="middle" direction="out"/>-  <pin name="PH3" x="-17.78" y="-5.08" length="middle" direction="out"/>-  <pin name="PH4" x="-17.78" y="-7.62" length="middle" direction="out"/>-  <pin name="PH5" x="-17.78" y="-10.16" length="middle" direction="out"/>-  <pin name="PA3" x="-17.78" y="-12.7" length="middle" direction="out"/>-  <pin name="VSS@5" x="-17.78" y="-15.24" length="middle" direction="pwr"/>-  <pin name="VDD@6" x="-17.78" y="-17.78" length="middle" direction="pwr"/>-  <pin name="PA4" x="-17.78" y="-20.32" length="middle" direction="out"/>-  <pin name="PA5" x="-17.78" y="-22.86" length="middle" direction="out"/>-  <pin name="PA6" x="-17.78" y="-25.4" length="middle" direction="out"/>-  <pin name="PA7" x="-17.78" y="-27.94" length="middle" direction="out"/>-  <pin name="PB0" x="-17.78" y="-30.48" length="middle" direction="out"/>-  <pin name="PB1" x="-17.78" y="-33.02" length="middle" direction="out"/>-  <pin name="PB2-BOOT1" x="-17.78" y="-35.56" length="middle" direction="out"/>-  <pin name="PI15" x="-17.78" y="-38.1" length="middle" direction="out"/>-  <pin name="PJ0" x="-17.78" y="-40.64" length="middle" direction="out"/>-  <pin name="PJ1" x="-17.78" y="-43.18" length="middle" direction="out"/>-  <pin name="PJ2" x="-17.78" y="-45.72" length="middle" direction="out"/>-  <pin name="PJ3" x="-17.78" y="-48.26" length="middle" direction="out"/>-  <pin name="PJ4" x="-17.78" y="-50.8" length="middle" direction="out"/>-  <pin name="PF11" x="-17.78" y="-53.34" length="middle" direction="out"/>-  <pin name="PF12" x="-17.78" y="-55.88" length="middle" direction="out"/>-  <pin name="VSS@6" x="-17.78" y="-58.42" length="middle" direction="pwr"/>-  <pin name="VDD@7" x="-17.78" y="-60.96" length="middle" direction="pwr"/>-  <pin name="PF13" x="-17.78" y="-63.5" length="middle" direction="out"/>-  <pin name="PF14" x="-17.78" y="-66.04" length="middle" direction="out"/>-  <pin name="PF15" x="-17.78" y="-68.58" length="middle" direction="out"/>-  <pin name="PG0" x="-17.78" y="-71.12" length="middle" direction="out"/>-  <pin name="PG1" x="-17.78" y="-73.66" length="middle" direction="out"/>-  <pin name="PE7" x="-17.78" y="-76.2" length="middle" direction="out"/>-  <pin name="PE8" x="-17.78" y="-78.74" length="middle" direction="out"/>-  <pin name="PE9" x="-17.78" y="-81.28" length="middle" direction="out"/>-  <pin name="PE10" x="-17.78" y="-83.82" length="middle" direction="out"/>-  <pin name="PE11" x="-17.78" y="-86.36" length="middle" direction="out"/>-  <pin name="PE12" x="-17.78" y="-88.9" length="middle" direction="out"/>-  <pin name="PE13" x="-17.78" y="-91.44" length="middle" direction="out"/>-  <pin name="PE14" x="-17.78" y="-93.98" length="middle" direction="out"/>-  <pin name="PE15" x="-17.78" y="-96.52" length="middle" direction="out"/>-  <pin name="PB10" x="-17.78" y="-99.06" length="middle" direction="out"/>-  <pin name="PB11" x="-17.78" y="-101.6" length="middle" direction="out"/>-  <pin name="VCAP1" x="-17.78" y="-104.14" length="middle" direction="pas"/>-  <pin name="VSS@7" x="-17.78" y="-106.68" length="middle" direction="pwr"/>-  <pin name="VDD@8" x="-17.78" y="-109.22" length="middle" direction="pwr"/>-  <pin name="PH6" x="-17.78" y="-111.76" length="middle" direction="out"/>-  <pin name="PD1" x="17.78" y="109.22" length="middle" direction="out" rot="R180"/>-  <pin name="PD0" x="17.78" y="106.68" length="middle" direction="out" rot="R180"/>-  <pin name="PC12" x="17.78" y="104.14" length="middle" direction="out" rot="R180"/>-  <pin name="PC11" x="17.78" y="101.6" length="middle" direction="out" rot="R180"/>-  <pin name="PC10" x="17.78" y="99.06" length="middle" direction="out" rot="R180"/>-  <pin name="PA15_JTDI" x="17.78" y="96.52" length="middle" direction="out" rot="R180"/>-  <pin name="PA14_JTCK-SWCLK" x="17.78" y="93.98" length="middle" direction="out" rot="R180"/>-  <pin name="VDD@9" x="17.78" y="91.44" length="middle" direction="pwr" rot="R180"/>-  <pin name="VSS@8" x="17.78" y="88.9" length="middle" direction="pwr" rot="R180"/>-  <pin name="PG14" x="17.78" y="86.36" length="middle" direction="out" rot="R180"/>-  <pin name="PG13" x="17.78" y="83.82" length="middle" direction="out" rot="R180"/>-  <pin name="PG12" x="17.78" y="81.28" length="middle" direction="out" rot="R180"/>-  <pin name="PG11" x="17.78" y="78.74" length="middle" direction="out" rot="R180"/>-  <pin name="PG10" x="17.78" y="76.2" length="middle" direction="out" rot="R180"/>-  <pin name="PG9" x="17.78" y="73.66" length="middle" direction="out" rot="R180"/>-  <pin name="PI3" x="17.78" y="71.12" length="middle" direction="out" rot="R180"/>-  <pin name="PI2" x="17.78" y="68.58" length="middle" direction="out" rot="R180"/>-  <pin name="PI1" x="17.78" y="66.04" length="middle" direction="out" rot="R180"/>-  <pin name="PI0" x="17.78" y="63.5" length="middle" direction="out" rot="R180"/>-  <pin name="PH15" x="17.78" y="60.96" length="middle" direction="out" rot="R180"/>-  <pin name="PH14" x="17.78" y="58.42" length="middle" direction="out" rot="R180"/>-  <pin name="PH13" x="17.78" y="55.88" length="middle" direction="out" rot="R180"/>-  <pin name="VDD@10" x="17.78" y="53.34" length="middle" direction="pwr" rot="R180"/>-  <pin name="VSS@9" x="17.78" y="50.8" length="middle" direction="pwr" rot="R180"/>-  <pin name="VCAP2" x="17.78" y="48.26" length="middle" direction="pas" rot="R180"/>-  <pin name="PA13_JTMS-SWDIO" x="17.78" y="45.72" length="middle" direction="out" rot="R180"/>-  <pin name="PA12" x="17.78" y="43.18" length="middle" direction="out" rot="R180"/>-  <pin name="PA11" x="17.78" y="40.64" length="middle" direction="out" rot="R180"/>-  <pin name="PA10" x="17.78" y="38.1" length="middle" direction="out" rot="R180"/>-  <pin name="PA9" x="17.78" y="35.56" length="middle" direction="out" rot="R180"/>-  <pin name="PA8" x="17.78" y="33.02" length="middle" direction="out" rot="R180"/>-  <pin name="PC9" x="17.78" y="30.48" length="middle" direction="out" rot="R180"/>-  <pin name="PC8" x="17.78" y="27.94" length="middle" direction="out" rot="R180"/>-  <pin name="PC7" x="17.78" y="25.4" length="middle" direction="out" rot="R180"/>-  <pin name="PC6" x="17.78" y="22.86" length="middle" direction="out" rot="R180"/>-  <pin name="VDDUSB" x="17.78" y="20.32" length="middle" direction="pwr" rot="R180"/>-  <pin name="VSS@10" x="17.78" y="17.78" length="middle" direction="pwr" rot="R180"/>-  <pin name="PG8" x="17.78" y="15.24" length="middle" direction="out" rot="R180"/>-  <pin name="PG7" x="17.78" y="12.7" length="middle" direction="out" rot="R180"/>-  <pin name="PG6" x="17.78" y="10.16" length="middle" direction="out" rot="R180"/>-  <pin name="PG5" x="17.78" y="7.62" length="middle" direction="out" rot="R180"/>-  <pin name="PG4" x="17.78" y="5.08" length="middle" direction="out" rot="R180"/>-  <pin name="PG3" x="17.78" y="2.54" length="middle" direction="out" rot="R180"/>-  <pin name="PG2" x="17.78" y="0" length="middle" direction="out" rot="R180"/>-  <pin name="VSSDSI" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>-  <pin name="DSIHOST_D1N" x="17.78" y="-5.08" length="middle" direction="out" rot="R180"/>-  <pin name="DSIHOST_D1P" x="17.78" y="-7.62" length="middle" direction="out" rot="R180"/>-  <pin name="VDD12DSI" x="17.78" y="-10.16" length="middle" direction="pwr" rot="R180"/>-  <pin name="DSIHOST_CKN" x="17.78" y="-12.7" length="middle" direction="out" rot="R180"/>-  <pin name="DSIHOST_CKP" x="17.78" y="-15.24" length="middle" direction="out" rot="R180"/>-  <pin name="VSSDSI@2" x="17.78" y="-17.78" length="middle" direction="pwr" rot="R180"/>-  <pin name="DSIHOST_D0N" x="17.78" y="-20.32" length="middle" direction="out" rot="R180"/>-  <pin name="DSIHOST_D0P" x="17.78" y="-22.86" length="middle" direction="out" rot="R180"/>-  <pin name="VDD12DSI@2" x="17.78" y="-25.4" length="middle" direction="pwr" rot="R180"/>-  <pin name="VCAPDSI" x="17.78" y="-27.94" length="middle" direction="pas" rot="R180"/>-  <pin name="VSS@11" x="17.78" y="-30.48" length="middle" direction="pwr" rot="R180"/>-  <pin name="VDDDSI" x="17.78" y="-33.02" length="middle" direction="pwr" rot="R180"/>-  <pin name="PD15" x="17.78" y="-35.56" length="middle" direction="out" rot="R180"/>-  <pin name="PD14" x="17.78" y="-38.1" length="middle" direction="out" rot="R180"/>-  <pin name="VDD@11" x="17.78" y="-40.64" length="middle" direction="pwr" rot="R180"/>-  <pin name="VSS@12" x="17.78" y="-43.18" length="middle" direction="pwr" rot="R180"/>-  <pin name="PD13" x="17.78" y="-45.72" length="middle" direction="out" rot="R180"/>-  <pin name="PD12" x="17.78" y="-48.26" length="middle" direction="out" rot="R180"/>-  <pin name="PD11" x="17.78" y="-50.8" length="middle" direction="out" rot="R180"/>-  <pin name="PD10" x="17.78" y="-53.34" length="middle" direction="out" rot="R180"/>-  <pin name="PD9" x="17.78" y="-55.88" length="middle" direction="out" rot="R180"/>-  <pin name="PD8" x="17.78" y="-58.42" length="middle" direction="out" rot="R180"/>-  <pin name="PB15" x="17.78" y="-60.96" length="middle" direction="out" rot="R180"/>-  <pin name="PB14" x="17.78" y="-63.5" length="middle" direction="out" rot="R180"/>-  <pin name="PB13" x="17.78" y="-66.04" length="middle" direction="out" rot="R180"/>-  <pin name="PB12" x="17.78" y="-68.58" length="middle" direction="out" rot="R180"/>-  <pin name="PI7" x="17.78" y="-71.12" length="middle" direction="out" rot="R180"/>-  <pin name="PI6" x="17.78" y="-73.66" length="middle" direction="out" rot="R180"/>-  <pin name="PI5" x="17.78" y="-76.2" length="middle" direction="out" rot="R180"/>-  <pin name="PI4" x="17.78" y="-78.74" length="middle" direction="out" rot="R180"/>-  <pin name="PI3@2" x="17.78" y="-81.28" length="middle" direction="out" rot="R180"/>-  <pin name="PI2@2" x="17.78" y="-83.82" length="middle" direction="out" rot="R180"/>-  <pin name="PI1@2" x="17.78" y="-86.36" length="middle" direction="out" rot="R180"/>-  <pin name="PI0@2" x="17.78" y="-88.9" length="middle" direction="out" rot="R180"/>-  <pin name="PH15@2" x="17.78" y="-91.44" length="middle" direction="out" rot="R180"/>-  <pin name="PH14@2" x="17.78" y="-93.98" length="middle" direction="out" rot="R180"/>-  <pin name="PH13@2" x="17.78" y="-96.52" length="middle" direction="out" rot="R180"/>-  <pin name="PH12" x="17.78" y="-99.06" length="middle" direction="out" rot="R180"/>-  <pin name="PH11" x="17.78" y="-101.6" length="middle" direction="out" rot="R180"/>-  <pin name="PH10" x="17.78" y="-104.14" length="middle" direction="out" rot="R180"/>-  <pin name="PH9" x="17.78" y="-106.68" length="middle" direction="out" rot="R180"/>-  <pin name="PH8" x="17.78" y="-109.22" length="middle" direction="out" rot="R180"/>-  <pin name="PH7" x="17.78" y="-111.76" length="middle" direction="out" rot="R180"/>+  <pin name="PE2" x="-17.78" y="109.22" length="middle" direction="io"/>+  <pin name="PE3" x="-17.78" y="106.68" length="middle" direction="io"/>+  <pin name="PE4" x="-17.78" y="104.14" length="middle" direction="io"/>+  <pin name="PE5" x="-17.78" y="101.6" length="middle" direction="io"/>+  <pin name="PE6" x="-17.78" y="99.06" length="middle" direction="io"/>+  <pin name="VBAT" x="-17.78" y="96.52" length="middle" direction="pwr"/>+  <pin name="PI8" x="-17.78" y="93.98" length="middle" direction="io"/>+  <pin name="PC13" x="-17.78" y="91.44" length="middle" direction="io"/>+  <pin name="PC14/OSC32_IN" x="-17.78" y="88.9" length="middle" direction="io"/>+  <pin name="PC15/OSC32_OUT" x="-17.78" y="86.36" length="middle" direction="io"/>+  <pin name="PI9" x="-17.78" y="83.82" length="middle" direction="io"/>+  <pin name="PI10" x="-17.78" y="81.28" length="middle" direction="io"/>+  <pin name="PI11" x="-17.78" y="78.74" length="middle" direction="io"/>+  <pin name="VSS" x="-17.78" y="76.2" length="middle" direction="pwr"/>+  <pin name="VDD" x="-17.78" y="73.66" length="middle" direction="pwr"/>+  <pin name="PF0" x="-17.78" y="71.12" length="middle" direction="io"/>+  <pin name="PF1" x="-17.78" y="68.58" length="middle" direction="io"/>+  <pin name="PF2" x="-17.78" y="66.04" length="middle" direction="io"/>+  <pin name="PF3" x="-17.78" y="63.5" length="middle" direction="io"/>+  <pin name="PF4" x="-17.78" y="60.96" length="middle" direction="io"/>+  <pin name="PF5" x="-17.78" y="58.42" length="middle" direction="io"/>+  <pin name="VSS@2" x="-17.78" y="55.88" length="middle" direction="pwr"/>+  <pin name="VDD@2" x="-17.78" y="53.34" length="middle" direction="pwr"/>+  <pin name="PF6" x="-17.78" y="50.8" length="middle" direction="io"/>+  <pin name="PF7" x="-17.78" y="48.26" length="middle" direction="io"/>+  <pin name="PF8" x="-17.78" y="45.72" length="middle" direction="io"/>+  <pin name="PF9" x="-17.78" y="43.18" length="middle" direction="io"/>+  <pin name="PF10" x="-17.78" y="40.64" length="middle" direction="io"/>+  <pin name="PH0/OSC_IN" x="-17.78" y="38.1" length="middle" direction="io"/>+  <pin name="PH1/OSC_OUT" x="-17.78" y="35.56" length="middle" direction="io"/>+  <pin name="NRST" x="-17.78" y="33.02" length="middle" direction="in"/>+  <pin name="PC0" x="-17.78" y="30.48" length="middle" direction="io"/>+  <pin name="PC1" x="-17.78" y="27.94" length="middle" direction="io"/>+  <pin name="PC2" x="-17.78" y="25.4" length="middle" direction="io"/>+  <pin name="PC3" x="-17.78" y="22.86" length="middle" direction="io"/>+  <pin name="VDD@3" x="-17.78" y="20.32" length="middle" direction="pwr"/>+  <pin name="VSSA" x="-17.78" y="17.78" length="middle" direction="pwr"/>+  <pin name="VREF+" x="-17.78" y="15.24" length="middle" direction="pwr"/>+  <pin name="VDDA" x="-17.78" y="12.7" length="middle" direction="pwr"/>+  <pin name="PA0/WKUP" x="-17.78" y="10.16" length="middle" direction="io"/>+  <pin name="PA1" x="-17.78" y="7.62" length="middle" direction="io"/>+  <pin name="PA2" x="-17.78" y="5.08" length="middle" direction="io"/>+  <pin name="PH2" x="-17.78" y="2.54" length="middle" direction="io"/>+  <pin name="PH3" x="-17.78" y="0" length="middle" direction="io"/>+  <pin name="PH4" x="-17.78" y="-2.54" length="middle" direction="io"/>+  <pin name="PH5" x="-17.78" y="-5.08" length="middle" direction="io"/>+  <pin name="PA3" x="-17.78" y="-7.62" length="middle" direction="io"/>+  <pin name="BYPASS_REG" x="-17.78" y="-10.16" length="middle" direction="in"/>+  <pin name="VDD@4" x="-17.78" y="-12.7" length="middle" direction="pwr"/>+  <pin name="PA4" x="-17.78" y="-15.24" length="middle" direction="io"/>+  <pin name="PA5" x="-17.78" y="-17.78" length="middle" direction="io"/>+  <pin name="PA6" x="-17.78" y="-20.32" length="middle" direction="io"/>+  <pin name="PA7" x="-17.78" y="-22.86" length="middle" direction="io"/>+  <pin name="PC4" x="-17.78" y="-25.4" length="middle" direction="io"/>+  <pin name="PC5" x="-17.78" y="-27.94" length="middle" direction="io"/>+  <pin name="PB0" x="-17.78" y="-30.48" length="middle" direction="io"/>+  <pin name="PB1" x="-17.78" y="-33.02" length="middle" direction="io"/>+  <pin name="PB2/BOOT1" x="-17.78" y="-35.56" length="middle" direction="io"/>+  <pin name="PF11" x="-17.78" y="-38.1" length="middle" direction="io"/>+  <pin name="PF12" x="-17.78" y="-40.64" length="middle" direction="io"/>+  <pin name="VSS@3" x="-17.78" y="-43.18" length="middle" direction="pwr"/>+  <pin name="VDD@5" x="-17.78" y="-45.72" length="middle" direction="pwr"/>+  <pin name="PF13" x="-17.78" y="-48.26" length="middle" direction="io"/>+  <pin name="PF14" x="-17.78" y="-50.8" length="middle" direction="io"/>+  <pin name="PF15" x="-17.78" y="-53.34" length="middle" direction="io"/>+  <pin name="PG0" x="-17.78" y="-55.88" length="middle" direction="io"/>+  <pin name="PG1" x="-17.78" y="-58.42" length="middle" direction="io"/>+  <pin name="PE7" x="-17.78" y="-60.96" length="middle" direction="io"/>+  <pin name="PE8" x="-17.78" y="-63.5" length="middle" direction="io"/>+  <pin name="PE9" x="-17.78" y="-66.04" length="middle" direction="io"/>+  <pin name="VSS@4" x="-17.78" y="-68.58" length="middle" direction="pwr"/>+  <pin name="VDD@6" x="-17.78" y="-71.12" length="middle" direction="pwr"/>+  <pin name="PE10" x="-17.78" y="-73.66" length="middle" direction="io"/>+  <pin name="PE11" x="-17.78" y="-76.2" length="middle" direction="io"/>+  <pin name="PE12" x="-17.78" y="-78.74" length="middle" direction="io"/>+  <pin name="PE13" x="-17.78" y="-81.28" length="middle" direction="io"/>+  <pin name="PE14" x="-17.78" y="-83.82" length="middle" direction="io"/>+  <pin name="PE15" x="-17.78" y="-86.36" length="middle" direction="io"/>+  <pin name="PB10" x="-17.78" y="-88.9" length="middle" direction="io"/>+  <pin name="PB11" x="-17.78" y="-91.44" length="middle" direction="io"/>+  <pin name="VCAP1" x="-17.78" y="-93.98" length="middle" direction="pwr"/>+  <pin name="VDD@7" x="-17.78" y="-96.52" length="middle" direction="pwr"/>+  <pin name="PH6" x="-17.78" y="-99.06" length="middle" direction="io"/>+  <pin name="PH7" x="-17.78" y="-101.6" length="middle" direction="io"/>+  <pin name="PB12" x="-17.78" y="-104.14" length="middle" direction="io"/>+  <pin name="PB13" x="-17.78" y="-106.68" length="middle" direction="io"/>+  <pin name="PB14" x="-17.78" y="-109.22" length="middle" direction="io"/>+  <pin name="PB15" x="-17.78" y="-111.76" length="middle" direction="io"/>+  <pin name="PI7" x="17.78" y="109.22" length="middle" direction="io" rot="R180"/>+  <pin name="PI6" x="17.78" y="106.68" length="middle" direction="io" rot="R180"/>+  <pin name="PI5" x="17.78" y="104.14" length="middle" direction="io" rot="R180"/>+  <pin name="PI4" x="17.78" y="101.6" length="middle" direction="io" rot="R180"/>+  <pin name="VDD@8" x="17.78" y="99.06" length="middle" direction="pwr" rot="R180"/>+  <pin name="PDR_ON" x="17.78" y="96.52" length="middle" direction="in" rot="R180"/>+  <pin name="PE1" x="17.78" y="93.98" length="middle" direction="io" rot="R180"/>+  <pin name="PE0" x="17.78" y="91.44" length="middle" direction="io" rot="R180"/>+  <pin name="PB9" x="17.78" y="88.9" length="middle" direction="io" rot="R180"/>+  <pin name="PB8" x="17.78" y="86.36" length="middle" direction="io" rot="R180"/>+  <pin name="BOOT0" x="17.78" y="83.82" length="middle" direction="in" rot="R180"/>+  <pin name="PB7" x="17.78" y="81.28" length="middle" direction="io" rot="R180"/>+  <pin name="PB6" x="17.78" y="78.74" length="middle" direction="io" rot="R180"/>+  <pin name="PB5" x="17.78" y="76.2" length="middle" direction="io" rot="R180"/>+  <pin name="PB4" x="17.78" y="73.66" length="middle" direction="io" rot="R180"/>+  <pin name="PB3" x="17.78" y="71.12" length="middle" direction="io" rot="R180"/>+  <pin name="PG15" x="17.78" y="68.58" length="middle" direction="io" rot="R180"/>+  <pin name="VDD@9" x="17.78" y="66.04" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@5" x="17.78" y="63.5" length="middle" direction="pwr" rot="R180"/>+  <pin name="PG14" x="17.78" y="60.96" length="middle" direction="io" rot="R180"/>+  <pin name="PG13" x="17.78" y="58.42" length="middle" direction="io" rot="R180"/>+  <pin name="PG12" x="17.78" y="55.88" length="middle" direction="io" rot="R180"/>+  <pin name="PG11" x="17.78" y="53.34" length="middle" direction="io" rot="R180"/>+  <pin name="PG10" x="17.78" y="50.8" length="middle" direction="io" rot="R180"/>+  <pin name="PG9" x="17.78" y="48.26" length="middle" direction="io" rot="R180"/>+  <pin name="PD7" x="17.78" y="45.72" length="middle" direction="io" rot="R180"/>+  <pin name="PD6" x="17.78" y="43.18" length="middle" direction="io" rot="R180"/>+  <pin name="VDD@10" x="17.78" y="40.64" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@6" x="17.78" y="38.1" length="middle" direction="pwr" rot="R180"/>+  <pin name="PD5" x="17.78" y="35.56" length="middle" direction="io" rot="R180"/>+  <pin name="PD4" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+  <pin name="PD3" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/>+  <pin name="PD2" x="17.78" y="27.94" length="middle" direction="io" rot="R180"/>+  <pin name="PD1" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+  <pin name="PD0" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+  <pin name="PC12" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+  <pin name="PC11" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+  <pin name="PC10" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>+  <pin name="PA15" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+  <pin name="PA14" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+  <pin name="VDD@11" x="17.78" y="7.62" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@7" x="17.78" y="5.08" length="middle" direction="pwr" rot="R180"/>+  <pin name="PI3" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+  <pin name="PI1" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+  <pin name="PI0" x="17.78" y="-2.54" length="middle" direction="io" rot="R180"/>+  <pin name="VDD@12" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@8" x="17.78" y="-7.62" length="middle" direction="pwr" rot="R180"/>+  <pin name="VCAP2" x="17.78" y="-10.16" length="middle" direction="pwr" rot="R180"/>+  <pin name="PA13" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+  <pin name="PA12" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+  <pin name="PA11" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+  <pin name="PA10" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+  <pin name="PA9" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+  <pin name="PA8" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+  <pin name="PC9" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+  <pin name="PC8" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+  <pin name="PC7" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+  <pin name="PC6" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>+  <pin name="VDDUSB" x="17.78" y="-38.1" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@9" x="17.78" y="-40.64" length="middle" direction="pwr" rot="R180"/>+  <pin name="PG8" x="17.78" y="-43.18" length="middle" direction="io" rot="R180"/>+  <pin name="PG7" x="17.78" y="-45.72" length="middle" direction="io" rot="R180"/>+  <pin name="PG6" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>+  <pin name="PG5" x="17.78" y="-50.8" length="middle" direction="io" rot="R180"/>+  <pin name="PG4" x="17.78" y="-53.34" length="middle" direction="io" rot="R180"/>+  <pin name="PG3" x="17.78" y="-55.88" length="middle" direction="io" rot="R180"/>+  <pin name="PG2" x="17.78" y="-58.42" length="middle" direction="io" rot="R180"/>+  <pin name="VSSDSI" x="17.78" y="-60.96" length="middle" direction="pwr" rot="R180"/>+  <pin name="DSIHOST_D1N" x="17.78" y="-63.5" length="middle" direction="io" rot="R180"/>+  <pin name="DSIHOST_D1P" x="17.78" y="-66.04" length="middle" direction="io" rot="R180"/>+  <pin name="VDD12DSI" x="17.78" y="-68.58" length="middle" direction="pwr" rot="R180"/>+  <pin name="DSIHOST_CKN" x="17.78" y="-71.12" length="middle" direction="io" rot="R180"/>+  <pin name="DSIHOST_CKP" x="17.78" y="-73.66" length="middle" direction="io" rot="R180"/>+  <pin name="VSSDSI@2" x="17.78" y="-76.2" length="middle" direction="pwr" rot="R180"/>+  <pin name="DSIHOST_D0N" x="17.78" y="-78.74" length="middle" direction="io" rot="R180"/>+  <pin name="DSIHOST_D0P" x="17.78" y="-81.28" length="middle" direction="io" rot="R180"/>+  <pin name="VCAPDSI" x="17.78" y="-83.82" length="middle" direction="pwr" rot="R180"/>+  <pin name="VDDDSI" x="17.78" y="-86.36" length="middle" direction="pwr" rot="R180"/>+  <pin name="PD15" x="17.78" y="-88.9" length="middle" direction="io" rot="R180"/>+  <pin name="PD14" x="17.78" y="-91.44" length="middle" direction="io" rot="R180"/>+  <pin name="VDD@13" x="17.78" y="-93.98" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@10" x="17.78" y="-96.52" length="middle" direction="pwr" rot="R180"/>+  <pin name="PD13" x="17.78" y="-99.06" length="middle" direction="io" rot="R180"/>+  <pin name="PD12" x="17.78" y="-101.6" length="middle" direction="io" rot="R180"/>+  <pin name="PD11" x="17.78" y="-104.14" length="middle" direction="io" rot="R180"/>+  <pin name="PD10" x="17.78" y="-106.68" length="middle" direction="io" rot="R180"/>+  <pin name="PD9" x="17.78" y="-109.22" length="middle" direction="io" rot="R180"/>+  <pin name="PD8" x="17.78" y="-111.76" length="middle" direction="io" rot="R180"/> </symbol> </symbols> <devicesets> <deviceset name="STM32F469IIT6" prefix="U">-  <description></description>+  <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-176(24x24). Pinout checked against ST&apos;s open pin data</description>   <gates>     <gate name="G$1" symbol="STM32F469IIT6" x="0" y="0"/>   </gates>@@ -454,179 +455,189 @@         <connect gate="G$1" pin="PE4" pad="3"/>         <connect gate="G$1" pin="PE5" pad="4"/>         <connect gate="G$1" pin="PE6" pad="5"/>-        <connect gate="G$1" pin="VSS" pad="6"/>-        <connect gate="G$1" pin="VDD" pad="7"/>-        <connect gate="G$1" pin="VBAT" pad="8"/>-        <connect gate="G$1" pin="PI8" pad="9"/>-        <connect gate="G$1" pin="PC13" pad="10"/>-        <connect gate="G$1" pin="PC14-OSC32_IN" pad="11"/>-        <connect gate="G$1" pin="PC15-OSC32_OUT" pad="12"/>-        <connect gate="G$1" pin="VDD@2" pad="13"/>-        <connect gate="G$1" pin="PI9" pad="14"/>-        <connect gate="G$1" pin="PI10" pad="15"/>-        <connect gate="G$1" pin="PI11" pad="16"/>-        <connect gate="G$1" pin="VSS@2" pad="17"/>-        <connect gate="G$1" pin="VDD@3" pad="18"/>+        <connect gate="G$1" pin="VBAT" pad="6"/>+        <connect gate="G$1" pin="PI8" pad="7"/>+        <connect gate="G$1" pin="PC13" pad="8"/>+        <connect gate="G$1" pin="PC14/OSC32_IN" pad="9"/>+        <connect gate="G$1" pin="PC15/OSC32_OUT" pad="10"/>+        <connect gate="G$1" pin="PI9" pad="11"/>+        <connect gate="G$1" pin="PI10" pad="12"/>+        <connect gate="G$1" pin="PI11" pad="13"/>+        <connect gate="G$1" pin="VSS" pad="14"/>+        <connect gate="G$1" pin="VDD" pad="15"/>+        <connect gate="G$1" pin="PF0" pad="16"/>+        <connect gate="G$1" pin="PF1" pad="17"/>+        <connect gate="G$1" pin="PF2" pad="18"/>         <connect gate="G$1" pin="PF3" pad="19"/>         <connect gate="G$1" pin="PF4" pad="20"/>         <connect gate="G$1" pin="PF5" pad="21"/>-        <connect gate="G$1" pin="VSS@3" pad="22"/>-        <connect gate="G$1" pin="VDD@4" pad="23"/>+        <connect gate="G$1" pin="VSS@2" pad="22"/>+        <connect gate="G$1" pin="VDD@2" pad="23"/>         <connect gate="G$1" pin="PF6" pad="24"/>         <connect gate="G$1" pin="PF7" pad="25"/>         <connect gate="G$1" pin="PF8" pad="26"/>         <connect gate="G$1" pin="PF9" pad="27"/>         <connect gate="G$1" pin="PF10" pad="28"/>-        <connect gate="G$1" pin="PH0-OSC_IN" pad="29"/>-        <connect gate="G$1" pin="PH1-OSC_OUT" pad="30"/>+        <connect gate="G$1" pin="PH0/OSC_IN" pad="29"/>+        <connect gate="G$1" pin="PH1/OSC_OUT" pad="30"/>         <connect gate="G$1" pin="NRST" pad="31"/>         <connect gate="G$1" pin="PC0" pad="32"/>         <connect gate="G$1" pin="PC1" pad="33"/>         <connect gate="G$1" pin="PC2" pad="34"/>         <connect gate="G$1" pin="PC3" pad="35"/>-        <connect gate="G$1" pin="VDD@5" pad="36"/>-        <connect gate="G$1" pin="VSS@4" pad="37"/>-        <connect gate="G$1" pin="VSSA" pad="38"/>-        <connect gate="G$1" pin="VREF-" pad="39"/>-        <connect gate="G$1" pin="VREF+" pad="40"/>-        <connect gate="G$1" pin="VDDA" pad="41"/>-        <connect gate="G$1" pin="PA0-WKUP" pad="42"/>-        <connect gate="G$1" pin="PA1" pad="43"/>-        <connect gate="G$1" pin="PA2" pad="44"/>-        <connect gate="G$1" pin="PH2" pad="45"/>-        <connect gate="G$1" pin="PH3" pad="46"/>-        <connect gate="G$1" pin="PH4" pad="47"/>-        <connect gate="G$1" pin="PH5" pad="48"/>-        <connect gate="G$1" pin="PA3" pad="49"/>-        <connect gate="G$1" pin="VSS@5" pad="50"/>-        <connect gate="G$1" pin="VDD@6" pad="51"/>-        <connect gate="G$1" pin="PA4" pad="52"/>-        <connect gate="G$1" pin="PA5" pad="53"/>-        <connect gate="G$1" pin="PA6" pad="54"/>-        <connect gate="G$1" pin="PA7" pad="55"/>+        <connect gate="G$1" pin="VDD@3" pad="36"/>+        <connect gate="G$1" pin="VSSA" pad="37"/>+        <connect gate="G$1" pin="VREF+" pad="38"/>+        <connect gate="G$1" pin="VDDA" pad="39"/>+        <connect gate="G$1" pin="PA0/WKUP" pad="40"/>+        <connect gate="G$1" pin="PA1" pad="41"/>+        <connect gate="G$1" pin="PA2" pad="42"/>+        <connect gate="G$1" pin="PH2" pad="43"/>+        <connect gate="G$1" pin="PH3" pad="44"/>+        <connect gate="G$1" pin="PH4" pad="45"/>+        <connect gate="G$1" pin="PH5" pad="46"/>+        <connect gate="G$1" pin="PA3" pad="47"/>+        <connect gate="G$1" pin="BYPASS_REG" pad="48"/>+        <connect gate="G$1" pin="VDD@4" pad="49"/>+        <connect gate="G$1" pin="PA4" pad="50"/>+        <connect gate="G$1" pin="PA5" pad="51"/>+        <connect gate="G$1" pin="PA6" pad="52"/>+        <connect gate="G$1" pin="PA7" pad="53"/>+        <connect gate="G$1" pin="PC4" pad="54"/>+        <connect gate="G$1" pin="PC5" pad="55"/>         <connect gate="G$1" pin="PB0" pad="56"/>         <connect gate="G$1" pin="PB1" pad="57"/>-        <connect gate="G$1" pin="PB2-BOOT1" pad="58"/>-        <connect gate="G$1" pin="PI15" pad="59"/>-        <connect gate="G$1" pin="PJ0" pad="60"/>-        <connect gate="G$1" pin="PJ1" pad="61"/>-        <connect gate="G$1" pin="PJ2" pad="62"/>-        <connect gate="G$1" pin="PJ3" pad="63"/>-        <connect gate="G$1" pin="PJ4" pad="64"/>-        <connect gate="G$1" pin="PF11" pad="65"/>-        <connect gate="G$1" pin="PF12" pad="66"/>-        <connect gate="G$1" pin="VSS@6" pad="67"/>-        <connect gate="G$1" pin="VDD@7" pad="68"/>-        <connect gate="G$1" pin="PF13" pad="69"/>-        <connect gate="G$1" pin="PF14" pad="70"/>-        <connect gate="G$1" pin="PF15" pad="71"/>-        <connect gate="G$1" pin="PG0" pad="72"/>-        <connect gate="G$1" pin="PG1" pad="73"/>-        <connect gate="G$1" pin="PE7" pad="74"/>-        <connect gate="G$1" pin="PE8" pad="75"/>-        <connect gate="G$1" pin="PE9" pad="76"/>-        <connect gate="G$1" pin="PE10" pad="77"/>-        <connect gate="G$1" pin="PE11" pad="78"/>-        <connect gate="G$1" pin="PE12" pad="79"/>-        <connect gate="G$1" pin="PE13" pad="80"/>-        <connect gate="G$1" pin="PE14" pad="81"/>-        <connect gate="G$1" pin="PE15" pad="82"/>-        <connect gate="G$1" pin="PB10" pad="83"/>-        <connect gate="G$1" pin="PB11" pad="84"/>-        <connect gate="G$1" pin="VCAP1" pad="85"/>-        <connect gate="G$1" pin="VSS@7" pad="86"/>-        <connect gate="G$1" pin="VDD@8" pad="87"/>-        <connect gate="G$1" pin="PH6" pad="88"/>-        <connect gate="G$1" pin="PD1" pad="176"/>-        <connect gate="G$1" pin="PD0" pad="175"/>-        <connect gate="G$1" pin="PC12" pad="174"/>-        <connect gate="G$1" pin="PC11" pad="173"/>-        <connect gate="G$1" pin="PC10" pad="172"/>-        <connect gate="G$1" pin="PA15_JTDI" pad="171"/>-        <connect gate="G$1" pin="PA14_JTCK-SWCLK" pad="170"/>-        <connect gate="G$1" pin="VDD@9" pad="169"/>-        <connect gate="G$1" pin="VSS@8" pad="168"/>-        <connect gate="G$1" pin="PG14" pad="167"/>-        <connect gate="G$1" pin="PG13" pad="166"/>-        <connect gate="G$1" pin="PG12" pad="165"/>-        <connect gate="G$1" pin="PG11" pad="164"/>-        <connect gate="G$1" pin="PG10" pad="163"/>-        <connect gate="G$1" pin="PG9" pad="162"/>-        <connect gate="G$1" pin="PI3" pad="161"/>-        <connect gate="G$1" pin="PI2" pad="160"/>-        <connect gate="G$1" pin="PI1" pad="159"/>-        <connect gate="G$1" pin="PI0" pad="158"/>-        <connect gate="G$1" pin="PH15" pad="157"/>-        <connect gate="G$1" pin="PH14" pad="156"/>-        <connect gate="G$1" pin="PH13" pad="155"/>-        <connect gate="G$1" pin="VDD@10" pad="154"/>-        <connect gate="G$1" pin="VSS@9" pad="153"/>-        <connect gate="G$1" pin="VCAP2" pad="152"/>-        <connect gate="G$1" pin="PA13_JTMS-SWDIO" pad="151"/>-        <connect gate="G$1" pin="PA12" pad="150"/>-        <connect gate="G$1" pin="PA11" pad="149"/>-        <connect gate="G$1" pin="PA10" pad="148"/>-        <connect gate="G$1" pin="PA9" pad="147"/>-        <connect gate="G$1" pin="PA8" pad="146"/>-        <connect gate="G$1" pin="PC9" pad="145"/>-        <connect gate="G$1" pin="PC8" pad="144"/>-        <connect gate="G$1" pin="PC7" pad="143"/>-        <connect gate="G$1" pin="PC6" pad="142"/>-        <connect gate="G$1" pin="VDDUSB" pad="141"/>-        <connect gate="G$1" pin="VSS@10" pad="140"/>-        <connect gate="G$1" pin="PG8" pad="139"/>-        <connect gate="G$1" pin="PG7" pad="138"/>-        <connect gate="G$1" pin="PG6" pad="137"/>-        <connect gate="G$1" pin="PG5" pad="136"/>-        <connect gate="G$1" pin="PG4" pad="135"/>-        <connect gate="G$1" pin="PG3" pad="134"/>-        <connect gate="G$1" pin="PG2" pad="133"/>-        <connect gate="G$1" pin="VSSDSI" pad="132"/>-        <connect gate="G$1" pin="DSIHOST_D1N" pad="131"/>-        <connect gate="G$1" pin="DSIHOST_D1P" pad="130"/>-        <connect gate="G$1" pin="VDD12DSI" pad="129"/>-        <connect gate="G$1" pin="DSIHOST_CKN" pad="128"/>-        <connect gate="G$1" pin="DSIHOST_CKP" pad="127"/>-        <connect gate="G$1" pin="VSSDSI@2" pad="126"/>-        <connect gate="G$1" pin="DSIHOST_D0N" pad="125"/>-        <connect gate="G$1" pin="DSIHOST_D0P" pad="124"/>-        <connect gate="G$1" pin="VDD12DSI@2" pad="123"/>-        <connect gate="G$1" pin="VCAPDSI" pad="122"/>-        <connect gate="G$1" pin="VSS@11" pad="121"/>-        <connect gate="G$1" pin="VDDDSI" pad="120"/>-        <connect gate="G$1" pin="PD15" pad="119"/>-        <connect gate="G$1" pin="PD14" pad="118"/>-        <connect gate="G$1" pin="VDD@11" pad="117"/>-        <connect gate="G$1" pin="VSS@12" pad="116"/>-        <connect gate="G$1" pin="PD13" pad="115"/>-        <connect gate="G$1" pin="PD12" pad="114"/>-        <connect gate="G$1" pin="PD11" pad="113"/>-        <connect gate="G$1" pin="PD10" pad="112"/>-        <connect gate="G$1" pin="PD9" pad="111"/>-        <connect gate="G$1" pin="PD8" pad="110"/>-        <connect gate="G$1" pin="PB15" pad="109"/>-        <connect gate="G$1" pin="PB14" pad="108"/>-        <connect gate="G$1" pin="PB13" pad="107"/>-        <connect gate="G$1" pin="PB12" pad="106"/>-        <connect gate="G$1" pin="PI7" pad="105"/>-        <connect gate="G$1" pin="PI6" pad="104"/>-        <connect gate="G$1" pin="PI5" pad="103"/>-        <connect gate="G$1" pin="PI4" pad="102"/>-        <connect gate="G$1" pin="PI3@2" pad="101"/>-        <connect gate="G$1" pin="PI2@2" pad="100"/>-        <connect gate="G$1" pin="PI1@2" pad="99"/>-        <connect gate="G$1" pin="PI0@2" pad="98"/>-        <connect gate="G$1" pin="PH15@2" pad="97"/>-        <connect gate="G$1" pin="PH14@2" pad="96"/>-        <connect gate="G$1" pin="PH13@2" pad="95"/>-        <connect gate="G$1" pin="PH12" pad="94"/>-        <connect gate="G$1" pin="PH11" pad="93"/>-        <connect gate="G$1" pin="PH10" pad="92"/>-        <connect gate="G$1" pin="PH9" pad="91"/>-        <connect gate="G$1" pin="PH8" pad="90"/>-        <connect gate="G$1" pin="PH7" pad="89"/>+        <connect gate="G$1" pin="PB2/BOOT1" pad="58"/>+        <connect gate="G$1" pin="PF11" pad="59"/>+        <connect gate="G$1" pin="PF12" pad="60"/>+        <connect gate="G$1" pin="VSS@3" pad="61"/>+        <connect gate="G$1" pin="VDD@5" pad="62"/>+        <connect gate="G$1" pin="PF13" pad="63"/>+        <connect gate="G$1" pin="PF14" pad="64"/>+        <connect gate="G$1" pin="PF15" pad="65"/>+        <connect gate="G$1" pin="PG0" pad="66"/>+        <connect gate="G$1" pin="PG1" pad="67"/>+        <connect gate="G$1" pin="PE7" pad="68"/>+        <connect gate="G$1" pin="PE8" pad="69"/>+        <connect gate="G$1" pin="PE9" pad="70"/>+        <connect gate="G$1" pin="VSS@4" pad="71"/>+        <connect gate="G$1" pin="VDD@6" pad="72"/>+        <connect gate="G$1" pin="PE10" pad="73"/>+        <connect gate="G$1" pin="PE11" pad="74"/>+        <connect gate="G$1" pin="PE12" pad="75"/>+        <connect gate="G$1" pin="PE13" pad="76"/>+        <connect gate="G$1" pin="PE14" pad="77"/>+        <connect gate="G$1" pin="PE15" pad="78"/>+        <connect gate="G$1" pin="PB10" pad="79"/>+        <connect gate="G$1" pin="PB11" pad="80"/>+        <connect gate="G$1" pin="VCAP1" pad="81"/>+        <connect gate="G$1" pin="VDD@7" pad="82"/>+        <connect gate="G$1" pin="PH6" pad="83"/>+        <connect gate="G$1" pin="PH7" pad="84"/>+        <connect gate="G$1" pin="PB12" pad="85"/>+        <connect gate="G$1" pin="PB13" pad="86"/>+        <connect gate="G$1" pin="PB14" pad="87"/>+        <connect gate="G$1" pin="PB15" pad="88"/>+        <connect gate="G$1" pin="PI7" pad="176"/>+        <connect gate="G$1" pin="PI6" pad="175"/>+        <connect gate="G$1" pin="PI5" pad="174"/>+        <connect gate="G$1" pin="PI4" pad="173"/>+        <connect gate="G$1" pin="VDD@8" pad="172"/>+        <connect gate="G$1" pin="PDR_ON" pad="171"/>+        <connect gate="G$1" pin="PE1" pad="170"/>+        <connect gate="G$1" pin="PE0" pad="169"/>+        <connect gate="G$1" pin="PB9" pad="168"/>+        <connect gate="G$1" pin="PB8" pad="167"/>+        <connect gate="G$1" pin="BOOT0" pad="166"/>+        <connect gate="G$1" pin="PB7" pad="165"/>+        <connect gate="G$1" pin="PB6" pad="164"/>+        <connect gate="G$1" pin="PB5" pad="163"/>+        <connect gate="G$1" pin="PB4" pad="162"/>+        <connect gate="G$1" pin="PB3" pad="161"/>+        <connect gate="G$1" pin="PG15" pad="160"/>+        <connect gate="G$1" pin="VDD@9" pad="159"/>+        <connect gate="G$1" pin="VSS@5" pad="158"/>+        <connect gate="G$1" pin="PG14" pad="157"/>+        <connect gate="G$1" pin="PG13" pad="156"/>+        <connect gate="G$1" pin="PG12" pad="155"/>+        <connect gate="G$1" pin="PG11" pad="154"/>+        <connect gate="G$1" pin="PG10" pad="153"/>+        <connect gate="G$1" pin="PG9" pad="152"/>+        <connect gate="G$1" pin="PD7" pad="151"/>+        <connect gate="G$1" pin="PD6" pad="150"/>+        <connect gate="G$1" pin="VDD@10" pad="149"/>+        <connect gate="G$1" pin="VSS@6" pad="148"/>+        <connect gate="G$1" pin="PD5" pad="147"/>+        <connect gate="G$1" pin="PD4" pad="146"/>+        <connect gate="G$1" pin="PD3" pad="145"/>+        <connect gate="G$1" pin="PD2" pad="144"/>+        <connect gate="G$1" pin="PD1" pad="143"/>+        <connect gate="G$1" pin="PD0" pad="142"/>+        <connect gate="G$1" pin="PC12" pad="141"/>+        <connect gate="G$1" pin="PC11" pad="140"/>+        <connect gate="G$1" pin="PC10" pad="139"/>+        <connect gate="G$1" pin="PA15" pad="138"/>+        <connect gate="G$1" pin="PA14" pad="137"/>+        <connect gate="G$1" pin="VDD@11" pad="136"/>+        <connect gate="G$1" pin="VSS@7" pad="135"/>+        <connect gate="G$1" pin="PI3" pad="134"/>+        <connect gate="G$1" pin="PI1" pad="133"/>+        <connect gate="G$1" pin="PI0" pad="132"/>+        <connect gate="G$1" pin="VDD@12" pad="131"/>+        <connect gate="G$1" pin="VSS@8" pad="130"/>+        <connect gate="G$1" pin="VCAP2" pad="129"/>+        <connect gate="G$1" pin="PA13" pad="128"/>+        <connect gate="G$1" pin="PA12" pad="127"/>+        <connect gate="G$1" pin="PA11" pad="126"/>+        <connect gate="G$1" pin="PA10" pad="125"/>+        <connect gate="G$1" pin="PA9" pad="124"/>+        <connect gate="G$1" pin="PA8" pad="123"/>+        <connect gate="G$1" pin="PC9" pad="122"/>+        <connect gate="G$1" pin="PC8" pad="121"/>+        <connect gate="G$1" pin="PC7" pad="120"/>+        <connect gate="G$1" pin="PC6" pad="119"/>+        <connect gate="G$1" pin="VDDUSB" pad="118"/>+        <connect gate="G$1" pin="VSS@9" pad="117"/>+        <connect gate="G$1" pin="PG8" pad="116"/>+        <connect gate="G$1" pin="PG7" pad="115"/>+        <connect gate="G$1" pin="PG6" pad="114"/>+        <connect gate="G$1" pin="PG5" pad="113"/>+        <connect gate="G$1" pin="PG4" pad="112"/>+        <connect gate="G$1" pin="PG3" pad="111"/>+        <connect gate="G$1" pin="PG2" pad="110"/>+        <connect gate="G$1" pin="VSSDSI" pad="109"/>+        <connect gate="G$1" pin="DSIHOST_D1N" pad="108"/>+        <connect gate="G$1" pin="DSIHOST_D1P" pad="107"/>+        <connect gate="G$1" pin="VDD12DSI" pad="106"/>+        <connect gate="G$1" pin="DSIHOST_CKN" pad="105"/>+        <connect gate="G$1" pin="DSIHOST_CKP" pad="104"/>+        <connect gate="G$1" pin="VSSDSI@2" pad="103"/>+        <connect gate="G$1" pin="DSIHOST_D0N" pad="102"/>+        <connect gate="G$1" pin="DSIHOST_D0P" pad="101"/>+        <connect gate="G$1" pin="VCAPDSI" pad="100"/>+        <connect gate="G$1" pin="VDDDSI" pad="99"/>+        <connect gate="G$1" pin="PD15" pad="98"/>+        <connect gate="G$1" pin="PD14" pad="97"/>+        <connect gate="G$1" pin="VDD@13" pad="96"/>+        <connect gate="G$1" pin="VSS@10" pad="95"/>+        <connect gate="G$1" pin="PD13" pad="94"/>+        <connect gate="G$1" pin="PD12" pad="93"/>+        <connect gate="G$1" pin="PD11" pad="92"/>+        <connect gate="G$1" pin="PD10" pad="91"/>+        <connect gate="G$1" pin="PD9" pad="90"/>+        <connect gate="G$1" pin="PD8" pad="89"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="STM32F469IIT6" constant="no"/>+          <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+          <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588858450910851072" constant="no"/>+          <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/stm32f469iit6" constant="no"/>+          <attribute name="MOUSER_PN" value="511-STM32F469IIT6" constant="no"/>+          <attribute name="DIGIKEY_PN" value="497-16071-ND" constant="no"/>+          <attribute name="LCSC_PN" value="C117839" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>