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STM32F469IIT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-176(24x24). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+212@@ -0,0 +1,212 @@+# STM32F469IIT6++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-176(24x24)++STM32F469IIT6 from STMicroelectronics, in a LQFP-176(24x24). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PE2 | output | Port E pin 2; can be configured as TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, ETH_MII_TXD3, FMC_A23, or general-purpose I/O. |+| 2 | PE3 | output | Port E pin 3; can be configured as TRACED0, SAI1_SD_B, FMC_A19, or general-purpose I/O. |+| 3 | PE4 | output | Port E pin 4; can be configured as TRACED1, SPI4_NSS, SAI1_FS_A, FMC_A20, DCMI_D4, LCD_B0, or general-purpose I/O. |+| 4 | PE5 | output | Port E pin 5; can be configured as TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, FMC_A21, DCMI_D6, LCD_G0, or general-purpose I/O. |+| 5 | PE6 | output | Port E pin 6; can be configured as TRACED3, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, FMC_A22, DCMI_D7, LCD_G1, or general-purpose I/O. |+| 6 | VSS | power_in | Ground reference. |+| 7 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 8 | VBAT | power_in | Supply voltage for RTC, backup SRAM, and backup registers, typically connected to battery or VDD. |+| 9 | PI8 | output | Port I pin 8; can be configured as RTC_TAMP1/RTC_TAMP2/RTC_TS or general-purpose I/O; supplied through power switch with 3 mA limit. |+| 10 | PC13 | output | Port C pin 13; can be configured as RTC_TAMP1/RTC_TS/RTC_OUT or general-purpose I/O; supplied through power switch with 3 mA limit. |+| 11 | PC14-OSC32_IN | output | Port C pin 14 / 32 kHz oscillator input; default function is OSC32_IN; can be configured as general-purpose I/O; supplied through power switch with 3 mA limit. |+| 12 | PC15-OSC32_OUT | output | Port C pin 15 / 32 kHz oscillator output; default function is OSC32_OUT; can be configured as general-purpose I/O; supplied through power switch with 3 mA limit. |+| 13 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 14 | PI9 | output | Port I pin 9; can be configured as CAN1_RX, FMC_D30, LCD_VSYNC, or general-purpose I/O. |+| 15 | PI10 | output | Port I pin 10; can be configured as ETH_MII_RX_ER, FMC_D31, LCD_HSYNC, or general-purpose I/O. |+| 16 | PI11 | output | Port I pin 11; can be configured as LCD_G6, OTG_HS_ULPI_DIR, or general-purpose I/O. |+| 17 | VSS | power_in | Ground reference. |+| 18 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 19 | PF3 | output | Port F pin 3; can be configured as FMC_A3 or general-purpose I/O; ADC3_IN9 analog input. |+| 20 | PF4 | output | Port F pin 4; can be configured as FMC_A4 or general-purpose I/O; ADC3_IN14 analog input. |+| 21 | PF5 | output | Port F pin 5; can be configured as FMC_A5 or general-purpose I/O; ADC3_IN15 analog input. |+| 22 | VSS | power_in | Ground reference. |+| 23 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 24 | PF6 | output | Port F pin 6; can be configured as TIM10_CH1, SPI5_NSS, SAI1_SD_B, UART7_Rx, QUADSPI_BK1_IO3, or general-purpose I/O; ADC3_IN4 analog input. |+| 25 | PF7 | output | Port F pin 7; can be configured as TIM11_CH1, SPI5_SCK, SAI1_MCLK_B, UART7_Tx, QUADSPI_BK1_IO2, or general-purpose I/O; ADC3_IN5 analog input. |+| 26 | PF8 | output | Port F pin 8; can be configured as SPI5_MISO, SAI1_SCK_B, TIM13_CH1, QUADSPI_BK1_IO0, or general-purpose I/O; ADC3_IN6 analog input. |+| 27 | PF9 | output | Port F pin 9; can be configured as SPI5_MOSI, SAI1_FS_B, TIM14_CH1, QUADSPI_BK1_IO1, or general-purpose I/O; ADC3_IN7 analog input. |+| 28 | PF10 | output | Port F pin 10; can be configured as QUADSPI_CLK, DCMI_D11, LCD_DE, or general-purpose I/O; ADC3_IN8 analog input. |+| 29 | PH0-OSC_IN | output | Port H pin 0 / high-speed oscillator input; default function is OSC_IN; can be configured as general-purpose I/O. |+| 30 | PH1-OSC_OUT | output | Port H pin 1 / high-speed oscillator output; default function is OSC_OUT; can be configured as general-purpose I/O. |+| 31 | NRST | bidirectional | Active-low reset input with internal weak pull-up; assert reset when pulled below VRST(L) threshold; used for system reset control. |+| 32 | PC0 | output | Port C pin 0; can be configured as OTG_HS_ULPI_STP, FMC_SDNWE, LCD_R5, or general-purpose I/O; ADC123_IN10 analog input. |+| 33 | PC1 | output | Port C pin 1; can be configured as TRACED0, SPI2_MOSI/I2S2_SD, SAI1_SD_A, ETH_MDC, or general-purpose I/O; ADC123_IN11 analog input. |+| 34 | PC2 | output | Port C pin 2; can be configured as SPI2_MISO, I2S2ext_SD, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0, or general-purpose I/O; ADC123_IN12 analog input. |+| 35 | PC3 | output | Port C pin 3; can be configured as SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0, or general-purpose I/O; ADC123_IN13 analog input. |+| 36 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 37 | VSS | power_in | Ground reference. |+| 38 | VSSA | power_in | Analog ground reference for ADC. |+| 39 | VREF- | power_in | ADC reference voltage negative input; typically connected to VSSA or ground. |+| 40 | VREF+ | power_in | ADC reference voltage positive input; 1.62 V to 3.6 V; decoupled with 100 nF capacitor. |+| 41 | VDDA | power_in | Analog supply voltage for ADC and comparators; 1.62 V to 3.6 V. |+| 42 | PA0-WKUP | output | Port A pin 0 / wakeup pin; can be configured as TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, ETH_MII_CRS, or general-purpose I/O; ADC123_IN0 analog input; wakeup from low-power modes. |+| 43 | PA1 | output | Port A pin 1; can be configured as TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, ETH_MII_RX_CLK/ETH_RMII_REF_CLK, LCD_R2, or general-purpose I/O; ADC123_IN1 analog input. |+| 44 | PA2 | output | Port A pin 2; can be configured as TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, ETH_MDIO, LCD_R1, or general-purpose I/O; ADC123_IN2 analog input. |+| 45 | PH2 | output | Port H pin 2; can be configured as QUADSPI_BK2_IO0, ETH_MII_CRS, FMC_SDCKE0, LCD_R0, or general-purpose I/O. |+| 46 | PH3 | output | Port H pin 3; can be configured as QUADSPI_BK2_IO1, ETH_MII_COL, FMC_SDNE0, LCD_R1, or general-purpose I/O. |+| 47 | PH4 | output | Port H pin 4; can be configured as I2C2_SCL, LCD_G5, OTG_HS_ULPI_NXT, LCD_G4, or general-purpose I/O. |+| 48 | PH5 | output | Port H pin 5; can be configured as I2C2_SDA, SPI5_NSS, FMC_SDNWE, or general-purpose I/O. |+| 49 | PA3 | output | Port A pin 3; can be configured as TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, LCD_B2, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5, or general-purpose I/O; ADC123_IN3 analog input. |+| 50 | VSS | power_in | Ground reference. |+| 51 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 52 | PA4 | output | Port A pin 4; can be configured as SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC, or general-purpose I/O; ADC12_IN4 analog input; DAC_OUT1 analog output. |+| 53 | PA5 | output | Port A pin 5; can be configured as TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK, OTG_HS_ULPI_CK, LCD_R4, or general-purpose I/O; ADC12_IN5 analog input; DAC_OUT2 analog output. |+| 54 | PA6 | output | Port A pin 6; can be configured as TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM13_CH1, DCMI_PIXCLK, LCD_G2, or general-purpose I/O; ADC12_IN6 analog input. |+| 55 | PA7 | output | Port A pin 7; can be configured as TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM14_CH1, QUADSPI_CLK, ETH_MII_RX_DV/ETH_RMII_CRS_DV, FMC_SDNWE, or general-purpose I/O; ADC12_IN7 analog input. |+| 56 | PB0 | output | Port B pin 0; can be configured as TIM1_CH2N, TIM3_CH3, TIM8_CH2N, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2, LCD_G1, or general-purpose I/O; ADC12_IN8 analog input. |+| 57 | PB1 | output | Port B pin 1; can be configured as TIM1_CH3N, TIM3_CH4, TIM8_CH3N, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3, LCD_G0, or general-purpose I/O; ADC12_IN9 analog input. |+| 58 | PB2-BOOT1 | output | Port B pin 2 / boot configuration pin; can be configured as general-purpose I/O. |+| 59 | PI15 | output | Port I pin 15; can be configured as LCD_G2, LCD_R0, or general-purpose I/O. |+| 60 | PJ0 | output | Port J pin 0; can be configured as LCD_R7, LCD_R1, or general-purpose I/O. |+| 61 | PJ1 | output | Port J pin 1; can be configured as LCD_R2 or general-purpose I/O. |+| 62 | PJ2 | output | Port J pin 2; can be configured as DSIHOST_TE, LCD_R3, or general-purpose I/O. |+| 63 | PJ3 | output | Port J pin 3; can be configured as LCD_R4 or general-purpose I/O. |+| 64 | PJ4 | output | Port J pin 4; can be configured as LCD_R5 or general-purpose I/O. |+| 65 | PF11 | output | Port F pin 11; can be configured as SPI5_MOSI, FMC_SDNRAS, DCMI_D12, or general-purpose I/O. |+| 66 | PF12 | output | Port F pin 12; can be configured as FMC_A6 or general-purpose I/O. |+| 67 | VSS | power_in | Ground reference. |+| 68 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 69 | PF13 | output | Port F pin 13; can be configured as FMC_A7 or general-purpose I/O. |+| 70 | PF14 | output | Port F pin 14; can be configured as FMC_A8 or general-purpose I/O. |+| 71 | PF15 | output | Port F pin 15; can be configured as FMC_A9 or general-purpose I/O. |+| 72 | PG0 | output | Port G pin 0; can be configured as FMC_A10 or general-purpose I/O. |+| 73 | PG1 | output | Port G pin 1; can be configured as FMC_A11 or general-purpose I/O. |+| 74 | PE7 | output | Port E pin 7; can be configured as TIM1_ETR, UART7_Rx, QUADSPI_BK2_IO0, FMC_D4, or general-purpose I/O. |+| 75 | PE8 | output | Port E pin 8; can be configured as TIM1_CH1N, UART7_Tx, QUADSPI_BK2_IO1, FMC_D5, or general-purpose I/O. |+| 76 | PE9 | output | Port E pin 9; can be configured as TIM1_CH1, QUADSPI_BK2_IO2, FMC_D6, or general-purpose I/O. |+| 77 | PE10 | output | Port E pin 10; can be configured as TIM1_CH2N, QUADSPI_BK2_IO3, FMC_D7, or general-purpose I/O. |+| 78 | PE11 | output | Port E pin 11; can be configured as TIM1_CH2, SPI4_NSS, FMC_D8, LCD_G3, or general-purpose I/O. |+| 79 | PE12 | output | Port E pin 12; can be configured as TIM1_CH3N, SPI4_SCK, FMC_D9, LCD_B4, or general-purpose I/O. |+| 80 | PE13 | output | Port E pin 13; can be configured as TIM1_CH3, SPI4_MISO, FMC_D10, LCD_DE, or general-purpose I/O. |+| 81 | PE14 | output | Port E pin 14; can be configured as TIM1_CH4, SPI4_MOSI, FMC_D11, LCD_CLK, or general-purpose I/O. |+| 82 | PE15 | output | Port E pin 15; can be configured as TIM1_BKIN, FMC_D12, LCD_R7, or general-purpose I/O. |+| 83 | PB10 | output | Port B pin 10; can be configured as TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX, QUADSPI_BK1_NCS, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4, or general-purpose I/O. |+| 84 | PB11 | output | Port B pin 11; can be configured as TIM2_CH4, I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN, DSIHOST_TE, LCD_G5, or general-purpose I/O. |+| 85 | VCAP1 | passive | Decoupling capacitor pin for core voltage regulator; connect 4.7 µF ceramic capacitor to ground. |+| 86 | VSS | power_in | Ground reference. |+| 87 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 88 | PH6 | output | Port H pin 6; can be configured as I2C2_SMBA, SPI5_SCK, TIM12_CH1, ETH_MII_RXD2, FMC_SDNE1, DCMI_D8, or general-purpose I/O. |+| 89 | PH7 | output | Port H pin 7; can be configured as I2C3_SCL, SPI5_MISO, ETH_MII_RXD3, FMC_SDCKE1, DCMI_D9, or general-purpose I/O. |+| 90 | PH8 | output | Port H pin 8; can be configured as I2C3_SDA, FMC_D16, DCMI_HSYNC, LCD_R2, or general-purpose I/O. |+| 91 | PH9 | output | Port H pin 9; can be configured as I2C3_SMBA, TIM12_CH2, FMC_D17, DCMI_D0, LCD_R3, or general-purpose I/O. |+| 92 | PH10 | output | Port H pin 10; can be configured as TIM5_CH1, FMC_D18, DCMI_D1, LCD_R4, or general-purpose I/O. |+| 93 | PH11 | output | Port H pin 11; can be configured as TIM5_CH2, FMC_D19, DCMI_D2, LCD_R5, or general-purpose I/O. |+| 94 | PH12 | output | Port H pin 12; can be configured as TIM5_CH3, FMC_D20, DCMI_D3, LCD_R6, or general-purpose I/O. |+| 95 | PH13 | output | Port H pin 13; can be configured as TIM8_CH1N, CAN1_TX, FMC_D21, LCD_G2, or general-purpose I/O. |+| 96 | PH14 | output | Port H pin 14; can be configured as TIM8_CH2N, FMC_D22, DCMI_D4, LCD_G3, or general-purpose I/O. |+| 97 | PH15 | output | Port H pin 15; can be configured as TIM8_CH3N, FMC_D23, DCMI_D11, LCD_G4, or general-purpose I/O. |+| 98 | PI0 | output | Port I pin 0; can be configured as TIM5_CH4, SPI2_NSS/I2S2_WS, FMC_D24, DCMI_D13, LCD_G5, or general-purpose I/O. |+| 99 | PI1 | output | Port I pin 1; can be configured as SPI2_SCK/I2S2_CK, FMC_D25, DCMI_D8, LCD_G6, or general-purpose I/O. |+| 100 | PI2 | output | Port I pin 2; can be configured as TIM8_CH4, SPI2_MISO, I2S2ext_SD, FMC_D26, DCMI_D9, LCD_G7, or general-purpose I/O. |+| 101 | PI3 | output | Port I pin 3; can be configured as TIM8_ETR, SPI2_MOSI/I2S2_SD, FMC_D27, DCMI_D10, or general-purpose I/O. |+| 102 | PI4 | output | Port I pin 4; can be configured as TIM8_BKIN, FMC_NBL2, DCMI_D5, LCD_B4, or general-purpose I/O. |+| 103 | PI5 | output | Port I pin 5; can be configured as TIM8_CH1, FMC_NBL3, DCMI_VSYNC, LCD_B5, or general-purpose I/O. |+| 104 | PI6 | output | Port I pin 6; can be configured as TIM8_CH2, FMC_D28, DCMI_D6, LCD_B6, or general-purpose I/O. |+| 105 | PI7 | output | Port I pin 7; can be configured as TIM8_CH3, FMC_D29, DCMI_D7, LCD_B7, or general-purpose I/O. |+| 106 | PB12 | output | Port B pin 12; can be configured as TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0, OTG_HS_ID, or general-purpose I/O. |+| 107 | PB13 | output | Port B pin 13; can be configured as TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1, or general-purpose I/O; OTG_HS_VBUS analog input. |+| 108 | PB14 | output | Port B pin 14; can be configured as TIM1_CH2N, TIM8_CH2N, SPI2_MISO, I2S2ext_SD, USART3_RTS, TIM12_CH1, OTG_HS_DM, or general-purpose I/O. |+| 109 | PB15 | output | Port B pin 15; can be configured as RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI/I2S2_SD, TIM12_CH2, OTG_HS_DP, or general-purpose I/O. |+| 110 | PD8 | output | Port D pin 8; can be configured as USART3_TX, FMC_D13, or general-purpose I/O. |+| 111 | PD9 | output | Port D pin 9; can be configured as USART3_RX, FMC_D14, or general-purpose I/O. |+| 112 | PD10 | output | Port D pin 10; can be configured as USART3_CK, FMC_D15, LCD_B3, or general-purpose I/O. |+| 113 | PD11 | output | Port D pin 11; can be configured as USART3_CTS, QUADSPI_BK1_IO0, FMC_A16/FMC_CLE, or general-purpose I/O. |+| 114 | PD12 | output | Port D pin 12; can be configured as TIM4_CH1, USART3_RTS, QUADSPI_BK1_IO1, FMC_A17/FMC_ALE, or general-purpose I/O. |+| 115 | PD13 | output | Port D pin 13; can be configured as TIM4_CH2, QUADSPI_BK1_IO3, FMC_A18, or general-purpose I/O. |+| 116 | VSS | power_in | Ground reference. |+| 117 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 118 | PD14 | output | Port D pin 14; can be configured as TIM4_CH3, FMC_D0, or general-purpose I/O. |+| 119 | PD15 | output | Port D pin 15; can be configured as TIM4_CH4, FMC_D1, or general-purpose I/O. |+| 120 | VDDDSI | power_in | DSI host supply voltage. |+| 121 | VSS | power_in | Ground reference. |+| 122 | VCAPDSI | passive | DSI host regulator decoupling capacitor pin. |+| 123 | VDD12DSI | power_in | DSI 1.2 V internal regulator output and PLL supply voltage. |+| 124 | DSIHOST_D0P | output | MIPI DSI host data lane 0 positive signal. |+| 125 | DSIHOST_D0N | output | MIPI DSI host data lane 0 negative signal. |+| 126 | VSSDSI | power_in | DSI ground reference. |+| 127 | DSIHOST_CKP | output | MIPI DSI host clock lane positive signal. |+| 128 | DSIHOST_CKN | output | MIPI DSI host clock lane negative signal. |+| 129 | VDD12DSI | power_in | DSI 1.2 V internal regulator output and PLL supply voltage. |+| 130 | DSIHOST_D1P | output | MIPI DSI host data lane 1 positive signal. |+| 131 | DSIHOST_D1N | output | MIPI DSI host data lane 1 negative signal. |+| 132 | VSSDSI | power_in | DSI ground reference. |+| 133 | PG2 | output | Port G pin 2; can be configured as FMC_A12 or general-purpose I/O. |+| 134 | PG3 | output | Port G pin 3; can be configured as FMC_A13 or general-purpose I/O. |+| 135 | PG4 | output | Port G pin 4; can be configured as FMC_A14/FMC_BA0 or general-purpose I/O. |+| 136 | PG5 | output | Port G pin 5; can be configured as FMC_A15/FMC_BA1 or general-purpose I/O. |+| 137 | PG6 | output | Port G pin 6; can be configured as DCMI_D12, LCD_R7, or general-purpose I/O. |+| 138 | PG7 | output | Port G pin 7; can be configured as SAI1_MCLK_A, USART6_CK, FMC_INT, DCMI_D13, LCD_CLK, or general-purpose I/O. |+| 139 | PG8 | output | Port G pin 8; can be configured as SPI6_NSS, USART6_RTS, ETH_PPS_OUT, FMC_SDCLK, LCD_G7, or general-purpose I/O. |+| 140 | VSS | power_in | Ground reference. |+| 141 | VDDUSB | power_in | USB dedicated supply voltage (1.62 V to 3.6 V); can be independent from VDD for full-speed operation. |+| 142 | PC6 | output | Port C pin 6; can be configured as TIM3_CH1, TIM8_CH1, I2S2_MCK, USART6_TX, SDIO_D6, DCMI_D0, LCD_HSYNC, or general-purpose I/O. |+| 143 | PC7 | output | Port C pin 7; can be configured as TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, SDIO_D7, DCMI_D1, LCD_G6, or general-purpose I/O. |+| 144 | PC8 | output | Port C pin 8; can be configured as TRACED1, TIM3_CH3, TIM8_CH3, USART6_CK, SDIO_D0, DCMI_D2, or general-purpose I/O. |+| 145 | PC9 | output | Port C pin 9; can be configured as MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, QUADSPI_BK1_IO0, SDIO_D1, DCMI_D3, or general-purpose I/O. |+| 146 | PA8 | output | Port A pin 8; can be configured as MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, OTG_FS_SOF, LCD_R6, or general-purpose I/O. |+| 147 | PA9 | output | Port A pin 9; can be configured as TIM1_CH2, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX, DCMI_D0, or general-purpose I/O; OTG_FS_VBUS analog input. |+| 148 | PA10 | output | Port A pin 10; can be configured as TIM1_CH3, USART1_RX, OTG_FS_ID, DCMI_D1, or general-purpose I/O. |+| 149 | PA11 | output | Port A pin 11; can be configured as TIM1_CH4, USART1_CTS, CAN1_RX, OTG_FS_DM, LCD_R4, or general-purpose I/O. |+| 150 | PA12 | output | Port A pin 12; can be configured as TIM1_ETR, USART1_RTS, CAN1_TX, OTG_FS_DP, LCD_R5, or general-purpose I/O. |+| 151 | PA13(JTMS-SWDIO) | output | Port A pin 13 / JTAG TMS / SWD I/O; shared between JTAG and SWD debug interfaces. |+| 152 | VCAP2 | passive | Decoupling capacitor pin for core voltage regulator; connect 4.7 µF ceramic capacitor to ground. |+| 153 | VSS | power_in | Ground reference. |+| 154 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 155 | PH13 | output | Port H pin 13; can be configured as TIM8_CH1N, CAN1_TX, FMC_D21, LCD_G2, or general-purpose I/O. |+| 156 | PH14 | output | Port H pin 14; can be configured as TIM8_CH2N, FMC_D22, DCMI_D4, LCD_G3, or general-purpose I/O. |+| 157 | PH15 | output | Port H pin 15; can be configured as TIM8_CH3N, FMC_D23, DCMI_D11, LCD_G4, or general-purpose I/O. |+| 158 | PI0 | output | Port I pin 0; can be configured as TIM5_CH4, SPI2_NSS/I2S2_WS, FMC_D24, DCMI_D13, LCD_G5, or general-purpose I/O. |+| 159 | PI1 | output | Port I pin 1; can be configured as SPI2_SCK/I2S2_CK, FMC_D25, DCMI_D8, LCD_G6, or general-purpose I/O. |+| 160 | PI2 | output | Port I pin 2; can be configured as TIM8_CH4, SPI2_MISO, I2S2ext_SD, FMC_D26, DCMI_D9, LCD_G7, or general-purpose I/O. |+| 161 | PI3 | output | Port I pin 3; can be configured as TIM8_ETR, SPI2_MOSI/I2S2_SD, FMC_D27, DCMI_D10, or general-purpose I/O. |+| 162 | PG9 | output | Port G pin 9; can be configured as USART6_RX, QUADSPI_BK2_IO2, FMC_NE2/FMC_NCE, DCMI_VSYNC, or general-purpose I/O. |+| 163 | PG10 | output | Port G pin 10; can be configured as LCD_G3, FMC_NE3, DCMI_D2, LCD_B2, or general-purpose I/O. |+| 164 | PG11 | output | Port G pin 11; can be configured as ETH_MII_TX_EN/ETH_RMII_TX_EN, DCMI_D3, LCD_B3, or general-purpose I/O. |+| 165 | PG12 | output | Port G pin 12; can be configured as SPI6_MISO, USART6_RTS, LCD_B4, FMC_NE4, LCD_B1, or general-purpose I/O. |+| 166 | PG13 | output | Port G pin 13; can be configured as TRACED0, SPI6_SCK, USART6_CTS, ETH_MII_TXD0/ETH_RMII_TXD0, FMC_A24, LCD_R0, or general-purpose I/O. |+| 167 | PG14 | output | Port G pin 14; can be configured as TRACED1, SPI6_MOSI, USART6_TX, QUADSPI_BK2_IO3, ETH_MII_TXD1/ETH_RMII_TXD1, FMC_A25, LCD_B0, or general-purpose I/O. |+| 168 | VSS | power_in | Ground reference. |+| 169 | VDD | power_in | Supply voltage 1.7 V to 3.6 V. |+| 170 | PA14(JTCK-SWCLK) | output | Port A pin 14 / JTAG TCK / SWD clock; shared between JTAG and SWD debug interfaces. |+| 171 | PA15(JTDI) | output | Port A pin 15 / JTAG TDI; can also be configured as TIM2_CH1/TIM2_ETR, SPI1_NSS, SPI3_NSS/I2S3_WS, or general-purpose I/O. |+| 172 | PC10 | output | Port C pin 10; can be configured as SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDIO_D2, DCMI_D8, LCD_R2, or general-purpose I/O. |+| 173 | PC11 | output | Port C pin 11; can be configured as I2S3ext_SD, SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDIO_D3, DCMI_D4, or general-purpose I/O. |+| 174 | PC12 | output | Port C pin 12; can be configured as TRACED3, SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDIO_CK, DCMI_D9, or general-purpose I/O. |+| 175 | PD0 | output | Port D pin 0; can be configured as CAN1_RX, FMC_D2, or general-purpose I/O. |+| 176 | PD1 | output | Port D pin 1; can be configured as CAN1_TX, FMC_D3, or general-purpose I/O. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-176(24x24) |+| Category | Embedded Processors & Controllers |+| Pins | 176 |++## CAD (KiCad official)++- Symbol: `STM32F469IIT6`+- Footprint: `Package_QFP:LQFP-176_24x24mm_P0.5mm`+- 3D model: LQFP-176(24x24) (KiCad packages3D, STEP)+- 3D model files: `stm32f469iit6-etched.step` / `stm32f469iit6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f469iit6.step` / `stm32f469iit6.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588858450910851072) (217 pp, sha256 `0a93578085d53c67`, retrieved 2026-09-29, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32f469iit6-datasheet.pdf)
page.jsonadded+1150@@ -0,0 +1,1150 @@+{+ "slug": "stm32f469iit6",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-176(24x24). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32f469iit6",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32f469iit6.kicad_sym",+ "stm32f469iit6.kicad_mod",+ "stm32f469iit6.glb",+ "stm32f469iit6.step",+ "stm32f469iit6.lbr",+ "docs/hero.png",+ "docs/stm32f469iit6-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "STM32F469IIT6",+ "manufacturer": "STMicroelectronics",+ "package": "LQFP-176(24x24)",+ "pin_count": 176,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588858450910851072",+ "parts": {+ "symbol": "stm32f469iit6.kicad_sym",+ "footprint": "stm32f469iit6.kicad_mod",+ "model_3d": "stm32f469iit6-etched.glb",+ "model_3d_plain": "stm32f469iit6.glb",+ "model_3d_step": "stm32f469iit6-etched.step",+ "model_3d_step_plain": "stm32f469iit6.step",+ "lbr": "stm32f469iit6.lbr"+ },+ "distributor_links": {+ "lcsc": "C117839",+ "digikey": "497-16071-ND",+ "mouser": "511-STM32F469IIT6"+ },+ "distributor_check": {+ "checked_at": "2026-09-29T14:41:27Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-16071-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32F469IIT6",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "PE2",+ "type": "output",+ "description": "Port E pin 2; can be configured as TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, ETH_MII_TXD3, FMC_A23, or general-purpose I/O."+ },+ {+ "number": "2",+ "name": "PE3",+ "type": "output",+ "description": "Port E pin 3; can be configured as TRACED0, SAI1_SD_B, FMC_A19, or general-purpose I/O."+ },+ {+ "number": "3",+ "name": "PE4",+ "type": "output",+ "description": "Port E pin 4; can be configured as TRACED1, SPI4_NSS, SAI1_FS_A, FMC_A20, DCMI_D4, LCD_B0, or general-purpose I/O."+ },+ {+ "number": "4",+ "name": "PE5",+ "type": "output",+ "description": "Port E pin 5; can be configured as TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, FMC_A21, DCMI_D6, LCD_G0, or general-purpose I/O."+ },+ {+ "number": "5",+ "name": "PE6",+ "type": "output",+ "description": "Port E pin 6; can be configured as TRACED3, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, FMC_A22, DCMI_D7, LCD_G1, or general-purpose I/O."+ },+ {+ "number": "6",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "7",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage 1.7 V to 3.6 V."+ },+ {+ "number": "8",+ "name": "VBAT",+ "type": "power_in",+ "description": "Supply voltage for RTC, backup SRAM, and backup registers, typically connected to battery or VDD."+ },+ {+ "number": "9",+ "name": "PI8",+ "type": "output",+ "description": "Port I pin 8; can be configured as RTC_TAMP1/RTC_TAMP2/RTC_TS or general-purpose I/O; supplied through power switch with 3 mA limit."+ },+ {+ "number": "10",+ "name": "PC13",+ "type": "output",+ "description": "Port C pin 13; can be configured as RTC_TAMP1/RTC_TS/RTC_OUT or general-purpose I/O; supplied through power switch with 3 mA limit."+ },+ {+ "number": "11",+ "name": "PC14-OSC32_IN",+ "type": "output",+ "description": "Port C pin 14 / 32 kHz oscillator input; default function is OSC32_IN; can be configured as general-purpose I/O; supplied through power switch with 3 mA limit."+ },+ {+ "number": "12",+ "name": "PC15-OSC32_OUT",+ "type": "output",+ "description": "Port C pin 15 / 32 kHz oscillator output; default function is OSC32_OUT; can be configured as general-purpose I/O; supplied through power switch with 3 mA limit."+ },+ {+ "number": "13",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage 1.7 V to 3.6 V."+ },+ {+ "number": "14",+ "name": "PI9",+ "type": "output",+ "description": "Port I pin 9; can be configured as CAN1_RX, FMC_D30, LCD_VSYNC, or general-purpose I/O."+ },+ {+ "number": "15",+ "name": "PI10",+ "type": "output",+ "description": "Port I pin 10; can be configured as ETH_MII_RX_ER, FMC_D31, LCD_HSYNC, or general-purpose I/O."+ },+ {+ "number": "16",+ "name": "PI11",+ "type": "output",+ "description": "Port I pin 11; can be configured as LCD_G6, OTG_HS_ULPI_DIR, or general-purpose I/O."+ },+ {+ "number": "17",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "18",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage 1.7 V to 3.6 V."+ },+ {+ "number": "19",+ "name": "PF3",+ "type": "output",+ "description": "Port F pin 3; can be configured as FMC_A3 or general-purpose I/O; ADC3_IN9 analog input."+ },+ {+ "number": "20",+ "name": "PF4",+ "type": "output",+ "description": "Port F pin 4; can be configured as FMC_A4 or general-purpose I/O; ADC3_IN14 analog input."+ },+ {+ "number": "21",+ "name": "PF5",+ "type": "output",+ "description": "Port F pin 5; can be configured as FMC_A5 or general-purpose I/O; ADC3_IN15 analog input."+ },+ {+ "number": "22",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "23",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage 1.7 V to 3.6 V."+ },+ {+ "number": "24",+ "name": "PF6",+ "type": "output",+ "description": "Port F pin 6; can be configured as TIM10_CH1, SPI5_NSS, SAI1_SD_B, UART7_Rx, QUADSPI_BK1_IO3, or general-purpose I/O; ADC3_IN4 analog input."+ },+ {+ "number": "25",+ "name": "PF7",+ "type": "output",+ "description": "Port F pin 7; can be configured as TIM11_CH1, SPI5_SCK, SAI1_MCLK_B, UART7_Tx, QUADSPI_BK1_IO2, or general-purpose I/O; ADC3_IN5 analog input."+ },+ {+ "number": "26",+ "name": "PF8",+ "type": "output",+ "description": "Port F pin 8; can be configured as SPI5_MISO, SAI1_SCK_B, TIM13_CH1, QUADSPI_BK1_IO0, or general-purpose I/O; ADC3_IN6 analog input."+ },+ {+ "number": "27",+ "name": "PF9",+ "type": "output",+ "description": "Port F pin 9; can be configured as SPI5_MOSI, SAI1_FS_B, TIM14_CH1, QUADSPI_BK1_IO1, or general-purpose I/O; ADC3_IN7 analog input."+ },+ {+ "number": "28",+ "name": "PF10",+ "type": "output",+ "description": "Port F pin 10; can be configured as QUADSPI_CLK, DCMI_D11, LCD_DE, or general-purpose I/O; ADC3_IN8 analog input."+ },+ {+ "number": "29",+ "name": "PH0-OSC_IN",+ "type": "output",+ "description": "Port H pin 0 / high-speed oscillator input; default function is OSC_IN; can be configured as general-purpose I/O."+ },+ {+ "number": "30",+ "name": "PH1-OSC_OUT",+ "type": "output",+ "description": "Port H pin 1 / high-speed oscillator output; default function is OSC_OUT; can be configured as general-purpose I/O."+ },+ {+ "number": "31",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Active-low reset input with internal weak pull-up; assert reset when pulled below VRST(L) threshold; used for system reset control."+ },+ {+ "number": "32",+ "name": "PC0",+ "type": "output",+ "description": "Port C pin 0; can be configured as OTG_HS_ULPI_STP, FMC_SDNWE, LCD_R5, or general-purpose I/O; ADC123_IN10 analog input."+ },+ {+ "number": "33",+ "name": "PC1",+ "type": "output",+ "description": "Port C pin 1; can be configured as TRACED0, SPI2_MOSI/I2S2_SD, SAI1_SD_A, ETH_MDC, or general-purpose I/O; ADC123_IN11 analog input."+ },+ {+ "number": "34",+ "name": "PC2",+ "type": "output",+ "description": "Port C pin 2; can be configured as SPI2_MISO, I2S2ext_SD, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0, or general-purpose I/O; ADC123_IN12 analog input."+ },+ {+ "number": "35",+ "name": "PC3",+ "type": "output",+ "description": "Port C pin 3; can be configured as SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0, or general-purpose I/O; ADC123_IN13 analog input."+ },+ {+ "number": "36",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage 1.7 V to 3.6 V."+ },+ {+ "number": "37",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "38",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground reference for ADC."+ },+ {+ "number": "39",+ "name": "VREF-",+ "type": "power_in",+ "description": "ADC reference voltage negative input; typically connected to VSSA or ground."+ },+ {+ "number": "40",+ "name": "VREF+",+ "type": "power_in",+ "description": "ADC reference voltage positive input; 1.62 V to 3.6 V; decoupled with 100 nF capacitor."+ },+ {+ "number": "41",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog supply voltage for ADC and comparators; 1.62 V to 3.6 V."+ },+ {+ "number": "42",+ "name": "PA0-WKUP",+ "type": "output",+ "description": "Port A pin 0 / wakeup pin; can be configured as TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, ETH_MII_CRS, or general-purpose I/O; ADC123_IN0 analog input; wakeup from low-power modes."+ },+ {+ "number": "43",+ "name": "PA1",+ "type": "output",+ "description": "Port A pin 1; can be configured as TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, ETH_MII_RX_CLK/ETH_RMII_REF_CLK, LCD_R2, or general-purpose I/O; ADC123_IN1 analog input."+ },+ {+ "number": "44",+ "name": "PA2",+ "type": "output",+ "description": "Port A pin 2; can be configured as TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, ETH_MDIO, LCD_R1, or general-purpose I/O; ADC123_IN2 analog input."+ },+ {+ "number": "45",+ "name": "PH2",+ "type": "output",+ "description": "Port H pin 2; can be configured as QUADSPI_BK2_IO0, ETH_MII_CRS, FMC_SDCKE0, LCD_R0, or general-purpose I/O."+ },+ {+ "number": "46",+ "name": "PH3",+ "type": "output",+ "description": "Port H pin 3; can be configured as QUADSPI_BK2_IO1, ETH_MII_COL, FMC_SDNE0, LCD_R1, or general-purpose I/O."+ },+ {+ "number": "47",+ "name": "PH4",+ "type": "output",+ "description": "Port H pin 4; can be configured as I2C2_SCL, LCD_G5, OTG_HS_ULPI_NXT, LCD_G4, or general-purpose I/O."+ },+ {+ "number": "48",+ "name": "PH5",+ "type": "output",+ "description": "Port H pin 5; can be configured as I2C2_SDA, SPI5_NSS, FMC_SDNWE, or general-purpose I/O."+ },+ {+ "number": "49",+ "name": "PA3",+ "type": "output",+ "description": "Port A pin 3; can be configured as TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, LCD_B2, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5, or general-purpose I/O; ADC123_IN3 analog input."+ },+ {+ "number": "50",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "51",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage 1.7 V to 3.6 V."+ },+ {+ "number": "52",+ "name": "PA4",+ "type": "output",+ "description": "Port A pin 4; can be configured as SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC, or general-purpose I/O; ADC12_IN4 analog input; DAC_OUT1 analog output."+ },+ {+ "number": "53",+ "name": "PA5",+ "type": "output",+ "description": "Port A pin 5; can be configured as TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK, OTG_HS_ULPI_CK, LCD_R4, or general-purpose I/O; ADC12_IN5 analog input; DAC_OUT2 analog output."+ },+ {+ "number": "54",+ "name": "PA6",+ "type": "output",+ "description": "Port A pin 6; can be configured as TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM13_CH1, DCMI_PIXCLK, LCD_G2, or general-purpose I/O; ADC12_IN6 analog input."+ },+ {+ "number": "55",+ "name": "PA7",+ "type": "output",+ "description": "Port A pin 7; can be configured as TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM14_CH1, QUADSPI_CLK, ETH_MII_RX_DV/ETH_RMII_CRS_DV, FMC_SDNWE, or general-purpose I/O; ADC12_IN7 analog input."+ },+ {+ "number": "56",+ "name": "PB0",+ "type": "output",+ "description": "Port B pin 0; can be configured as TIM1_CH2N, TIM3_CH3, TIM8_CH2N, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2, LCD_G1, or general-purpose I/O; ADC12_IN8 analog input."+ },+ {+ "number": "57",+ "name": "PB1",+ "type": "output",+ "description": "Port B pin 1; can be configured as TIM1_CH3N, TIM3_CH4, TIM8_CH3N, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3, LCD_G0, or general-purpose I/O; ADC12_IN9 analog input."+ },+ {+ "number": "58",+ "name": "PB2-BOOT1",+ "type": "output",+ "description": "Port B pin 2 / boot configuration pin; can be configured as general-purpose I/O."+ },+ {+ "number": "59",+ "name": "PI15",+ "type": "output",+ "description": "Port I pin 15; can be configured as LCD_G2, LCD_R0, or general-purpose I/O."+ },+ {+ "number": "60",+ "name": "PJ0",+ "type": "output",+ "description": "Port J pin 0; can be configured as LCD_R7, LCD_R1, or general-purpose I/O."+ },+ {+ "number": "61",+ "name": "PJ1",+ "type": "output",+ "description": "Port J pin 1; can be configured as LCD_R2 or general-purpose I/O."+ },+ {+ "number": "62",+ "name": "PJ2",+ "type": "output",+ "description": "Port J pin 2; can be configured as DSIHOST_TE, LCD_R3, or general-purpose I/O."+ },+ {+ "number": "63",+ "name": "PJ3",+ "type": "output",+ "description": "Port J pin 3; can be configured as LCD_R4 or general-purpose I/O."+ },+ {+ "number": "64",+ "name": "PJ4",+ "type": "output",+ "description": "Port J pin 4; can be configured as LCD_R5 or general-purpose I/O."+ },+ {+ "number": "65",+ "name": "PF11",+ "type": "output",+ "description": "Port F pin 11; can be configured as SPI5_MOSI, FMC_SDNRAS, DCMI_D12, or general-purpose I/O."+ },+ {+ "number": "66",+ "name": "PF12",+ "type": "output",+ "description": "Port F pin 12; can be configured as FMC_A6 or general-purpose I/O."+ },+ {+ "number": "67",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "68",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage 1.7 V to 3.6 V."+ },+ {+ "number": "69",+ "name": "PF13",+ "type": "output",+ "description": "Port F pin 13; can be configured as FMC_A7 or general-purpose I/O."+ },+ {+ "number": "70",+ "name": "PF14",+ "type": "output",+ "description": "Port F pin 14; can be configured as FMC_A8 or general-purpose I/O."+ },+ {+ "number": "71",+ "name": "PF15",+ "type": "output",+ "description": "Port F pin 15; can be configured as FMC_A9 or general-purpose I/O."+ },+ {+ "number": "72",+ "name": "PG0",+ "type": "output",+ "description": "Port G pin 0; can be configured as FMC_A10 or general-purpose I/O."+ },+ {+ "number": "73",+ "name": "PG1",+ "type": "output",+ "description": "Port G pin 1; can be configured as FMC_A11 or general-purpose I/O."+ },+ {+ "number": "74",+ "name": "PE7",+ "type": "output",+ "description": "Port E pin 7; can be configured as TIM1_ETR, UART7_Rx, QUADSPI_BK2_IO0, FMC_D4, or general-purpose I/O."+ },+ {+ "number": "75",+ "name": "PE8",+ "type": "output",+ "description": "Port E pin 8; can be configured as TIM1_CH1N, UART7_Tx, QUADSPI_BK2_IO1, FMC_D5, or general-purpose I/O."+ },+ {+ "number": "76",+ "name": "PE9",+ "type": "output",+ "description": "Port E pin 9; can be configured as TIM1_CH1, QUADSPI_BK2_IO2, FMC_D6, or general-purpose I/O."+ },+ {+ "number": "77",+ "name": "PE10",+ "type": "output",+ "description": "Port E pin 10; can be configured as TIM1_CH2N, QUADSPI_BK2_IO3, FMC_D7, or general-purpose I/O."+ },+ {+ "number": "78",+ "name": "PE11",+ "type": "output",+ "description": "Port E pin 11; can be configured as TIM1_CH2, SPI4_NSS, FMC_D8, LCD_G3, or general-purpose I/O."+ },+ {+ "number": "79",+ "name": "PE12",+ "type": "output",+ "description": "Port E pin 12; can be configured as TIM1_CH3N, SPI4_SCK, FMC_D9, LCD_B4, or general-purpose I/O."+ },+ {+ "number": "80",+ "name": "PE13",+ "type": "output",+ "description": "Port E pin 13; can be configured as TIM1_CH3, SPI4_MISO, FMC_D10, LCD_DE, or general-purpose I/O."+ },+ {+ "number": "81",+ "name": "PE14",+ "type": "output",+ "description": "Port E pin 14; can be configured as TIM1_CH4, SPI4_MOSI, FMC_D11, LCD_CLK, or general-purpose I/O."+ },+ {+ "number": "82",+ "name": "PE15",+ "type": "output",+ "description": "Port E pin 15; can be configured as TIM1_BKIN, FMC_D12, LCD_R7, or general-purpose I/O."+ },+ {+ "number": "83",+ "name": "PB10",+ "type": "output",+ "description": "Port B pin 10; can be configured as TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX, QUADSPI_BK1_NCS, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4, or general-purpose I/O."+ },+ {+ "number": "84",+ "name": "PB11",+ "type": "output",+ "description": "Port B pin 11; can be configured as TIM2_CH4, I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN, DSIHOST_TE, LCD_G5, or general-purpose I/O."+ },+ {+ "number": "85",+ "name": "VCAP1",+ "type": "passive",+ "description": "Decoupling capacitor pin for core voltage regulator; connect 4.7 µF ceramic capacitor to ground."+ },+ {+ "number": "86",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "87",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage 1.7 V to 3.6 V."+ },+ {+ "number": "88",+ "name": "PH6",+ "type": "output",+ "description": "Port H pin 6; can be configured as I2C2_SMBA, SPI5_SCK, TIM12_CH1, ETH_MII_RXD2, FMC_SDNE1, DCMI_D8, or general-purpose I/O."+ },+ {+ "number": "89",+ "name": "PH7",+ "type": "output",+ "description": "Port H pin 7; can be configured as I2C3_SCL, SPI5_MISO, ETH_MII_RXD3, FMC_SDCKE1, DCMI_D9, or general-purpose I/O."+ },+ {+ "number": "90",+ "name": "PH8",+ "type": "output",+ "description": "Port H pin 8; can be configured as I2C3_SDA, FMC_D16, DCMI_HSYNC, LCD_R2, or general-purpose I/O."+ },+ {+ "number": "91",+ "name": "PH9",+ "type": "output",+ "description": "Port H pin 9; can be configured as I2C3_SMBA, TIM12_CH2, FMC_D17, DCMI_D0, LCD_R3, or general-purpose I/O."+ },+ {+ "number": "92",+ "name": "PH10",+ "type": "output",+ "description": "Port H pin 10; can be configured as TIM5_CH1, FMC_D18, DCMI_D1, LCD_R4, or general-purpose I/O."+ },+ {+ "number": "93",+ "name": "PH11",+ "type": "output",+ "description": "Port H pin 11; can be configured as TIM5_CH2, FMC_D19, DCMI_D2, LCD_R5, or general-purpose I/O."+ },+ {+ "number": "94",+ "name": "PH12",+ "type": "output",+ "description": "Port H pin 12; can be configured as TIM5_CH3, FMC_D20, DCMI_D3, LCD_R6, or general-purpose I/O."+ },+ {+ "number": "95",+ "name": "PH13",+ "type": "output",+ "description": "Port H pin 13; can be configured as TIM8_CH1N, CAN1_TX, FMC_D21, LCD_G2, or general-purpose I/O."+ },+ {+ "number": "96",+ "name": "PH14",+ "type": "output",+ "description": "Port H pin 14; can be configured as TIM8_CH2N, FMC_D22, DCMI_D4, LCD_G3, or general-purpose I/O."+ },+ {+ "number": "97",+ "name": "PH15",+ "type": "output",+ "description": "Port H pin 15; can be configured as TIM8_CH3N, FMC_D23, DCMI_D11, LCD_G4, or general-purpose I/O."+ },+ {+ "number": "98",+ "name": "PI0",+ "type": "output",+ "description": "Port I pin 0; can be configured as TIM5_CH4, SPI2_NSS/I2S2_WS, FMC_D24, DCMI_D13, LCD_G5, or general-purpose I/O."+ },+ {+ "number": "99",+ "name": "PI1",+ "type": "output",+ "description": "Port I pin 1; can be configured as SPI2_SCK/I2S2_CK, FMC_D25, DCMI_D8, LCD_G6, or general-purpose I/O."+ },+ {+ "number": "100",+ "name": "PI2",+ "type": "output",+ "description": "Port I pin 2; can be configured as TIM8_CH4, SPI2_MISO, I2S2ext_SD, FMC_D26, DCMI_D9, LCD_G7, or general-purpose I/O."+ },+ {+ "number": "101",+ "name": "PI3",+ "type": "output",+ "description": "Port I pin 3; can be configured as TIM8_ETR, SPI2_MOSI/I2S2_SD, FMC_D27, DCMI_D10, or general-purpose I/O."+ },+ {+ "number": "102",+ "name": "PI4",+ "type": "output",+ "description": "Port I pin 4; can be configured as TIM8_BKIN, FMC_NBL2, DCMI_D5, LCD_B4, or general-purpose I/O."+ },+ {+ "number": "103",+ "name": "PI5",+ "type": "output",+ "description": "Port I pin 5; can be configured as TIM8_CH1, FMC_NBL3, DCMI_VSYNC, LCD_B5, or general-purpose I/O."+ },+ {+ "number": "104",+ "name": "PI6",+ "type": "output",+ "description": "Port I pin 6; can be configured as TIM8_CH2, FMC_D28, DCMI_D6, LCD_B6, or general-purpose I/O."+ },+ {+ "number": "105",+ "name": "PI7",+ "type": "output",+ "description": "Port I pin 7; can be configured as TIM8_CH3, FMC_D29, DCMI_D7, LCD_B7, or general-purpose I/O."+ },+ {+ "number": "106",+ "name": "PB12",+ "type": "output",+ "description": "Port B pin 12; can be configured as TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0, OTG_HS_ID, or general-purpose I/O."+ },+ {+ "number": "107",+ "name": "PB13",+ "type": "output",+ "description": "Port B pin 13; can be configured as TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1, or general-purpose I/O; OTG_HS_VBUS analog input."+ },+ {+ "number": "108",+ "name": "PB14",+ "type": "output",+ "description": "Port B pin 14; can be configured as TIM1_CH2N, TIM8_CH2N, SPI2_MISO, I2S2ext_SD, USART3_RTS, TIM12_CH1, OTG_HS_DM, or general-purpose I/O."+ },+ {+ "number": "109",+ "name": "PB15",+ "type": "output",+ "description": "Port B pin 15; can be configured as RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI/I2S2_SD, TIM12_CH2, OTG_HS_DP, or general-purpose I/O."+ },+ {+ "number": "110",+ "name": "PD8",+ "type": "output",+ "description": "Port D pin 8; can be configured as USART3_TX, FMC_D13, or general-purpose I/O."+ },+ {+ "number": "111",+ "name": "PD9",+ "type": "output",+ "description": "Port D pin 9; can be configured as USART3_RX, FMC_D14, or general-purpose I/O."+ },+ {+ "number": "112",+ "name": "PD10",+ "type": "output",+ "description": "Port D pin 10; can be configured as USART3_CK, FMC_D15, LCD_B3, or general-purpose I/O."+ },+ {+ "number": "113",+ "name": "PD11",+ "type": "output",+ "description": "Port D pin 11; can be configured as USART3_CTS, QUADSPI_BK1_IO0, FMC_A16/FMC_CLE, or general-purpose I/O."+ },+ {+ "number": "114",+ "name": "PD12",+ "type": "output",+ "description": "Port D pin 12; can be configured as TIM4_CH1, USART3_RTS, QUADSPI_BK1_IO1, FMC_A17/FMC_ALE, or general-purpose I/O."+ },+ {+ "number": "115",+ "name": "PD13",+ "type": "output",+ "description": "Port D pin 13; can be configured as TIM4_CH2, QUADSPI_BK1_IO3, FMC_A18, or general-purpose I/O."+ },+ {+ "number": "116",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "117",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage 1.7 V to 3.6 V."+ },+ {+ "number": "118",+ "name": "PD14",+ "type": "output",+ "description": "Port D pin 14; can be configured as TIM4_CH3, FMC_D0, or general-purpose I/O."+ },+ {+ "number": "119",+ "name": "PD15",+ "type": "output",+ "description": "Port D pin 15; can be configured as TIM4_CH4, FMC_D1, or general-purpose I/O."+ },+ {+ "number": "120",+ "name": "VDDDSI",+ "type": "power_in",+ "description": "DSI host supply voltage."+ },+ {+ "number": "121",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "122",+ "name": "VCAPDSI",+ "type": "passive",+ "description": "DSI host regulator decoupling capacitor pin."+ },+ {+ "number": "123",+ "name": "VDD12DSI",+ "type": "power_in",+ "description": "DSI 1.2 V internal regulator output and PLL supply voltage."+ },+ {+ "number": "124",+ "name": "DSIHOST_D0P",+ "type": "output",+ "description": "MIPI DSI host data lane 0 positive signal."+ },+ {+ "number": "125",+ "name": "DSIHOST_D0N",+ "type": "output",+ "description": "MIPI DSI host data lane 0 negative signal."+ },+ {+ "number": "126",+ "name": "VSSDSI",+ "type": "power_in",+ "description": "DSI ground reference."+ },+ {+ "number": "127",+ "name": "DSIHOST_CKP",+ "type": "output",+ "description": "MIPI DSI host clock lane positive signal."+ },+ {+ "number": "128",+ "name": "DSIHOST_CKN",+ "type": "output",+ "description": "MIPI DSI host clock lane negative signal."+ },+ {+ "number": "129",+ "name": "VDD12DSI",+ "type": "power_in",+ "description": "DSI 1.2 V internal regulator output and PLL supply voltage."+ },+ {+ "number": "130",+ "name": "DSIHOST_D1P",+ "type": "output",+ "description": "MIPI DSI host data lane 1 positive signal."+ },+ {+ "number": "131",+ "name": "DSIHOST_D1N",+ "type": "output",+ "description": "MIPI DSI host data lane 1 negative signal."+ },+ {+ "number": "132",+ "name": "VSSDSI",+ "type": "power_in",+ "description": "DSI ground reference."+ },+ {+ "number": "133",+ "name": "PG2",+ "type": "output",+ "description": "Port G pin 2; can be configured as FMC_A12 or general-purpose I/O."+ },+ {+ "number": "134",+ "name": "PG3",+ "type": "output",+ "description": "Port G pin 3; can be configured as FMC_A13 or general-purpose I/O."+ },+ {+ "number": "135",+ "name": "PG4",+ "type": "output",+ "description": "Port G pin 4; can be configured as FMC_A14/FMC_BA0 or general-purpose I/O."+ },+ {+ "number": "136",+ "name": "PG5",+ "type": "output",+ "description": "Port G pin 5; can be configured as FMC_A15/FMC_BA1 or general-purpose I/O."+ },+ {+ "number": "137",+ "name": "PG6",+ "type": "output",+ "description": "Port G pin 6; can be configured as DCMI_D12, LCD_R7, or general-purpose I/O."+ },+ {+ "number": "138",+ "name": "PG7",+ "type": "output",+ "description": "Port G pin 7; can be configured as SAI1_MCLK_A, USART6_CK, FMC_INT, DCMI_D13, LCD_CLK, or general-purpose I/O."+ },+ {+ "number": "139",+ "name": "PG8",+ "type": "output",+ "description": "Port G pin 8; can be configured as SPI6_NSS, USART6_RTS, ETH_PPS_OUT, FMC_SDCLK, LCD_G7, or general-purpose I/O."+ },+ {+ "number": "140",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "141",+ "name": "VDDUSB",+ "type": "power_in",+ "description": "USB dedicated supply voltage (1.62 V to 3.6 V); can be independent from VDD for full-speed operation."+ },+ {+ "number": "142",+ "name": "PC6",+ "type": "output",+ "description": "Port C pin 6; can be configured as TIM3_CH1, TIM8_CH1, I2S2_MCK, USART6_TX, SDIO_D6, DCMI_D0, LCD_HSYNC, or general-purpose I/O."+ },+ {+ "number": "143",+ "name": "PC7",+ "type": "output",+ "description": "Port C pin 7; can be configured as TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, SDIO_D7, DCMI_D1, LCD_G6, or general-purpose I/O."+ },+ {+ "number": "144",+ "name": "PC8",+ "type": "output",+ "description": "Port C pin 8; can be configured as TRACED1, TIM3_CH3, TIM8_CH3, USART6_CK, SDIO_D0, DCMI_D2, or general-purpose I/O."+ },+ {+ "number": "145",+ "name": "PC9",+ "type": "output",+ "description": "Port C pin 9; can be configured as MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, QUADSPI_BK1_IO0, SDIO_D1, DCMI_D3, or general-purpose I/O."+ },+ {+ "number": "146",+ "name": "PA8",+ "type": "output",+ "description": "Port A pin 8; can be configured as MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, OTG_FS_SOF, LCD_R6, or general-purpose I/O."+ },+ {+ "number": "147",+ "name": "PA9",+ "type": "output",+ "description": "Port A pin 9; can be configured as TIM1_CH2, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX, DCMI_D0, or general-purpose I/O; OTG_FS_VBUS analog input."+ },+ {+ "number": "148",+ "name": "PA10",+ "type": "output",+ "description": "Port A pin 10; can be configured as TIM1_CH3, USART1_RX, OTG_FS_ID, DCMI_D1, or general-purpose I/O."+ },+ {+ "number": "149",+ "name": "PA11",+ "type": "output",+ "description": "Port A pin 11; can be configured as TIM1_CH4, USART1_CTS, CAN1_RX, OTG_FS_DM, LCD_R4, or general-purpose I/O."+ },+ {+ "number": "150",+ "name": "PA12",+ "type": "output",+ "description": "Port A pin 12; can be configured as TIM1_ETR, USART1_RTS, CAN1_TX, OTG_FS_DP, LCD_R5, or general-purpose I/O."+ },+ {+ "number": "151",+ "name": "PA13(JTMS-SWDIO)",+ "type": "output",+ "description": "Port A pin 13 / JTAG TMS / SWD I/O; shared between JTAG and SWD debug interfaces."+ },+ {+ "number": "152",+ "name": "VCAP2",+ "type": "passive",+ "description": "Decoupling capacitor pin for core voltage regulator; connect 4.7 µF ceramic capacitor to ground."+ },+ {+ "number": "153",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "154",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage 1.7 V to 3.6 V."+ },+ {+ "number": "155",+ "name": "PH13",+ "type": "output",+ "description": "Port H pin 13; can be configured as TIM8_CH1N, CAN1_TX, FMC_D21, LCD_G2, or general-purpose I/O."+ },+ {+ "number": "156",+ "name": "PH14",+ "type": "output",+ "description": "Port H pin 14; can be configured as TIM8_CH2N, FMC_D22, DCMI_D4, LCD_G3, or general-purpose I/O."+ },+ {+ "number": "157",+ "name": "PH15",+ "type": "output",+ "description": "Port H pin 15; can be configured as TIM8_CH3N, FMC_D23, DCMI_D11, LCD_G4, or general-purpose I/O."+ },+ {+ "number": "158",+ "name": "PI0",+ "type": "output",+ "description": "Port I pin 0; can be configured as TIM5_CH4, SPI2_NSS/I2S2_WS, FMC_D24, DCMI_D13, LCD_G5, or general-purpose I/O."+ },+ {+ "number": "159",+ "name": "PI1",+ "type": "output",+ "description": "Port I pin 1; can be configured as SPI2_SCK/I2S2_CK, FMC_D25, DCMI_D8, LCD_G6, or general-purpose I/O."+ },+ {+ "number": "160",+ "name": "PI2",+ "type": "output",+ "description": "Port I pin 2; can be configured as TIM8_CH4, SPI2_MISO, I2S2ext_SD, FMC_D26, DCMI_D9, LCD_G7, or general-purpose I/O."+ },+ {+ "number": "161",+ "name": "PI3",+ "type": "output",+ "description": "Port I pin 3; can be configured as TIM8_ETR, SPI2_MOSI/I2S2_SD, FMC_D27, DCMI_D10, or general-purpose I/O."+ },+ {+ "number": "162",+ "name": "PG9",+ "type": "output",+ "description": "Port G pin 9; can be configured as USART6_RX, QUADSPI_BK2_IO2, FMC_NE2/FMC_NCE, DCMI_VSYNC, or general-purpose I/O."+ },+ {+ "number": "163",+ "name": "PG10",+ "type": "output",+ "description": "Port G pin 10; can be configured as LCD_G3, FMC_NE3, DCMI_D2, LCD_B2, or general-purpose I/O."+ },+ {+ "number": "164",+ "name": "PG11",+ "type": "output",+ "description": "Port G pin 11; can be configured as ETH_MII_TX_EN/ETH_RMII_TX_EN, DCMI_D3, LCD_B3, or general-purpose I/O."+ },+ {+ "number": "165",+ "name": "PG12",+ "type": "output",+ "description": "Port G pin 12; can be configured as SPI6_MISO, USART6_RTS, LCD_B4, FMC_NE4, LCD_B1, or general-purpose I/O."+ },+ {+ "number": "166",+ "name": "PG13",+ "type": "output",+ "description": "Port G pin 13; can be configured as TRACED0, SPI6_SCK, USART6_CTS, ETH_MII_TXD0/ETH_RMII_TXD0, FMC_A24, LCD_R0, or general-purpose I/O."+ },+ {+ "number": "167",+ "name": "PG14",+ "type": "output",+ "description": "Port G pin 14; can be configured as TRACED1, SPI6_MOSI, USART6_TX, QUADSPI_BK2_IO3, ETH_MII_TXD1/ETH_RMII_TXD1, FMC_A25, LCD_B0, or general-purpose I/O."+ },+ {+ "number": "168",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "169",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage 1.7 V to 3.6 V."+ },+ {+ "number": "170",+ "name": "PA14(JTCK-SWCLK)",+ "type": "output",+ "description": "Port A pin 14 / JTAG TCK / SWD clock; shared between JTAG and SWD debug interfaces."+ },+ {+ "number": "171",+ "name": "PA15(JTDI)",+ "type": "output",+ "description": "Port A pin 15 / JTAG TDI; can also be configured as TIM2_CH1/TIM2_ETR, SPI1_NSS, SPI3_NSS/I2S3_WS, or general-purpose I/O."+ },+ {+ "number": "172",+ "name": "PC10",+ "type": "output",+ "description": "Port C pin 10; can be configured as SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDIO_D2, DCMI_D8, LCD_R2, or general-purpose I/O."+ },+ {+ "number": "173",+ "name": "PC11",+ "type": "output",+ "description": "Port C pin 11; can be configured as I2S3ext_SD, SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDIO_D3, DCMI_D4, or general-purpose I/O."+ },+ {+ "number": "174",+ "name": "PC12",+ "type": "output",+ "description": "Port C pin 12; can be configured as TRACED3, SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDIO_CK, DCMI_D9, or general-purpose I/O."+ },+ {+ "number": "175",+ "name": "PD0",+ "type": "output",+ "description": "Port D pin 0; can be configured as CAN1_RX, FMC_D2, or general-purpose I/O."+ },+ {+ "number": "176",+ "name": "PD1",+ "type": "output",+ "description": "Port D pin 1; can be configured as CAN1_TX, FMC_D3, or general-purpose I/O."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588858450910851072",+ "pages": 217,+ "sha256": "0a93578085d53c67",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 176,+ "described": 176,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}