component
STM32F429ZIT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
← Commit history
Publish 0.1.1
5 files changed
+510−499
README.md+132−132@@ -8,149 +8,149 @@ STM32F429ZIT6 from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin desc | Pin | Name | Type | Function | |---|---|---|---|-| 1 | PE2 | input | GPIO Port E pin 2, alternate functions include TRACECLK, SPI4_SCK, SAI1_MCLK_A, ETH_MII_TXD3, FMC_A23 |-| 2 | PE3 | input | GPIO Port E pin 3, alternate functions include TRACED0, SAI1_SD_B, FMC_A19 |-| 3 | PE4 | input | GPIO Port E pin 4, alternate functions include TRACED1, SPI4_NSS, SAI1_FS_A, FMC_A20, DCMI_D4, LCD_B0 |-| 4 | PE5 | input | GPIO Port E pin 5, alternate functions include TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, FMC_A21, DCMI_D6, LCD_G0 |-| 5 | PE6 | input | GPIO Port E pin 6, alternate functions include TRACED3, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, FMC_A22, DCMI_D7, LCD_G1 |+| 1 | PE2 | bidirectional | GPIO Port E pin 2, alternate functions include TRACECLK, SPI4_SCK, SAI1_MCLK_A, ETH_MII_TXD3, FMC_A23 |+| 2 | PE3 | bidirectional | GPIO Port E pin 3, alternate functions include TRACED0, SAI1_SD_B, FMC_A19 |+| 3 | PE4 | bidirectional | GPIO Port E pin 4, alternate functions include TRACED1, SPI4_NSS, SAI1_FS_A, FMC_A20, DCMI_D4, LCD_B0 |+| 4 | PE5 | bidirectional | GPIO Port E pin 5, alternate functions include TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, FMC_A21, DCMI_D6, LCD_G0 |+| 5 | PE6 | bidirectional | GPIO Port E pin 6, alternate functions include TRACED3, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, FMC_A22, DCMI_D7, LCD_G1 | | 6 | VBAT | power_in | Backup power supply for RTC and backup registers |-| 7 | PC13 | input | GPIO Port C pin 13, alternate function TAMP_1, through power switch with 3 mA max sink capability |-| 8 | PC14-OSC32_IN | input | GPIO Port C pin 14 or 32 kHz oscillator input, alternate functions include OSC32_IN |-| 9 | PC15-OSC32_OUT | output | GPIO Port C pin 15 or 32 kHz oscillator output, alternate functions include OSC32_OUT |-| 10 | PF0 | input | GPIO Port F pin 0, alternate functions include I2C2_SDA, FMC_A0 |-| 11 | PF1 | input | GPIO Port F pin 1, alternate functions include I2C2_SCL, FMC_A1 |-| 12 | PF2 | input | GPIO Port F pin 2, alternate functions include I2C2_SMBA, FMC_A2 |-| 13 | PF3 | input | GPIO Port F pin 3, alternate functions include FMC_A3, ADC3_IN9 |-| 14 | PF4 | input | GPIO Port F pin 4, alternate functions include FMC_A4, ADC3_IN14 |-| 15 | PF5 | input | GPIO Port F pin 5, alternate functions include FMC_A5, ADC3_IN15 |-| 16 | VSS | power_out | Ground (Negative supply) |+| 7 | PC13 | bidirectional | GPIO Port C pin 13, alternate function TAMP_1, through power switch with 3 mA max sink capability |+| 8 | PC14/OSC32_IN | bidirectional | GPIO Port C pin 14 or 32 kHz oscillator input, alternate functions include OSC32_IN |+| 9 | PC15/OSC32_OUT | bidirectional | GPIO Port C pin 15 or 32 kHz oscillator output, alternate functions include OSC32_OUT |+| 10 | PF0 | bidirectional | GPIO Port F pin 0, alternate functions include I2C2_SDA, FMC_A0 |+| 11 | PF1 | bidirectional | GPIO Port F pin 1, alternate functions include I2C2_SCL, FMC_A1 |+| 12 | PF2 | bidirectional | GPIO Port F pin 2, alternate functions include I2C2_SMBA, FMC_A2 |+| 13 | PF3 | bidirectional | GPIO Port F pin 3, alternate functions include FMC_A3, ADC3_IN9 |+| 14 | PF4 | bidirectional | GPIO Port F pin 4, alternate functions include FMC_A4, ADC3_IN14 |+| 15 | PF5 | bidirectional | GPIO Port F pin 5, alternate functions include FMC_A5, ADC3_IN15 |+| 16 | VSS | power_in | Ground (Negative supply) | | 17 | VDD | power_in | Positive supply voltage (1.7-3.6 V) |-| 18 | PF6 | input | GPIO Port F pin 6, alternate functions include TIM10_CH1, SPI5_NSS, SAI1_SD_B, UART7_RX, FMC_NIORD, ADC3_IN4 |-| 19 | PF7 | input | GPIO Port F pin 7, alternate functions include TIM11_CH1, SPI5_SCK, SAI1_MCLK_B, UART7_TX, FMC_NREG, ADC3_IN5 |-| 20 | PF8 | input | GPIO Port F pin 8, alternate functions include SPI5_MISO, SAI1_SCK_B, TIM13_CH1, FMC_NIOWR, ADC3_IN6 |-| 21 | PF9 | input | GPIO Port F pin 9, alternate functions include SPI5_MOSI, SAI1_FS_B, TIM14_CH1, FMC_CD, ADC3_IN7 |-| 22 | PF10 | input | GPIO Port F pin 10, alternate functions include FMC_INTR, DCMI_D11, LCD_DE, ADC3_IN8 |-| 23 | PH0-OSC_IN | input | GPIO Port H pin 0 or main oscillator input (4-26 MHz) |-| 24 | PH1-OSC_OUT | output | GPIO Port H pin 1 or main oscillator output |+| 18 | PF6 | bidirectional | GPIO Port F pin 6, alternate functions include TIM10_CH1, SPI5_NSS, SAI1_SD_B, UART7_RX, FMC_NIORD, ADC3_IN4 |+| 19 | PF7 | bidirectional | GPIO Port F pin 7, alternate functions include TIM11_CH1, SPI5_SCK, SAI1_MCLK_B, UART7_TX, FMC_NREG, ADC3_IN5 |+| 20 | PF8 | bidirectional | GPIO Port F pin 8, alternate functions include SPI5_MISO, SAI1_SCK_B, TIM13_CH1, FMC_NIOWR, ADC3_IN6 |+| 21 | PF9 | bidirectional | GPIO Port F pin 9, alternate functions include SPI5_MOSI, SAI1_FS_B, TIM14_CH1, FMC_CD, ADC3_IN7 |+| 22 | PF10 | bidirectional | GPIO Port F pin 10, alternate functions include FMC_INTR, DCMI_D11, LCD_DE, ADC3_IN8 |+| 23 | PH0/OSC_IN | bidirectional | GPIO Port H pin 0 or main oscillator input (4-26 MHz) |+| 24 | PH1/OSC_OUT | bidirectional | GPIO Port H pin 1 or main oscillator output | | 25 | NRST | input | Active low reset input with internal weak pull-up (40 kΩ typical) |-| 26 | PC0 | input | GPIO Port C pin 0, alternate functions include OTG_HS_ULPI_STP, FMC_SDNWE, ADC123_IN10 |-| 27 | PC1 | input | GPIO Port C pin 1, alternate functions include ETH_MDC, ADC123_IN11 |-| 28 | PC2 | input | GPIO Port C pin 2, alternate functions include SPI2_MISO, I2S2ext_SD, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0, ADC123_IN12 |-| 29 | PC3 | input | GPIO Port C pin 3, alternate functions include SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0, ADC123_IN13 |-| 30 | PC4 | input | GPIO Port C pin 4, alternate functions include ETH_MII_RXD0/ETH_RMII_RXD0, ADC12_IN14 |-| 31 | PC5 | input | GPIO Port C pin 5, alternate functions include ETH_MII_RXD1/ETH_RMII_RXD1, ADC12_IN15 |-| 32 | PB0 | input | GPIO Port B pin 0, alternate functions include TIM1_CH2N, TIM3_CH3, TIM8_CH2N, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2, ADC12_IN8 |-| 33 | PB1 | input | GPIO Port B pin 1, alternate functions include TIM1_CH3N, TIM3_CH4, TIM8_CH3N, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3, ADC12_IN9 |-| 34 | PB2-BOOT1 | input | GPIO Port B pin 2 or boot selection from NAND Flash |-| 35 | PA0-WKUP | input | GPIO Port A pin 0 or wakeup input, alternate functions include TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, ETH_MII_CRS, ADC123_IN0 |-| 36 | PA1 | input | GPIO Port A pin 1, alternate functions include TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, ETH_MII_RX_CLK/ETH_RMII_REF_CLK, ADC123_IN1 |-| 37 | PA2 | input | GPIO Port A pin 2, alternate functions include TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, ETH_MDIO, ADC123_IN2 |-| 38 | PA3 | input | GPIO Port A pin 3, alternate functions include TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5, ADC123_IN3 |-| 39 | PA4 | input | GPIO Port A pin 4 (TTa structure), alternate functions include SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC, ADC12_IN4/DAC_OUT1 |-| 40 | PA5 | input | GPIO Port A pin 5 (TTa structure), alternate functions include TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK, OTG_HS_ULPI_CK, ADC12_IN5/DAC_OUT2 |-| 41 | PA6 | input | GPIO Port A pin 6, alternate functions include TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM13_CH1, DCMI_PIXCLK, LCD_G2, ADC12_IN6 |-| 42 | PA7 | input | GPIO Port A pin 7, alternate functions include TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM14_CH1, ETH_MII_RX_DV/ETH_RMII_CRS_DV, ADC12_IN7 |-| 43 | VDD | power_in | Positive supply voltage (1.7-3.6 V) |-| 44 | VSS | power_out | Ground (Negative supply) |-| 45 | BYPASS_REG | input | Bypass resistor control for internal voltage regulator |-| 46 | VDD | power_in | Positive supply voltage (1.7-3.6 V) |-| 47 | PA4 | input | GPIO Port A pin 4, alternate functions include SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC, ADC12_IN4/DAC_OUT1 |-| 48 | PA5 | input | GPIO Port A pin 5, alternate functions include TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK, OTG_HS_ULPI_CK, ADC12_IN5/DAC_OUT2 |-| 49 | PA6 | input | GPIO Port A pin 6, alternate functions include TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM13_CH1, DCMI_PIXCLK, LCD_G2, ADC12_IN6 |-| 50 | PA7 | input | GPIO Port A pin 7, alternate functions include TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM14_CH1, ETH_MII_RX_DV/ETH_RMII_CRS_DV, ADC12_IN7 |-| 51 | VSS | power_out | Ground (Negative supply) |+| 26 | PC0 | bidirectional | GPIO Port C pin 0, alternate functions include OTG_HS_ULPI_STP, FMC_SDNWE, ADC123_IN10 |+| 27 | PC1 | bidirectional | GPIO Port C pin 1, alternate functions include ETH_MDC, ADC123_IN11 |+| 28 | PC2 | bidirectional | GPIO Port C pin 2, alternate functions include SPI2_MISO, I2S2ext_SD, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0, ADC123_IN12 |+| 29 | PC3 | bidirectional | GPIO Port C pin 3, alternate functions include SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0, ADC123_IN13 |+| 30 | VDD | power_in | Positive supply voltage (1.7-3.6 V) |+| 31 | VSSA | power_in | |+| 32 | VREF+ | power_in | |+| 33 | VDDA | power_in | |+| 34 | PA0/WKUP | bidirectional | GPIO Port A pin 0 or wakeup input, alternate functions include TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, ETH_MII_CRS, ADC123_IN0 |+| 35 | PA1 | bidirectional | GPIO Port A pin 1, alternate functions include TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, ETH_MII_RX_CLK/ETH_RMII_REF_CLK, ADC123_IN1 |+| 36 | PA2 | bidirectional | GPIO Port A pin 2, alternate functions include TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, ETH_MDIO, ADC123_IN2 |+| 37 | PA3 | bidirectional | GPIO Port A pin 3, alternate functions include TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5, ADC123_IN3 |+| 38 | VSS | power_in | Ground (Negative supply) |+| 39 | VDD | power_in | Positive supply voltage (1.7-3.6 V) |+| 40 | PA4 | bidirectional | GPIO Port A pin 4, alternate functions include SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC, ADC12_IN4/DAC_OUT1 |+| 41 | PA5 | bidirectional | GPIO Port A pin 5, alternate functions include TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK, OTG_HS_ULPI_CK, ADC12_IN5/DAC_OUT2 |+| 42 | PA6 | bidirectional | GPIO Port A pin 6, alternate functions include TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM13_CH1, DCMI_PIXCLK, LCD_G2, ADC12_IN6 |+| 43 | PA7 | bidirectional | GPIO Port A pin 7, alternate functions include TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM14_CH1, ETH_MII_RX_DV/ETH_RMII_CRS_DV, ADC12_IN7 |+| 44 | PC4 | bidirectional | GPIO Port C pin 4, alternate functions include ETH_MII_RXD0/ETH_RMII_RXD0, ADC12_IN14 |+| 45 | PC5 | bidirectional | GPIO Port C pin 5, alternate functions include ETH_MII_RXD1/ETH_RMII_RXD1, ADC12_IN15 |+| 46 | PB0 | bidirectional | GPIO Port B pin 0, alternate functions include TIM1_CH2N, TIM3_CH3, TIM8_CH2N, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2, ADC12_IN8 |+| 47 | PB1 | bidirectional | GPIO Port B pin 1, alternate functions include TIM1_CH3N, TIM3_CH4, TIM8_CH3N, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3, ADC12_IN9 |+| 48 | PB2/BOOT1 | bidirectional | GPIO Port B pin 2 or boot selection from NAND Flash |+| 49 | PF11 | bidirectional | |+| 50 | PF12 | bidirectional | |+| 51 | VSS | power_in | Ground (Negative supply) | | 52 | VDD | power_in | Positive supply voltage (1.7-3.6 V) |-| 53 | PA4 | input | GPIO Port A pin 4, alternate functions include SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC, ADC12_IN4/DAC_OUT1 |-| 54 | PA5 | input | GPIO Port A pin 5, alternate functions include TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK, OTG_HS_ULPI_CK, ADC12_IN5/DAC_OUT2 |-| 55 | PA6 | input | GPIO Port A pin 6, alternate functions include TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM13_CH1, DCMI_PIXCLK, LCD_G2, ADC12_IN6 |-| 56 | PA7 | input | GPIO Port A pin 7, alternate functions include TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM14_CH1, ETH_MII_RX_DV/ETH_RMII_CRS_DV, ADC12_IN7 |-| 57 | PE7 | input | GPIO Port E pin 7, alternate functions include TIM1_ETR, UART7_RX, FMC_D4 |-| 58 | PE8 | input | GPIO Port E pin 8, alternate functions include TIM1_CH1N, UART7_TX, FMC_D5 |-| 59 | PE9 | input | GPIO Port E pin 9, alternate functions include TIM1_CH1, FMC_D6 |-| 60 | VSS | power_out | Ground (Negative supply) |-| 61 | VDD | power_in | Positive supply voltage (1.7-3.6 V) |-| 62 | PE10 | input | GPIO Port E pin 10, alternate functions include TIM1_CH2N, FMC_D7 |-| 63 | PE11 | input | GPIO Port E pin 11, alternate functions include TIM1_CH2, SPI4_NSS, FMC_D8, LCD_G3 |-| 64 | PE12 | input | GPIO Port E pin 12, alternate functions include TIM1_CH3N, SPI4_SCK, FMC_D9, LCD_B4 |-| 65 | PE13 | input | GPIO Port E pin 13, alternate functions include TIM1_CH3, SPI4_MISO, FMC_D10, LCD_DE |-| 66 | PE14 | input | GPIO Port E pin 14, alternate functions include TIM1_CH4, SPI4_MOSI, FMC_D11, LCD_CLK |-| 67 | PE15 | input | GPIO Port E pin 15, alternate functions include TIM1_BKIN, FMC_D12, LCD_R7 |-| 68 | PB10 | input | GPIO Port B pin 10, alternate functions include TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4 |-| 69 | PB11 | input | GPIO Port B pin 11, alternate functions include TIM2_CH4, I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN, LCD_G5 |-| 70 | VCAP_1 | passive | Capacitive load connection for internal voltage regulator (2.2 µF ceramic capacitor required) |-| 71 | VSS | power_out | Ground (Negative supply) |+| 53 | PF13 | bidirectional | |+| 54 | PF14 | bidirectional | |+| 55 | PF15 | bidirectional | |+| 56 | PG0 | bidirectional | |+| 57 | PG1 | bidirectional | |+| 58 | PE7 | bidirectional | GPIO Port E pin 7, alternate functions include TIM1_ETR, UART7_RX, FMC_D4 |+| 59 | PE8 | bidirectional | GPIO Port E pin 8, alternate functions include TIM1_CH1N, UART7_TX, FMC_D5 |+| 60 | PE9 | bidirectional | GPIO Port E pin 9, alternate functions include TIM1_CH1, FMC_D6 |+| 61 | VSS | power_in | Ground (Negative supply) |+| 62 | VDD | power_in | Positive supply voltage (1.7-3.6 V) |+| 63 | PE10 | bidirectional | GPIO Port E pin 10, alternate functions include TIM1_CH2N, FMC_D7 |+| 64 | PE11 | bidirectional | GPIO Port E pin 11, alternate functions include TIM1_CH2, SPI4_NSS, FMC_D8, LCD_G3 |+| 65 | PE12 | bidirectional | GPIO Port E pin 12, alternate functions include TIM1_CH3N, SPI4_SCK, FMC_D9, LCD_B4 |+| 66 | PE13 | bidirectional | GPIO Port E pin 13, alternate functions include TIM1_CH3, SPI4_MISO, FMC_D10, LCD_DE |+| 67 | PE14 | bidirectional | GPIO Port E pin 14, alternate functions include TIM1_CH4, SPI4_MOSI, FMC_D11, LCD_CLK |+| 68 | PE15 | bidirectional | GPIO Port E pin 15, alternate functions include TIM1_BKIN, FMC_D12, LCD_R7 |+| 69 | PB10 | bidirectional | GPIO Port B pin 10, alternate functions include TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4 |+| 70 | PB11 | bidirectional | GPIO Port B pin 11, alternate functions include TIM2_CH4, I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN, LCD_G5 |+| 71 | VCAP_1 | power_in | Capacitive load connection for internal voltage regulator (2.2 µF ceramic capacitor required) | | 72 | VDD | power_in | Positive supply voltage (1.7-3.6 V) |-| 73 | PB12 | input | GPIO Port B pin 12, alternate functions include TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0, OTG_HS_ID |-| 74 | PB13 | input | GPIO Port B pin 13, alternate functions include TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1, OTG_HS_VBUS |-| 75 | PB14 | input | GPIO Port B pin 14, alternate functions include TIM1_CH2N, TIM8_CH2N, SPI2_MISO, I2S2ext_SD, USART3_RTS, TIM12_CH1, OTG_HS_DM |-| 76 | PB15 | input | GPIO Port B pin 15, alternate functions include RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI/I2S2_SD, TIM12_CH2, OTG_HS_DP |-| 77 | PD8 | input | GPIO Port D pin 8, alternate functions include USART3_TX, FMC_D13 |-| 78 | PD9 | input | GPIO Port D pin 9, alternate functions include USART3_RX, FMC_D14 |-| 79 | PD10 | input | GPIO Port D pin 10, alternate functions include USART3_CK, FMC_D15, LCD_B3 |-| 80 | PD11 | input | GPIO Port D pin 11, alternate functions include USART3_CTS, FMC_A16 |-| 81 | PD12 | input | GPIO Port D pin 12, alternate functions include TIM4_CH1, USART3_RTS, FMC_A17 |-| 82 | PD13 | input | GPIO Port D pin 13, alternate functions include TIM4_CH2, FMC_A18 |-| 83 | VSS | power_out | Ground (Negative supply) |+| 73 | PB12 | bidirectional | GPIO Port B pin 12, alternate functions include TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0, OTG_HS_ID |+| 74 | PB13 | bidirectional | GPIO Port B pin 13, alternate functions include TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1, OTG_HS_VBUS |+| 75 | PB14 | bidirectional | GPIO Port B pin 14, alternate functions include TIM1_CH2N, TIM8_CH2N, SPI2_MISO, I2S2ext_SD, USART3_RTS, TIM12_CH1, OTG_HS_DM |+| 76 | PB15 | bidirectional | GPIO Port B pin 15, alternate functions include RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI/I2S2_SD, TIM12_CH2, OTG_HS_DP |+| 77 | PD8 | bidirectional | GPIO Port D pin 8, alternate functions include USART3_TX, FMC_D13 |+| 78 | PD9 | bidirectional | GPIO Port D pin 9, alternate functions include USART3_RX, FMC_D14 |+| 79 | PD10 | bidirectional | GPIO Port D pin 10, alternate functions include USART3_CK, FMC_D15, LCD_B3 |+| 80 | PD11 | bidirectional | GPIO Port D pin 11, alternate functions include USART3_CTS, FMC_A16 |+| 81 | PD12 | bidirectional | GPIO Port D pin 12, alternate functions include TIM4_CH1, USART3_RTS, FMC_A17 |+| 82 | PD13 | bidirectional | GPIO Port D pin 13, alternate functions include TIM4_CH2, FMC_A18 |+| 83 | VSS | power_in | Ground (Negative supply) | | 84 | VDD | power_in | Positive supply voltage (1.7-3.6 V) |-| 85 | PD14 | input | GPIO Port D pin 14, alternate functions include TIM4_CH3, FMC_D0 |-| 86 | PD15 | input | GPIO Port D pin 15, alternate functions include TIM4_CH4, FMC_D1 |-| 87 | PG2 | input | GPIO Port G pin 2, alternate functions include FMC_A12 |-| 88 | PG3 | input | GPIO Port G pin 3, alternate functions include FMC_A13 |-| 89 | PG4 | input | GPIO Port G pin 4, alternate functions include FMC_A14/FMC_BA0 |-| 90 | PG5 | input | GPIO Port G pin 5, alternate functions include FMC_A15/FMC_BA1 |-| 91 | PG6 | input | GPIO Port G pin 6, alternate functions include FMC_INT2, DCMI_D12, LCD_R7 |-| 92 | PG7 | input | GPIO Port G pin 7, alternate functions include USART6_CK, FMC_INT3, DCMI_D13, LCD_CLK |-| 93 | PG8 | input | GPIO Port G pin 8, alternate functions include SPI6_NSS, USART6_RTS, ETH_PPS_OUT, FMC_SDCLK |-| 94 | VSS | power_out | Ground (Negative supply) |+| 85 | PD14 | bidirectional | GPIO Port D pin 14, alternate functions include TIM4_CH3, FMC_D0 |+| 86 | PD15 | bidirectional | GPIO Port D pin 15, alternate functions include TIM4_CH4, FMC_D1 |+| 87 | PG2 | bidirectional | GPIO Port G pin 2, alternate functions include FMC_A12 |+| 88 | PG3 | bidirectional | GPIO Port G pin 3, alternate functions include FMC_A13 |+| 89 | PG4 | bidirectional | GPIO Port G pin 4, alternate functions include FMC_A14/FMC_BA0 |+| 90 | PG5 | bidirectional | GPIO Port G pin 5, alternate functions include FMC_A15/FMC_BA1 |+| 91 | PG6 | bidirectional | GPIO Port G pin 6, alternate functions include FMC_INT2, DCMI_D12, LCD_R7 |+| 92 | PG7 | bidirectional | GPIO Port G pin 7, alternate functions include USART6_CK, FMC_INT3, DCMI_D13, LCD_CLK |+| 93 | PG8 | bidirectional | GPIO Port G pin 8, alternate functions include SPI6_NSS, USART6_RTS, ETH_PPS_OUT, FMC_SDCLK |+| 94 | VSS | power_in | Ground (Negative supply) | | 95 | VDD | power_in | Positive supply voltage (1.7-3.6 V) |-| 96 | PC6 | input | GPIO Port C pin 6, alternate functions include TIM3_CH1, TIM8_CH1, I2S2_MCK, USART6_TX, SDIO_D6, DCMI_D0, LCD_HSYNC |-| 97 | PC7 | input | GPIO Port C pin 7, alternate functions include TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, SDIO_D7, DCMI_D1, LCD_G6 |-| 98 | PC8 | input | GPIO Port C pin 8, alternate functions include TIM3_CH3, TIM8_CH3, USART6_CK, SDIO_D0, DCMI_D2 |-| 99 | PC9 | input | GPIO Port C pin 9, alternate functions include MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, SDIO_D1, DCMI_D3 |-| 100 | PA8 | input | GPIO Port A pin 8, alternate functions include MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, OTG_FS_SOF, LCD_R6 |-| 101 | PA9 | input | GPIO Port A pin 9, alternate functions include TIM1_CH2, I2C3_SMBA, USART1_TX, DCMI_D0, OTG_FS_VBUS |-| 102 | PA10 | input | GPIO Port A pin 10, alternate functions include TIM1_CH3, USART1_RX, OTG_FS_ID, DCMI_D1 |-| 103 | PA11 | input | GPIO Port A pin 11, alternate functions include TIM1_CH4, USART1_CTS, CAN1_RX, LCD_R4, OTG_FS_DM |-| 104 | PA12 | input | GPIO Port A pin 12, alternate functions include TIM1_ETR, USART1_RTS, CAN1_TX, LCD_R5, OTG_FS_DP |-| 105 | PA13 | input | GPIO Port A pin 13, alternate functions include JTMS-SWDIO debug interface |-| 106 | VCAP_2 | passive | Capacitive load connection for internal voltage regulator (2.2 µF ceramic capacitor required) |-| 107 | VSS | power_out | Ground (Negative supply) |+| 96 | PC6 | bidirectional | GPIO Port C pin 6, alternate functions include TIM3_CH1, TIM8_CH1, I2S2_MCK, USART6_TX, SDIO_D6, DCMI_D0, LCD_HSYNC |+| 97 | PC7 | bidirectional | GPIO Port C pin 7, alternate functions include TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, SDIO_D7, DCMI_D1, LCD_G6 |+| 98 | PC8 | bidirectional | GPIO Port C pin 8, alternate functions include TIM3_CH3, TIM8_CH3, USART6_CK, SDIO_D0, DCMI_D2 |+| 99 | PC9 | bidirectional | GPIO Port C pin 9, alternate functions include MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, SDIO_D1, DCMI_D3 |+| 100 | PA8 | bidirectional | GPIO Port A pin 8, alternate functions include MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, OTG_FS_SOF, LCD_R6 |+| 101 | PA9 | bidirectional | GPIO Port A pin 9, alternate functions include TIM1_CH2, I2C3_SMBA, USART1_TX, DCMI_D0, OTG_FS_VBUS |+| 102 | PA10 | bidirectional | GPIO Port A pin 10, alternate functions include TIM1_CH3, USART1_RX, OTG_FS_ID, DCMI_D1 |+| 103 | PA11 | bidirectional | GPIO Port A pin 11, alternate functions include TIM1_CH4, USART1_CTS, CAN1_RX, LCD_R4, OTG_FS_DM |+| 104 | PA12 | bidirectional | GPIO Port A pin 12, alternate functions include TIM1_ETR, USART1_RTS, CAN1_TX, LCD_R5, OTG_FS_DP |+| 105 | PA13 | bidirectional | GPIO Port A pin 13, alternate functions include JTMS-SWDIO debug interface |+| 106 | VCAP_2 | power_in | Capacitive load connection for internal voltage regulator (2.2 µF ceramic capacitor required) |+| 107 | VSS | power_in | Ground (Negative supply) | | 108 | VDD | power_in | Positive supply voltage (1.7-3.6 V) |-| 109 | PA14 | input | GPIO Port A pin 14, alternate functions include JTCK-SWCLK debug interface |-| 110 | PA15 | input | GPIO Port A pin 15, alternate functions include JTDI debug interface, TIM2_CH1/TIM2_ETR, SPI1_NSS, SPI3_NSS/I2S3_WS |-| 111 | PC10 | input | GPIO Port C pin 10, alternate functions include SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, SDIO_D2, DCMI_D8, LCD_R2 |-| 112 | PC11 | input | GPIO Port C pin 11, alternate functions include I2S3ext_SD, SPI3_MISO, USART3_RX, UART4_RX, SDIO_D3, DCMI_D4 |-| 113 | PC12 | input | GPIO Port C pin 12, alternate functions include SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDIO_CK, DCMI_D9 |-| 114 | PD0 | input | GPIO Port D pin 0, alternate functions include CAN1_RX, FMC_D2 |-| 115 | PD1 | input | GPIO Port D pin 1, alternate functions include CAN1_TX, FMC_D3 |-| 116 | PD2 | input | GPIO Port D pin 2, alternate functions include TIM3_ETR, UART5_RX, SDIO_CMD, DCMI_D11 |-| 117 | PD3 | input | GPIO Port D pin 3, alternate functions include SPI2_SCK/I2S2_CK, USART2_CTS, FMC_CLK, DCMI_D5, LCD_G7 |-| 118 | PD4 | input | GPIO Port D pin 4, alternate functions include USART2_RTS, FMC_NOE |-| 119 | PD5 | input | GPIO Port D pin 5, alternate functions include USART2_TX, FMC_NWE |-| 120 | VSS | power_out | Ground (Negative supply) |+| 109 | PA14 | bidirectional | GPIO Port A pin 14, alternate functions include JTCK-SWCLK debug interface |+| 110 | PA15 | bidirectional | GPIO Port A pin 15, alternate functions include JTDI debug interface, TIM2_CH1/TIM2_ETR, SPI1_NSS, SPI3_NSS/I2S3_WS |+| 111 | PC10 | bidirectional | GPIO Port C pin 10, alternate functions include SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, SDIO_D2, DCMI_D8, LCD_R2 |+| 112 | PC11 | bidirectional | GPIO Port C pin 11, alternate functions include I2S3ext_SD, SPI3_MISO, USART3_RX, UART4_RX, SDIO_D3, DCMI_D4 |+| 113 | PC12 | bidirectional | GPIO Port C pin 12, alternate functions include SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDIO_CK, DCMI_D9 |+| 114 | PD0 | bidirectional | GPIO Port D pin 0, alternate functions include CAN1_RX, FMC_D2 |+| 115 | PD1 | bidirectional | GPIO Port D pin 1, alternate functions include CAN1_TX, FMC_D3 |+| 116 | PD2 | bidirectional | GPIO Port D pin 2, alternate functions include TIM3_ETR, UART5_RX, SDIO_CMD, DCMI_D11 |+| 117 | PD3 | bidirectional | GPIO Port D pin 3, alternate functions include SPI2_SCK/I2S2_CK, USART2_CTS, FMC_CLK, DCMI_D5, LCD_G7 |+| 118 | PD4 | bidirectional | GPIO Port D pin 4, alternate functions include USART2_RTS, FMC_NOE |+| 119 | PD5 | bidirectional | GPIO Port D pin 5, alternate functions include USART2_TX, FMC_NWE |+| 120 | VSS | power_in | Ground (Negative supply) | | 121 | VDD | power_in | Positive supply voltage (1.7-3.6 V) |-| 122 | PD6 | input | GPIO Port D pin 6, alternate functions include SPI3_MOSI/I2S3_SD, SAI1_SD_A, USART2_RX, FMC_NWAIT, DCMI_D10, LCD_B2 |-| 123 | PD7 | input | GPIO Port D pin 7, alternate functions include USART2_CK, FMC_NE1/FMC_NCE2 |-| 124 | PG9 | input | GPIO Port G pin 9, alternate functions include USART6_RX, FMC_NE2/FMC_NCE3, DCMI_VSYNC |-| 125 | PG10 | input | GPIO Port G pin 10, alternate functions include LCD_G3, FMC_NCE4_1/FMC_NE3, DCMI_D2, LCD_B2 |-| 126 | PG11 | input | GPIO Port G pin 11, alternate functions include ETH_MII_TX_EN/ETH_RMII_TX_EN, FMC_NCE4_2, DCMI_D3, LCD_B3 |-| 127 | PG12 | input | GPIO Port G pin 12, alternate functions include SPI6_MISO, USART6_RTS, LCD_B4, FMC_NE4, LCD_B1 |-| 128 | PG13 | input | GPIO Port G pin 13, alternate functions include SPI6_SCK, USART6_CTS, ETH_MII_TXD0/ETH_RMII_TXD0, FMC_A24 |-| 129 | PG14 | input | GPIO Port G pin 14, alternate functions include SPI6_MOSI, USART6_TX, ETH_MII_TXD1/ETH_RMII_TXD1, FMC_A25 |-| 130 | VSS | power_out | Ground (Negative supply) |+| 122 | PD6 | bidirectional | GPIO Port D pin 6, alternate functions include SPI3_MOSI/I2S3_SD, SAI1_SD_A, USART2_RX, FMC_NWAIT, DCMI_D10, LCD_B2 |+| 123 | PD7 | bidirectional | GPIO Port D pin 7, alternate functions include USART2_CK, FMC_NE1/FMC_NCE2 |+| 124 | PG9 | bidirectional | GPIO Port G pin 9, alternate functions include USART6_RX, FMC_NE2/FMC_NCE3, DCMI_VSYNC |+| 125 | PG10 | bidirectional | GPIO Port G pin 10, alternate functions include LCD_G3, FMC_NCE4_1/FMC_NE3, DCMI_D2, LCD_B2 |+| 126 | PG11 | bidirectional | GPIO Port G pin 11, alternate functions include ETH_MII_TX_EN/ETH_RMII_TX_EN, FMC_NCE4_2, DCMI_D3, LCD_B3 |+| 127 | PG12 | bidirectional | GPIO Port G pin 12, alternate functions include SPI6_MISO, USART6_RTS, LCD_B4, FMC_NE4, LCD_B1 |+| 128 | PG13 | bidirectional | GPIO Port G pin 13, alternate functions include SPI6_SCK, USART6_CTS, ETH_MII_TXD0/ETH_RMII_TXD0, FMC_A24 |+| 129 | PG14 | bidirectional | GPIO Port G pin 14, alternate functions include SPI6_MOSI, USART6_TX, ETH_MII_TXD1/ETH_RMII_TXD1, FMC_A25 |+| 130 | VSS | power_in | Ground (Negative supply) | | 131 | VDD | power_in | Positive supply voltage (1.7-3.6 V) |-| 132 | PG15 | input | GPIO Port G pin 15, alternate functions include USART6_CTS, FMC_SDNCAS, DCMI_D13 |-| 133 | PB3 | input | GPIO Port B pin 3, alternate functions include JTDO/TRACESWO debug interface, TIM2_CH2, SPI1_SCK, SPI3_SCK/I2S3_CK |-| 134 | PB4 | input | GPIO Port B pin 4, alternate functions include NJTRST debug interface, TIM3_CH1, SPI1_MISO, SPI3_MISO, I2S3ext_SD |-| 135 | PB5 | input | GPIO Port B pin 5, alternate functions include TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI/I2S3_SD, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1, DCMI_D10 |-| 136 | PB6 | input | GPIO Port B pin 6, alternate functions include TIM4_CH1, I2C1_SCL, USART1_TX, CAN2_TX, FMC_SDNE1, DCMI_D5 |-| 137 | PB7 | input | GPIO Port B pin 7, alternate functions include TIM4_CH2, I2C1_SDA, USART1_RX, FMC_NL, DCMI_VSYNC |+| 132 | PG15 | bidirectional | GPIO Port G pin 15, alternate functions include USART6_CTS, FMC_SDNCAS, DCMI_D13 |+| 133 | PB3 | bidirectional | GPIO Port B pin 3, alternate functions include JTDO/TRACESWO debug interface, TIM2_CH2, SPI1_SCK, SPI3_SCK/I2S3_CK |+| 134 | PB4 | bidirectional | GPIO Port B pin 4, alternate functions include NJTRST debug interface, TIM3_CH1, SPI1_MISO, SPI3_MISO, I2S3ext_SD |+| 135 | PB5 | bidirectional | GPIO Port B pin 5, alternate functions include TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI/I2S3_SD, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1, DCMI_D10 |+| 136 | PB6 | bidirectional | GPIO Port B pin 6, alternate functions include TIM4_CH1, I2C1_SCL, USART1_TX, CAN2_TX, FMC_SDNE1, DCMI_D5 |+| 137 | PB7 | bidirectional | GPIO Port B pin 7, alternate functions include TIM4_CH2, I2C1_SDA, USART1_RX, FMC_NL, DCMI_VSYNC | | 138 | BOOT0 | input | Boot selection pin for choosing between Flash, system memory, or embedded SRAM |-| 139 | PB8 | input | GPIO Port B pin 8, alternate functions include TIM4_CH3, TIM10_CH1, I2C1_SCL, CAN1_RX, ETH_MII_TXD3, SDIO_D4, DCMI_D6, LCD_B6 |-| 140 | PB9 | input | GPIO Port B pin 9, alternate functions include TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, CAN1_TX, SDIO_D5, DCMI_D7, LCD_B7 |-| 141 | PE0 | input | GPIO Port E pin 0, alternate functions include TIM4_ETR, UART8_RX, FMC_NBL0, DCMI_D2 |-| 142 | PE1 | input | GPIO Port E pin 1, alternate functions include UART8_TX, FMC_NBL1, DCMI_D3 |-| 143 | VSS | power_out | Ground (Negative supply) |+| 139 | PB8 | bidirectional | GPIO Port B pin 8, alternate functions include TIM4_CH3, TIM10_CH1, I2C1_SCL, CAN1_RX, ETH_MII_TXD3, SDIO_D4, DCMI_D6, LCD_B6 |+| 140 | PB9 | bidirectional | GPIO Port B pin 9, alternate functions include TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, CAN1_TX, SDIO_D5, DCMI_D7, LCD_B7 |+| 141 | PE0 | bidirectional | GPIO Port E pin 0, alternate functions include TIM4_ETR, UART8_RX, FMC_NBL0, DCMI_D2 |+| 142 | PE1 | bidirectional | GPIO Port E pin 1, alternate functions include UART8_TX, FMC_NBL1, DCMI_D3 |+| 143 | PDR_ON | input | | | 144 | VDD | power_in | Positive supply voltage (1.7-3.6 V) | ## Key specifications
package.json+2−2@@ -1,6 +1,6 @@ { "slug": "stm32f429zit6",- "version": "0.1.0",+ "version": "0.1.1", "type": "component", "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.", "tags": [@@ -949,4 +949,4 @@ "footprint": "viewers/footprint.html" } }-}+}
page.json+4−4@@ -4,7 +4,7 @@ "slug": "stm32f429zit6", "title": "STM32F429ZIT6", "brief": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.1.1", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -976,7 +976,7 @@ "viewers/symbol.html", "viewers/footprint.html" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "org": "adom" }
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rot="R180"/>- <pin name="PB9" x="17.78" y="78.74" length="middle" direction="in" rot="R180"/>- <pin name="PB8" x="17.78" y="76.2" length="middle" direction="in" rot="R180"/>+ <pin name="PDR_ON" x="17.78" y="86.36" length="middle" direction="in" rot="R180"/>+ <pin name="PE1" x="17.78" y="83.82" length="middle" direction="io" rot="R180"/>+ <pin name="PE0" x="17.78" y="81.28" length="middle" direction="io" rot="R180"/>+ <pin name="PB9" x="17.78" y="78.74" length="middle" direction="io" rot="R180"/>+ <pin name="PB8" x="17.78" y="76.2" length="middle" direction="io" rot="R180"/> <pin name="BOOT0" x="17.78" y="73.66" length="middle" direction="in" rot="R180"/>- <pin name="PB7" x="17.78" y="71.12" length="middle" direction="in" rot="R180"/>- <pin name="PB6" x="17.78" y="68.58" length="middle" direction="in" rot="R180"/>- <pin name="PB5" x="17.78" y="66.04" length="middle" direction="in" rot="R180"/>- <pin name="PB4" x="17.78" y="63.5" length="middle" direction="in" rot="R180"/>- <pin name="PB3" x="17.78" y="60.96" length="middle" direction="in" rot="R180"/>- <pin name="PG15" x="17.78" y="58.42" length="middle" direction="in" rot="R180"/>+ <pin name="PB7" x="17.78" y="71.12" length="middle" direction="io" rot="R180"/>+ <pin name="PB6" x="17.78" y="68.58" length="middle" direction="io" rot="R180"/>+ <pin name="PB5" x="17.78" y="66.04" length="middle" direction="io" rot="R180"/>+ <pin name="PB4" x="17.78" y="63.5" length="middle" direction="io" rot="R180"/>+ <pin name="PB3" x="17.78" y="60.96" length="middle" direction="io" rot="R180"/>+ <pin name="PG15" x="17.78" y="58.42" length="middle" direction="io" rot="R180"/> <pin name="VDD@8" x="17.78" y="55.88" length="middle" direction="pwr" rot="R180"/>- <pin name="VSS@7" x="17.78" y="53.34" length="middle" direction="out" rot="R180"/>- <pin name="PG14" x="17.78" y="50.8" length="middle" direction="in" rot="R180"/>- <pin name="PG13" x="17.78" y="48.26" length="middle" direction="in" rot="R180"/>- <pin name="PG12" x="17.78" y="45.72" length="middle" direction="in" rot="R180"/>- <pin name="PG11" x="17.78" y="43.18" length="middle" direction="in" rot="R180"/>- <pin name="PG10" x="17.78" y="40.64" length="middle" direction="in" rot="R180"/>- <pin name="PG9" x="17.78" y="38.1" length="middle" direction="in" rot="R180"/>- <pin name="PD7" x="17.78" y="35.56" length="middle" direction="in" rot="R180"/>- <pin name="PD6" x="17.78" y="33.02" length="middle" direction="in" rot="R180"/>+ <pin name="VSS@5" x="17.78" y="53.34" length="middle" direction="pwr" rot="R180"/>+ <pin name="PG14" x="17.78" y="50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PG13" x="17.78" y="48.26" length="middle" direction="io" rot="R180"/>+ <pin name="PG12" x="17.78" y="45.72" length="middle" direction="io" rot="R180"/>+ <pin name="PG11" x="17.78" y="43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PG10" x="17.78" y="40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PG9" x="17.78" y="38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PD7" x="17.78" y="35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PD6" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/> <pin name="VDD@9" x="17.78" y="30.48" length="middle" direction="pwr" rot="R180"/>- <pin name="VSS@8" x="17.78" y="27.94" length="middle" direction="out" rot="R180"/>- <pin name="PD5" x="17.78" y="25.4" length="middle" direction="in" rot="R180"/>- <pin name="PD4" x="17.78" y="22.86" length="middle" direction="in" rot="R180"/>- <pin name="PD3" x="17.78" y="20.32" length="middle" direction="in" rot="R180"/>- <pin name="PD2" x="17.78" y="17.78" length="middle" direction="in" rot="R180"/>- <pin name="PD1" x="17.78" y="15.24" length="middle" direction="in" rot="R180"/>- <pin name="PD0" x="17.78" y="12.7" length="middle" direction="in" rot="R180"/>- <pin name="PC12" x="17.78" y="10.16" length="middle" direction="in" rot="R180"/>- <pin name="PC11" x="17.78" y="7.62" length="middle" direction="in" rot="R180"/>- <pin name="PC10" x="17.78" y="5.08" length="middle" direction="in" rot="R180"/>- <pin name="PA15" x="17.78" y="2.54" length="middle" direction="in" rot="R180"/>- <pin name="PA14" x="17.78" y="0" length="middle" direction="in" rot="R180"/>+ <pin name="VSS@6" x="17.78" y="27.94" length="middle" direction="pwr" rot="R180"/>+ <pin name="PD5" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PD4" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PD3" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PD2" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PD1" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PD0" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>+ <pin name="PA15" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+ <pin name="PA14" x="17.78" y="0" length="middle" direction="io" rot="R180"/> <pin name="VDD@10" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>- <pin name="VSS@9" x="17.78" y="-5.08" length="middle" direction="out" rot="R180"/>- <pin name="VCAP_2" x="17.78" y="-7.62" length="middle" direction="pas" rot="R180"/>- <pin name="PA13" x="17.78" y="-10.16" length="middle" direction="in" rot="R180"/>- <pin name="PA12" x="17.78" y="-12.7" length="middle" direction="in" rot="R180"/>- <pin name="PA11" x="17.78" y="-15.24" length="middle" direction="in" rot="R180"/>- <pin name="PA10" x="17.78" y="-17.78" length="middle" direction="in" rot="R180"/>- <pin name="PA9" x="17.78" y="-20.32" length="middle" direction="in" rot="R180"/>- <pin name="PA8" x="17.78" y="-22.86" length="middle" direction="in" rot="R180"/>- <pin name="PC9" x="17.78" y="-25.4" length="middle" direction="in" rot="R180"/>- <pin name="PC8" x="17.78" y="-27.94" length="middle" direction="in" rot="R180"/>- <pin name="PC7" x="17.78" y="-30.48" length="middle" direction="in" rot="R180"/>- <pin name="PC6" x="17.78" y="-33.02" length="middle" direction="in" rot="R180"/>+ <pin name="VSS@7" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+ <pin name="VCAP_2" x="17.78" y="-7.62" length="middle" direction="pwr" rot="R180"/>+ <pin name="PA13" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PA12" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PA11" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PA10" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PA9" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PA8" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PC9" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PC8" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PC7" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PC6" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/> <pin name="VDD@11" x="17.78" y="-35.56" length="middle" direction="pwr" rot="R180"/>- <pin name="VSS@10" x="17.78" y="-38.1" length="middle" direction="out" rot="R180"/>- <pin name="PG8" x="17.78" y="-40.64" length="middle" direction="in" rot="R180"/>- <pin name="PG7" x="17.78" y="-43.18" length="middle" direction="in" rot="R180"/>- <pin name="PG6" x="17.78" y="-45.72" length="middle" direction="in" rot="R180"/>- <pin name="PG5" x="17.78" y="-48.26" length="middle" direction="in" rot="R180"/>- <pin name="PG4" x="17.78" y="-50.8" length="middle" direction="in" rot="R180"/>- <pin name="PG3" x="17.78" y="-53.34" length="middle" direction="in" rot="R180"/>- <pin name="PG2" x="17.78" y="-55.88" length="middle" direction="in" rot="R180"/>- <pin name="PD15" x="17.78" y="-58.42" length="middle" direction="in" rot="R180"/>- <pin name="PD14" x="17.78" y="-60.96" length="middle" direction="in" rot="R180"/>+ <pin name="VSS@8" x="17.78" y="-38.1" length="middle" direction="pwr" rot="R180"/>+ <pin name="PG8" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PG7" x="17.78" y="-43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PG6" x="17.78" y="-45.72" length="middle" direction="io" rot="R180"/>+ <pin name="PG5" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>+ <pin name="PG4" x="17.78" y="-50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PG3" x="17.78" y="-53.34" length="middle" direction="io" rot="R180"/>+ <pin name="PG2" x="17.78" y="-55.88" length="middle" direction="io" rot="R180"/>+ <pin name="PD15" x="17.78" y="-58.42" length="middle" direction="io" rot="R180"/>+ <pin name="PD14" x="17.78" y="-60.96" length="middle" direction="io" rot="R180"/> <pin name="VDD@12" x="17.78" y="-63.5" length="middle" direction="pwr" rot="R180"/>- <pin name="VSS@11" x="17.78" y="-66.04" length="middle" direction="out" rot="R180"/>- <pin name="PD13" x="17.78" y="-68.58" length="middle" direction="in" rot="R180"/>- <pin name="PD12" x="17.78" y="-71.12" length="middle" direction="in" rot="R180"/>- <pin name="PD11" x="17.78" y="-73.66" length="middle" direction="in" rot="R180"/>- <pin name="PD10" x="17.78" y="-76.2" length="middle" direction="in" rot="R180"/>- <pin name="PD9" x="17.78" y="-78.74" length="middle" direction="in" rot="R180"/>- <pin name="PD8" x="17.78" y="-81.28" length="middle" direction="in" rot="R180"/>- <pin name="PB15" x="17.78" y="-83.82" length="middle" direction="in" rot="R180"/>- <pin name="PB14" x="17.78" y="-86.36" length="middle" direction="in" rot="R180"/>- <pin name="PB13" x="17.78" y="-88.9" length="middle" direction="in" rot="R180"/>- <pin name="PB12" x="17.78" y="-91.44" length="middle" direction="in" rot="R180"/>+ <pin name="VSS@9" x="17.78" y="-66.04" length="middle" direction="pwr" rot="R180"/>+ <pin name="PD13" x="17.78" y="-68.58" length="middle" direction="io" rot="R180"/>+ <pin name="PD12" x="17.78" y="-71.12" length="middle" direction="io" rot="R180"/>+ <pin name="PD11" x="17.78" y="-73.66" length="middle" direction="io" rot="R180"/>+ <pin name="PD10" x="17.78" y="-76.2" length="middle" direction="io" rot="R180"/>+ <pin name="PD9" x="17.78" y="-78.74" length="middle" direction="io" rot="R180"/>+ <pin name="PD8" x="17.78" y="-81.28" length="middle" direction="io" rot="R180"/>+ <pin name="PB15" x="17.78" y="-83.82" length="middle" direction="io" rot="R180"/>+ <pin name="PB14" x="17.78" y="-86.36" length="middle" direction="io" rot="R180"/>+ <pin name="PB13" x="17.78" y="-88.9" length="middle" direction="io" rot="R180"/>+ <pin name="PB12" x="17.78" y="-91.44" length="middle" direction="io" rot="R180"/> </symbol> </symbols> <devicesets> <deviceset name="STM32F429ZIT6" prefix="U">- <description></description>+ <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data</description> <gates> <gate name="G$1" symbol="STM32F429ZIT6" x="0" y="0"/> </gates>@@ -392,8 +393,8 @@ <connect gate="G$1" pin="PE6" pad="5"/> <connect gate="G$1" pin="VBAT" pad="6"/> <connect gate="G$1" pin="PC13" pad="7"/>- <connect gate="G$1" pin="PC14-OSC32_IN" pad="8"/>- <connect gate="G$1" pin="PC15-OSC32_OUT" pad="9"/>+ <connect gate="G$1" pin="PC14/OSC32_IN" pad="8"/>+ <connect gate="G$1" pin="PC15/OSC32_OUT" pad="9"/> <connect gate="G$1" pin="PF0" pad="10"/> <connect gate="G$1" pin="PF1" pad="11"/> <connect gate="G$1" pin="PF2" pad="12"/>@@ -407,58 +408,58 @@ <connect gate="G$1" pin="PF8" pad="20"/> <connect gate="G$1" pin="PF9" pad="21"/> <connect gate="G$1" pin="PF10" pad="22"/>- <connect gate="G$1" pin="PH0-OSC_IN" pad="23"/>- <connect gate="G$1" pin="PH1-OSC_OUT" pad="24"/>+ <connect gate="G$1" pin="PH0/OSC_IN" pad="23"/>+ <connect gate="G$1" pin="PH1/OSC_OUT" pad="24"/> <connect gate="G$1" pin="NRST" pad="25"/> <connect gate="G$1" pin="PC0" pad="26"/> <connect gate="G$1" pin="PC1" pad="27"/> <connect gate="G$1" pin="PC2" pad="28"/> <connect gate="G$1" pin="PC3" pad="29"/>- <connect gate="G$1" pin="PC4" pad="30"/>- <connect gate="G$1" pin="PC5" pad="31"/>- <connect gate="G$1" pin="PB0" pad="32"/>- <connect gate="G$1" pin="PB1" pad="33"/>- <connect gate="G$1" pin="PB2-BOOT1" pad="34"/>- <connect gate="G$1" pin="PA0-WKUP" pad="35"/>- <connect gate="G$1" pin="PA1" pad="36"/>- <connect gate="G$1" pin="PA2" pad="37"/>- <connect gate="G$1" pin="PA3" pad="38"/>- <connect gate="G$1" pin="PA4" pad="39"/>- <connect gate="G$1" pin="PA5" pad="40"/>- <connect gate="G$1" pin="PA6" pad="41"/>- <connect gate="G$1" pin="PA7" pad="42"/>- <connect gate="G$1" pin="VDD@2" pad="43"/>- <connect gate="G$1" pin="VSS@2" pad="44"/>- <connect gate="G$1" pin="BYPASS_REG" pad="45"/>- <connect gate="G$1" pin="VDD@3" pad="46"/>- <connect gate="G$1" pin="PA4@2" pad="47"/>- <connect gate="G$1" pin="PA5@2" pad="48"/>- <connect gate="G$1" pin="PA6@2" pad="49"/>- <connect gate="G$1" pin="PA7@2" pad="50"/>+ <connect gate="G$1" pin="VDD@2" pad="30"/>+ <connect gate="G$1" pin="VSSA" pad="31"/>+ <connect gate="G$1" pin="VREF+" pad="32"/>+ <connect gate="G$1" pin="VDDA" pad="33"/>+ <connect gate="G$1" pin="PA0/WKUP" pad="34"/>+ <connect gate="G$1" pin="PA1" pad="35"/>+ <connect gate="G$1" pin="PA2" pad="36"/>+ <connect gate="G$1" pin="PA3" pad="37"/>+ <connect gate="G$1" pin="VSS@2" pad="38"/>+ <connect gate="G$1" pin="VDD@3" pad="39"/>+ <connect gate="G$1" pin="PA4" pad="40"/>+ <connect gate="G$1" pin="PA5" pad="41"/>+ <connect gate="G$1" pin="PA6" pad="42"/>+ <connect gate="G$1" pin="PA7" pad="43"/>+ <connect gate="G$1" pin="PC4" pad="44"/>+ <connect gate="G$1" pin="PC5" pad="45"/>+ <connect gate="G$1" pin="PB0" pad="46"/>+ <connect gate="G$1" pin="PB1" pad="47"/>+ <connect gate="G$1" pin="PB2/BOOT1" pad="48"/>+ <connect gate="G$1" pin="PF11" pad="49"/>+ <connect gate="G$1" pin="PF12" pad="50"/> <connect gate="G$1" pin="VSS@3" pad="51"/> <connect gate="G$1" pin="VDD@4" pad="52"/>- <connect gate="G$1" pin="PA4@3" pad="53"/>- <connect gate="G$1" pin="PA5@3" pad="54"/>- <connect gate="G$1" pin="PA6@3" pad="55"/>- <connect gate="G$1" pin="PA7@3" pad="56"/>- <connect gate="G$1" pin="PE7" pad="57"/>- <connect gate="G$1" pin="PE8" pad="58"/>- <connect gate="G$1" pin="PE9" pad="59"/>- <connect gate="G$1" pin="VSS@4" pad="60"/>- <connect gate="G$1" pin="VDD@5" pad="61"/>- <connect gate="G$1" pin="PE10" pad="62"/>- <connect gate="G$1" pin="PE11" pad="63"/>- <connect gate="G$1" pin="PE12" pad="64"/>- <connect gate="G$1" pin="PE13" pad="65"/>- <connect gate="G$1" pin="PE14" pad="66"/>- <connect gate="G$1" pin="PE15" pad="67"/>- <connect gate="G$1" pin="PB10" pad="68"/>- <connect gate="G$1" pin="PB11" pad="69"/>- <connect gate="G$1" pin="VCAP_1" pad="70"/>- <connect gate="G$1" pin="VSS@5" pad="71"/>+ <connect gate="G$1" pin="PF13" pad="53"/>+ <connect gate="G$1" pin="PF14" pad="54"/>+ <connect gate="G$1" pin="PF15" pad="55"/>+ <connect gate="G$1" pin="PG0" pad="56"/>+ <connect gate="G$1" pin="PG1" pad="57"/>+ <connect gate="G$1" pin="PE7" pad="58"/>+ <connect gate="G$1" pin="PE8" pad="59"/>+ <connect gate="G$1" pin="PE9" pad="60"/>+ <connect gate="G$1" pin="VSS@4" pad="61"/>+ <connect gate="G$1" pin="VDD@5" pad="62"/>+ <connect gate="G$1" pin="PE10" pad="63"/>+ <connect gate="G$1" pin="PE11" pad="64"/>+ <connect gate="G$1" pin="PE12" pad="65"/>+ <connect gate="G$1" pin="PE13" pad="66"/>+ <connect gate="G$1" pin="PE14" pad="67"/>+ <connect gate="G$1" pin="PE15" pad="68"/>+ <connect gate="G$1" pin="PB10" pad="69"/>+ <connect gate="G$1" pin="PB11" pad="70"/>+ <connect gate="G$1" pin="VCAP_1" pad="71"/> <connect gate="G$1" pin="VDD@6" pad="72"/> <connect gate="G$1" pin="VDD@7" pad="144"/>- <connect gate="G$1" pin="VSS@6" pad="143"/>+ <connect gate="G$1" pin="PDR_ON" pad="143"/> <connect gate="G$1" pin="PE1" pad="142"/> <connect gate="G$1" pin="PE0" pad="141"/> <connect gate="G$1" pin="PB9" pad="140"/>@@ -471,7 +472,7 @@ <connect gate="G$1" pin="PB3" pad="133"/> <connect gate="G$1" pin="PG15" pad="132"/> <connect gate="G$1" pin="VDD@8" pad="131"/>- <connect gate="G$1" pin="VSS@7" pad="130"/>+ <connect gate="G$1" pin="VSS@5" pad="130"/> <connect gate="G$1" pin="PG14" pad="129"/> <connect gate="G$1" pin="PG13" pad="128"/> <connect gate="G$1" pin="PG12" pad="127"/>@@ -481,7 +482,7 @@ <connect gate="G$1" pin="PD7" pad="123"/> <connect gate="G$1" pin="PD6" pad="122"/> <connect gate="G$1" pin="VDD@9" pad="121"/>- <connect gate="G$1" pin="VSS@8" pad="120"/>+ <connect gate="G$1" pin="VSS@6" pad="120"/> <connect gate="G$1" pin="PD5" pad="119"/> <connect gate="G$1" pin="PD4" pad="118"/> <connect gate="G$1" pin="PD3" pad="117"/>@@ -494,7 +495,7 @@ <connect gate="G$1" pin="PA15" pad="110"/> <connect gate="G$1" pin="PA14" pad="109"/> <connect gate="G$1" pin="VDD@10" pad="108"/>- <connect gate="G$1" pin="VSS@9" pad="107"/>+ <connect gate="G$1" pin="VSS@7" pad="107"/> <connect gate="G$1" pin="VCAP_2" pad="106"/> <connect gate="G$1" pin="PA13" pad="105"/> <connect gate="G$1" pin="PA12" pad="104"/>@@ -507,7 +508,7 @@ <connect gate="G$1" pin="PC7" pad="97"/> <connect gate="G$1" pin="PC6" pad="96"/> <connect gate="G$1" pin="VDD@11" pad="95"/>- <connect gate="G$1" pin="VSS@10" pad="94"/>+ <connect gate="G$1" pin="VSS@8" pad="94"/> <connect gate="G$1" pin="PG8" pad="93"/> <connect gate="G$1" pin="PG7" pad="92"/> <connect gate="G$1" pin="PG6" pad="91"/>@@ -518,7 +519,7 @@ <connect gate="G$1" pin="PD15" pad="86"/> <connect gate="G$1" pin="PD14" pad="85"/> <connect gate="G$1" pin="VDD@12" pad="84"/>- <connect gate="G$1" pin="VSS@11" pad="83"/>+ <connect gate="G$1" pin="VSS@9" pad="83"/> <connect gate="G$1" pin="PD13" pad="82"/> <connect gate="G$1" pin="PD12" pad="81"/> <connect gate="G$1" pin="PD11" pad="80"/>@@ -530,7 +531,17 @@ <connect gate="G$1" pin="PB13" pad="74"/> <connect gate="G$1" pin="PB12" pad="73"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="STM32F429ZIT6" constant="no"/>+ <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+ <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586182526204960768" constant="no"/>+ <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/stm32f429zit6" constant="no"/>+ <attribute name="MOUSER_PN" value="511-STM32F429ZIT6" constant="no"/>+ <attribute name="DIGIKEY_PN" value="497-14053-ND" constant="no"/>+ <attribute name="LCSC_PN" value="C84808" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>