component
STM32F429VGT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
← Commit history
Publish 0.1.1
5 files changed
+425−414
README.md+95−95@@ -8,106 +8,106 @@ STM32F429VGT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | Pin | Name | Type | Function | |---|---|---|---|-| 1 | PE2 | output | GPIO Port E pin 2; Alternate functions: TRACECLK, SPI4_SCK, SAI1_MCLK_A, ETH_MII_TXD3, FMC_A23 |-| 2 | PE3 | output | GPIO Port E pin 3; Alternate functions: TRACED0, SAI1_SD_B, FMC_A19 |-| 3 | PE4 | output | GPIO Port E pin 4; Alternate functions: TRACED1, SPI4_NSS, SAI1_FS_A, FMC_A20, DCMI_D4, LCD_B0 |-| 4 | PE5 | output | GPIO Port E pin 5; Alternate functions: TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, FMC_A21, DCMI_D6, LCD_G0 |-| 5 | PE6 | output | GPIO Port E pin 6; Alternate functions: TRACED3, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, FMC_A22, DCMI_D7, LCD_G1 |+| 1 | PE2 | bidirectional | GPIO Port E pin 2; Alternate functions: TRACECLK, SPI4_SCK, SAI1_MCLK_A, ETH_MII_TXD3, FMC_A23 |+| 2 | PE3 | bidirectional | GPIO Port E pin 3; Alternate functions: TRACED0, SAI1_SD_B, FMC_A19 |+| 3 | PE4 | bidirectional | GPIO Port E pin 4; Alternate functions: TRACED1, SPI4_NSS, SAI1_FS_A, FMC_A20, DCMI_D4, LCD_B0 |+| 4 | PE5 | bidirectional | GPIO Port E pin 5; Alternate functions: TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, FMC_A21, DCMI_D6, LCD_G0 |+| 5 | PE6 | bidirectional | GPIO Port E pin 6; Alternate functions: TRACED3, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, FMC_A22, DCMI_D7, LCD_G1 | | 6 | VBAT | power_in | Backup domain power supply for RTC, backup SRAM, and backup registers | | 7 | PC13 | bidirectional | GPIO Port C pin 13 (TAMP_1); Through power switch, limited to 3mA sink current, max 2MHz with 30pF load |-| 8 | PC14-OSC32_IN | bidirectional | GPIO Port C pin 14 / RTC OSC32 input; 32.768kHz oscillator input |-| 9 | PC15-OSC32_OUT | output | GPIO Port C pin 15 / RTC OSC32 output; 32.768kHz oscillator output |+| 8 | PC14/OSC32_IN | bidirectional | GPIO Port C pin 14 / RTC OSC32 input; 32.768kHz oscillator input |+| 9 | PC15/OSC32_OUT | bidirectional | GPIO Port C pin 15 / RTC OSC32 output; 32.768kHz oscillator output | | 10 | VSS | power_in | Ground connection | | 11 | VDD | power_in | Main power supply voltage (1.7 to 3.6V) |-| 12 | PF0 | bidirectional | GPIO Port F pin 0; Alternate functions: I2C2_SDA, FMC_A0 |-| 13 | PF1 | bidirectional | GPIO Port F pin 1; Alternate functions: I2C2_SCL, FMC_A1 |-| 14 | PF2 | bidirectional | GPIO Port F pin 2; Alternate functions: I2C2_SMBA, FMC_A2 |-| 15 | PF3 | bidirectional | GPIO Port F pin 3 (ADC3_IN9); Alternate functions: FMC_A3 |-| 16 | PF4 | bidirectional | GPIO Port F pin 4 (ADC3_IN14); Alternate functions: FMC_A4 |-| 17 | PF5 | bidirectional | GPIO Port F pin 5 (ADC3_IN15); Alternate functions: FMC_A5 |-| 18 | VSS | power_in | Ground connection |+| 12 | PH0/OSC_IN | bidirectional | GPIO Port H pin 0 / HSE oscillator input; 4-26MHz oscillator input |+| 13 | PH1/OSC_OUT | bidirectional | GPIO Port H pin 1 / HSE oscillator output |+| 14 | NRST | input | Active-low reset input with internal pull-up; Schmitt trigger input with programmable filtering |+| 15 | PC0 | bidirectional | GPIO Port C pin 0 (ADC123_IN10); Alternate functions: OTG_HS_ULPI_STP, FMC_SDNWE |+| 16 | PC1 | bidirectional | GPIO Port C pin 1 (ADC123_IN11); Alternate functions: ETH_MDC |+| 17 | PC2 | bidirectional | GPIO Port C pin 2 (ADC123_IN12); Alternate functions: SPI2_MISO, I2S2ext_SD, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0 |+| 18 | PC3 | bidirectional | GPIO Port C pin 3 (ADC123_IN13); Alternate functions: SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0 | | 19 | VDD | power_in | Main power supply voltage (1.7 to 3.6V) |-| 20 | PF6 | bidirectional | GPIO Port F pin 6 (ADC3_IN4); Alternate functions: TIM10_CH1, SPI5_NSS, SAI1_SD_B, UART7_Rx, FMC_NIORD |-| 21 | PF7 | bidirectional | GPIO Port F pin 7 (ADC3_IN5); Alternate functions: TIM11_CH1, SPI5_SCK, SAI1_MCLK_B, UART7_Tx, FMC_NREG |-| 22 | PF8 | bidirectional | GPIO Port F pin 8 (ADC3_IN6); Alternate functions: SPI5_MISO, SAI1_SCK_B, TIM13_CH1, FMC_NIOWR |-| 23 | PF9 | bidirectional | GPIO Port F pin 9 (ADC3_IN7); Alternate functions: SPI5_MOSI, SAI1_FS_B, TIM14_CH1, FMC_CD |-| 24 | PF10 | bidirectional | GPIO Port F pin 10 (ADC3_IN8); Alternate functions: FMC_INTR, DCMI_D11, LCD_DE |-| 25 | PH0-OSC_IN | bidirectional | GPIO Port H pin 0 / HSE oscillator input; 4-26MHz oscillator input |-| 26 | PH1-OSC_OUT | output | GPIO Port H pin 1 / HSE oscillator output |-| 27 | NRST | bidirectional | Active-low reset input with internal pull-up; Schmitt trigger input with programmable filtering |-| 28 | PC0 | bidirectional | GPIO Port C pin 0 (ADC123_IN10); Alternate functions: OTG_HS_ULPI_STP, FMC_SDNWE |-| 29 | PC1 | bidirectional | GPIO Port C pin 1 (ADC123_IN11); Alternate functions: ETH_MDC |-| 30 | PC2 | bidirectional | GPIO Port C pin 2 (ADC123_IN12); Alternate functions: SPI2_MISO, I2S2ext_SD, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0 |-| 31 | PC3 | bidirectional | GPIO Port C pin 3 (ADC123_IN13); Alternate functions: SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0 |-| 32 | PA0-WKUP | bidirectional | GPIO Port A pin 0 with wakeup capability (ADC123_IN0); Alternate functions: TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, ETH_MII_CRS |-| 33 | PA1 | bidirectional | GPIO Port A pin 1 (ADC123_IN1); Alternate functions: TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, ETH_MII_RX_CLK/ETH_RMII_REF_CLK |-| 34 | PA2 | bidirectional | GPIO Port A pin 2 (ADC123_IN2); Alternate functions: TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, ETH_MDIO |-| 35 | PA3 | bidirectional | GPIO Port A pin 3 (ADC123_IN3); Alternate functions: TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5 |-| 36 | PA4 | bidirectional | GPIO Port A pin 4 (ADC12_IN4/DAC_OUT1); TTa I/O (3.3V); Alternate functions: SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC |-| 37 | PA5 | bidirectional | GPIO Port A pin 5 (ADC12_IN5/DAC_OUT2); TTa I/O (3.3V); Alternate functions: TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK, OTG_HS_ULPI_CK |-| 38 | PA6 | bidirectional | GPIO Port A pin 6 (ADC12_IN6); Alternate functions: TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM13_CH1, DCMI_PIXCLK, LCD_G2 |-| 39 | PA7 | bidirectional | GPIO Port A pin 7 (ADC12_IN7); Alternate functions: TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM14_CH1, ETH_MII_RX_DV/ETH_RMII_CRS_DV |-| 40 | PC4 | bidirectional | GPIO Port C pin 4 (ADC12_IN14); Alternate functions: ETH_MII_RXD0/ETH_RMII_RXD0 |-| 41 | PC5 | bidirectional | GPIO Port C pin 5 (ADC12_IN15); Alternate functions: ETH_MII_RXD1/ETH_RMII_RXD1 |-| 42 | PB0 | bidirectional | GPIO Port B pin 0 (ADC12_IN8); Alternate functions: TIM1_CH2N, TIM3_CH3, TIM8_CH2N, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2 |-| 43 | PB1 | bidirectional | GPIO Port B pin 1 (ADC12_IN9); Alternate functions: TIM1_CH3N, TIM3_CH4, TIM8_CH3N, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3 |-| 44 | PB2-BOOT1 | bidirectional | GPIO Port B pin 2 with boot selection; Alternate functions: EVENTOUT |-| 45 | PE7 | output | GPIO Port E pin 7; Alternate functions: TIM1_ETR, UART7_Rx, FMC_D4 |-| 46 | PE8 | output | GPIO Port E pin 8; Alternate functions: TIM1_CH1N, UART7_Tx, FMC_D5 |-| 47 | PE9 | output | GPIO Port E pin 9; Alternate functions: TIM1_CH1, FMC_D6 |-| 48 | VSS | power_in | Ground connection |-| 49 | VDD | power_in | Main power supply voltage (1.7 to 3.6V) |-| 50 | PE10 | output | GPIO Port E pin 10; Alternate functions: TIM1_CH2N, FMC_D7 |-| 51 | PE11 | output | GPIO Port E pin 11; Alternate functions: TIM1_CH2, SPI4_NSS, FMC_D8, LCD_G3 |-| 52 | PE12 | output | GPIO Port E pin 12; Alternate functions: TIM1_CH3N, SPI4_SCK, FMC_D9, LCD_B4 |-| 53 | PE13 | output | GPIO Port E pin 13; Alternate functions: TIM1_CH3, SPI4_MISO, FMC_D10, LCD_DE |-| 54 | PE14 | output | GPIO Port E pin 14; Alternate functions: TIM1_CH4, SPI4_MOSI, FMC_D11, LCD_CLK |-| 55 | PE15 | output | GPIO Port E pin 15; Alternate functions: TIM1_BKIN, FMC_D12, LCD_R7 |-| 56 | PB10 | bidirectional | GPIO Port B pin 10; Alternate functions: TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4 |-| 57 | PB11 | bidirectional | GPIO Port B pin 11; Alternate functions: TIM2_CH4, I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN, LCD_G5 |-| 58 | VCAP_1 | passive | Internal regulator capacitor connection (2.2µF external ceramic capacitor required) |-| 59 | VSS | power_in | Ground connection |-| 60 | VDD | power_in | Main power supply voltage (1.7 to 3.6V) |-| 61 | PB12 | bidirectional | GPIO Port B pin 12; Alternate functions: TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0, OTG_HS_ID |-| 62 | PB13 | bidirectional | GPIO Port B pin 13 (OTG_HS_VBUS); Alternate functions: TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1 |-| 63 | PB14 | bidirectional | GPIO Port B pin 14 (OTG_HS_DM); Alternate functions: TIM1_CH2N, TIM8_CH2N, SPI2_MISO, I2S2ext_SD, USART3_RTS, TIM12_CH1 |-| 64 | PB15 | bidirectional | GPIO Port B pin 15 (OTG_HS_DP); Alternate functions: RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI/I2S2_SD, TIM12_CH2 |-| 65 | PD8 | bidirectional | GPIO Port D pin 8; Alternate functions: USART3_TX, FMC_D13 |-| 66 | PD9 | bidirectional | GPIO Port D pin 9; Alternate functions: USART3_RX, FMC_D14 |-| 67 | PD10 | bidirectional | GPIO Port D pin 10; Alternate functions: USART3_CK, FMC_D15, LCD_B3 |-| 68 | PD11 | bidirectional | GPIO Port D pin 11; Alternate functions: USART3_CTS, FMC_A16 |-| 69 | PD12 | bidirectional | GPIO Port D pin 12; Alternate functions: TIM4_CH1, USART3_RTS, FMC_A17 |-| 70 | PD13 | bidirectional | GPIO Port D pin 13; Alternate functions: TIM4_CH2, FMC_A18 |-| 71 | PD14 | bidirectional | GPIO Port D pin 14 (FMC_D0); Alternate functions: TIM4_CH3 |-| 72 | PD15 | bidirectional | GPIO Port D pin 15 (FMC_D1); Alternate functions: TIM4_CH4 |-| 73 | PA14-JTCK-SWCLK | bidirectional | GPIO Port A pin 14 / JTAG test clock / Serial Wire debug clock; Alternate functions: JTCK-SWCLK, EVENTOUT |-| 74 | PA15-JTDI | bidirectional | GPIO Port A pin 15 / JTAG test data in; Alternate functions: JTDI, TIM2_CH1/TIM2_ETR, SPI1_NSS, SPI3_NSS/I2S3_WS |-| 75 | PC10 | bidirectional | GPIO Port C pin 10; Alternate functions: SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, SDIO_D2, DCMI_D8, LCD_R2 |-| 76 | PC11 | bidirectional | GPIO Port C pin 11; Alternate functions: I2S3ext_SD, SPI3_MISO, USART3_RX, UART4_RX, SDIO_D3, DCMI_D4 |-| 77 | PC12 | bidirectional | GPIO Port C pin 12; Alternate functions: SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDIO_CK, DCMI_D9 |-| 78 | PD0 | bidirectional | GPIO Port D pin 0 (FMC_D2); Alternate functions: CAN1_RX |-| 79 | PD1 | bidirectional | GPIO Port D pin 1 (FMC_D3); Alternate functions: CAN1_TX |-| 80 | PD2 | bidirectional | GPIO Port D pin 2; Alternate functions: TIM3_ETR, UART5_RX, SDIO_CMD, DCMI_D11 |-| 81 | PD3 | bidirectional | GPIO Port D pin 3 (FMC_CLK); Alternate functions: SPI2_SCK/I2S2_CK, USART2_CTS, DCMI_D5, LCD_G7 |-| 82 | PD4 | bidirectional | GPIO Port D pin 4 (FMC_NOE); Alternate functions: USART2_RTS |-| 83 | PD5 | bidirectional | GPIO Port D pin 5 (FMC_NWE); Alternate functions: USART2_TX |-| 84 | PD6 | bidirectional | GPIO Port D pin 6 (FMC_NWAIT); Alternate functions: SPI3_MOSI/I2S3_SD, SAI1_SD_A, USART2_RX, DCMI_D10, LCD_B2 |-| 85 | PD7 | bidirectional | GPIO Port D pin 7 (FMC_NE1/FMC_NCE2); Alternate functions: USART2_CK |-| 86 | PA8 | bidirectional | GPIO Port A pin 8 (MCO1); Alternate functions: TIM1_CH1, I2C3_SCL, USART1_CK, OTG_FS_SOF, LCD_R6 |-| 87 | PA9 | bidirectional | GPIO Port A pin 9 (OTG_FS_VBUS); Alternate functions: TIM1_CH2, I2C3_SMBA, USART1_TX, DCMI_D0 |-| 88 | PA10 | bidirectional | GPIO Port A pin 10 (OTG_FS_ID); Alternate functions: TIM1_CH3, USART1_RX, DCMI_D1 |-| 89 | PA11 | bidirectional | GPIO Port A pin 11 (OTG_FS_DM); Alternate functions: TIM1_CH4, USART1_CTS, CAN1_RX, LCD_R4 |-| 90 | PA12 | bidirectional | GPIO Port A pin 12 (OTG_FS_DP); Alternate functions: TIM1_ETR, USART1_RTS, CAN1_TX, LCD_R5 |-| 91 | PA13-JTMS-SWDIO | bidirectional | GPIO Port A pin 13 / JTAG test mode select / Serial Wire debug I/O; Alternate functions: JTMS-SWDIO, EVENTOUT |-| 92 | VCAP_2 | passive | Internal regulator capacitor connection (2.2µF external ceramic capacitor required) |-| 93 | VSS | power_in | Ground connection |-| 94 | VDD | power_in | Main power supply voltage (1.7 to 3.6V) |-| 95 | PB3-JTDO/TRACESWO | bidirectional | GPIO Port B pin 3 / JTAG test data out / Trace serial wire output; Alternate functions: JTDO/TRACESWO, TIM2_CH2, SPI1_SCK, SPI3_SCK/I2S3_CK |-| 96 | PB4-NJTRST | bidirectional | GPIO Port B pin 4 / JTAG NTRST; Alternate functions: NJTRST, TIM3_CH1, SPI1_MISO, SPI3_MISO, I2S3ext_SD |-| 97 | PB5 | bidirectional | GPIO Port B pin 5; Alternate functions: TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI/I2S3_SD, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1, DCMI_D10 |-| 98 | PB6 | bidirectional | GPIO Port B pin 6; Alternate functions: TIM4_CH1, I2C1_SCL, USART1_TX, CAN2_TX, FMC_SDNE1, DCMI_D5 |-| 99 | PB7 | bidirectional | GPIO Port B pin 7 (FMC_NL); Alternate functions: TIM4_CH2, I2C1_SDA, USART1_RX, DCMI_VSYNC |-| 100 | BOOT0 | input | Boot configuration pin with internal pull-down and weak pull-up; determines boot from Flash or system memory |+| 20 | VSSA | power_in | |+| 21 | VREF+ | power_in | |+| 22 | VDDA | power_in | |+| 23 | PA0/WKUP | bidirectional | GPIO Port A pin 0 with wakeup capability (ADC123_IN0); Alternate functions: TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, ETH_MII_CRS |+| 24 | PA1 | bidirectional | GPIO Port A pin 1 (ADC123_IN1); Alternate functions: TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, ETH_MII_RX_CLK/ETH_RMII_REF_CLK |+| 25 | PA2 | bidirectional | GPIO Port A pin 2 (ADC123_IN2); Alternate functions: TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, ETH_MDIO |+| 26 | PA3 | bidirectional | GPIO Port A pin 3 (ADC123_IN3); Alternate functions: TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5 |+| 27 | VSS | power_in | Ground connection |+| 28 | VDD | power_in | Main power supply voltage (1.7 to 3.6V) |+| 29 | PA4 | bidirectional | GPIO Port A pin 4 (ADC12_IN4/DAC_OUT1); TTa I/O (3.3V); Alternate functions: SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC |+| 30 | PA5 | bidirectional | GPIO Port A pin 5 (ADC12_IN5/DAC_OUT2); TTa I/O (3.3V); Alternate functions: TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK, OTG_HS_ULPI_CK |+| 31 | PA6 | bidirectional | GPIO Port A pin 6 (ADC12_IN6); Alternate functions: TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM13_CH1, DCMI_PIXCLK, LCD_G2 |+| 32 | PA7 | bidirectional | GPIO Port A pin 7 (ADC12_IN7); Alternate functions: TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM14_CH1, ETH_MII_RX_DV/ETH_RMII_CRS_DV |+| 33 | PC4 | bidirectional | GPIO Port C pin 4 (ADC12_IN14); Alternate functions: ETH_MII_RXD0/ETH_RMII_RXD0 |+| 34 | PC5 | bidirectional | GPIO Port C pin 5 (ADC12_IN15); Alternate functions: ETH_MII_RXD1/ETH_RMII_RXD1 |+| 35 | PB0 | bidirectional | GPIO Port B pin 0 (ADC12_IN8); Alternate functions: TIM1_CH2N, TIM3_CH3, TIM8_CH2N, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2 |+| 36 | PB1 | bidirectional | GPIO Port B pin 1 (ADC12_IN9); Alternate functions: TIM1_CH3N, TIM3_CH4, TIM8_CH3N, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3 |+| 37 | PB2/BOOT1 | bidirectional | GPIO Port B pin 2 with boot selection; Alternate functions: EVENTOUT |+| 38 | PE7 | bidirectional | GPIO Port E pin 7; Alternate functions: TIM1_ETR, UART7_Rx, FMC_D4 |+| 39 | PE8 | bidirectional | GPIO Port E pin 8; Alternate functions: TIM1_CH1N, UART7_Tx, FMC_D5 |+| 40 | PE9 | bidirectional | GPIO Port E pin 9; Alternate functions: TIM1_CH1, FMC_D6 |+| 41 | PE10 | bidirectional | GPIO Port E pin 10; Alternate functions: TIM1_CH2N, FMC_D7 |+| 42 | PE11 | bidirectional | GPIO Port E pin 11; Alternate functions: TIM1_CH2, SPI4_NSS, FMC_D8, LCD_G3 |+| 43 | PE12 | bidirectional | GPIO Port E pin 12; Alternate functions: TIM1_CH3N, SPI4_SCK, FMC_D9, LCD_B4 |+| 44 | PE13 | bidirectional | GPIO Port E pin 13; Alternate functions: TIM1_CH3, SPI4_MISO, FMC_D10, LCD_DE |+| 45 | PE14 | bidirectional | GPIO Port E pin 14; Alternate functions: TIM1_CH4, SPI4_MOSI, FMC_D11, LCD_CLK |+| 46 | PE15 | bidirectional | GPIO Port E pin 15; Alternate functions: TIM1_BKIN, FMC_D12, LCD_R7 |+| 47 | PB10 | bidirectional | GPIO Port B pin 10; Alternate functions: TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4 |+| 48 | PB11 | bidirectional | GPIO Port B pin 11; Alternate functions: TIM2_CH4, I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN, LCD_G5 |+| 49 | VCAP_1 | power_in | Internal regulator capacitor connection (2.2µF external ceramic capacitor required) |+| 50 | VDD | power_in | Main power supply voltage (1.7 to 3.6V) |+| 51 | PB12 | bidirectional | GPIO Port B pin 12; Alternate functions: TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0, OTG_HS_ID |+| 52 | PB13 | bidirectional | GPIO Port B pin 13 (OTG_HS_VBUS); Alternate functions: TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1 |+| 53 | PB14 | bidirectional | GPIO Port B pin 14 (OTG_HS_DM); Alternate functions: TIM1_CH2N, TIM8_CH2N, SPI2_MISO, I2S2ext_SD, USART3_RTS, TIM12_CH1 |+| 54 | PB15 | bidirectional | GPIO Port B pin 15 (OTG_HS_DP); Alternate functions: RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI/I2S2_SD, TIM12_CH2 |+| 55 | PD8 | bidirectional | GPIO Port D pin 8; Alternate functions: USART3_TX, FMC_D13 |+| 56 | PD9 | bidirectional | GPIO Port D pin 9; Alternate functions: USART3_RX, FMC_D14 |+| 57 | PD10 | bidirectional | GPIO Port D pin 10; Alternate functions: USART3_CK, FMC_D15, LCD_B3 |+| 58 | PD11 | bidirectional | GPIO Port D pin 11; Alternate functions: USART3_CTS, FMC_A16 |+| 59 | PD12 | bidirectional | GPIO Port D pin 12; Alternate functions: TIM4_CH1, USART3_RTS, FMC_A17 |+| 60 | PD13 | bidirectional | GPIO Port D pin 13; Alternate functions: TIM4_CH2, FMC_A18 |+| 61 | PD14 | bidirectional | GPIO Port D pin 14 (FMC_D0); Alternate functions: TIM4_CH3 |+| 62 | PD15 | bidirectional | GPIO Port D pin 15 (FMC_D1); Alternate functions: TIM4_CH4 |+| 63 | PC6 | bidirectional | |+| 64 | PC7 | bidirectional | |+| 65 | PC8 | bidirectional | |+| 66 | PC9 | bidirectional | |+| 67 | PA8 | bidirectional | GPIO Port A pin 8 (MCO1); Alternate functions: TIM1_CH1, I2C3_SCL, USART1_CK, OTG_FS_SOF, LCD_R6 |+| 68 | PA9 | bidirectional | GPIO Port A pin 9 (OTG_FS_VBUS); Alternate functions: TIM1_CH2, I2C3_SMBA, USART1_TX, DCMI_D0 |+| 69 | PA10 | bidirectional | GPIO Port A pin 10 (OTG_FS_ID); Alternate functions: TIM1_CH3, USART1_RX, DCMI_D1 |+| 70 | PA11 | bidirectional | GPIO Port A pin 11 (OTG_FS_DM); Alternate functions: TIM1_CH4, USART1_CTS, CAN1_RX, LCD_R4 |+| 71 | PA12 | bidirectional | GPIO Port A pin 12 (OTG_FS_DP); Alternate functions: TIM1_ETR, USART1_RTS, CAN1_TX, LCD_R5 |+| 72 | PA13 | bidirectional | |+| 73 | VCAP_2 | power_in | Internal regulator capacitor connection (2.2µF external ceramic capacitor required) |+| 74 | VSS | power_in | Ground connection |+| 75 | VDD | power_in | Main power supply voltage (1.7 to 3.6V) |+| 76 | PA14 | bidirectional | |+| 77 | PA15 | bidirectional | |+| 78 | PC10 | bidirectional | GPIO Port C pin 10; Alternate functions: SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, SDIO_D2, DCMI_D8, LCD_R2 |+| 79 | PC11 | bidirectional | GPIO Port C pin 11; Alternate functions: I2S3ext_SD, SPI3_MISO, USART3_RX, UART4_RX, SDIO_D3, DCMI_D4 |+| 80 | PC12 | bidirectional | GPIO Port C pin 12; Alternate functions: SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDIO_CK, DCMI_D9 |+| 81 | PD0 | bidirectional | GPIO Port D pin 0 (FMC_D2); Alternate functions: CAN1_RX |+| 82 | PD1 | bidirectional | GPIO Port D pin 1 (FMC_D3); Alternate functions: CAN1_TX |+| 83 | PD2 | bidirectional | GPIO Port D pin 2; Alternate functions: TIM3_ETR, UART5_RX, SDIO_CMD, DCMI_D11 |+| 84 | PD3 | bidirectional | GPIO Port D pin 3 (FMC_CLK); Alternate functions: SPI2_SCK/I2S2_CK, USART2_CTS, DCMI_D5, LCD_G7 |+| 85 | PD4 | bidirectional | GPIO Port D pin 4 (FMC_NOE); Alternate functions: USART2_RTS |+| 86 | PD5 | bidirectional | GPIO Port D pin 5 (FMC_NWE); Alternate functions: USART2_TX |+| 87 | PD6 | bidirectional | GPIO Port D pin 6 (FMC_NWAIT); Alternate functions: SPI3_MOSI/I2S3_SD, SAI1_SD_A, USART2_RX, DCMI_D10, LCD_B2 |+| 88 | PD7 | bidirectional | GPIO Port D pin 7 (FMC_NE1/FMC_NCE2); Alternate functions: USART2_CK |+| 89 | PB3 | bidirectional | |+| 90 | PB4 | bidirectional | |+| 91 | PB5 | bidirectional | GPIO Port B pin 5; Alternate functions: TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI/I2S3_SD, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1, DCMI_D10 |+| 92 | PB6 | bidirectional | GPIO Port B pin 6; Alternate functions: TIM4_CH1, I2C1_SCL, USART1_TX, CAN2_TX, FMC_SDNE1, DCMI_D5 |+| 93 | PB7 | bidirectional | GPIO Port B pin 7 (FMC_NL); Alternate functions: TIM4_CH2, I2C1_SDA, USART1_RX, DCMI_VSYNC |+| 94 | BOOT0 | input | Boot configuration pin with internal pull-down and weak pull-up; determines boot from Flash or system memory |+| 95 | PB8 | bidirectional | |+| 96 | PB9 | bidirectional | |+| 97 | PE0 | bidirectional | |+| 98 | PE1 | bidirectional | |+| 99 | VSS | power_in | Ground connection |+| 100 | VDD | power_in | Main power supply voltage (1.7 to 3.6V) | ## Key specifications
package.json+2−2@@ -1,6 +1,6 @@ { "slug": "stm32f429vgt6",- "version": "0.1.0",+ "version": "0.1.1", "type": "component", "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.", "tags": [@@ -685,4 +685,4 @@ "footprint": "viewers/footprint.html" } }-}+}
page.json+4−4@@ -4,7 +4,7 @@ "slug": "stm32f429vgt6", "title": "STM32F429VGT6", "brief": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.1.1", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -712,7 +712,7 @@ "viewers/symbol.html", "viewers/footprint.html" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "org": "adom" }
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x="-17.78" y="-43.18" length="middle" direction="io"/>+ <pin name="PE12" x="-17.78" y="-45.72" length="middle" direction="io"/>+ <pin name="PE13" x="-17.78" y="-48.26" length="middle" direction="io"/>+ <pin name="PE14" x="-17.78" y="-50.8" length="middle" direction="io"/>+ <pin name="PE15" x="-17.78" y="-53.34" length="middle" direction="io"/>+ <pin name="PB10" x="-17.78" y="-55.88" length="middle" direction="io"/>+ <pin name="PB11" x="-17.78" y="-58.42" length="middle" direction="io"/>+ <pin name="VCAP_1" x="-17.78" y="-60.96" length="middle" direction="pwr"/>+ <pin name="VDD@4" x="-17.78" y="-63.5" length="middle" direction="pwr"/>+ <pin name="VDD@5" x="17.78" y="60.96" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@3" x="17.78" y="58.42" length="middle" direction="pwr" rot="R180"/>+ <pin name="PE1" x="17.78" y="55.88" length="middle" direction="io" rot="R180"/>+ <pin name="PE0" x="17.78" y="53.34" length="middle" direction="io" rot="R180"/>+ <pin name="PB9" x="17.78" y="50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PB8" x="17.78" y="48.26" length="middle" direction="io" rot="R180"/>+ <pin name="BOOT0" x="17.78" y="45.72" length="middle" direction="in" rot="R180"/>+ <pin name="PB7" x="17.78" y="43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PB6" x="17.78" y="40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PB5" x="17.78" y="38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PB4" x="17.78" y="35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PB3" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PD7" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PD6" x="17.78" y="27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PD5" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PD4" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PD3" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PD2" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PD1" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PD0" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>+ <pin name="PA15" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+ <pin name="PA14" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@6" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@4" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+ <pin name="VCAP_2" x="17.78" y="-7.62" length="middle" direction="pwr" rot="R180"/>+ <pin name="PA13" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PA12" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PA11" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PA10" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PA9" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PA8" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PC9" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PC8" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PC7" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PC6" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PD15" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PD14" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PD13" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PD12" x="17.78" y="-43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PD11" x="17.78" y="-45.72" length="middle" direction="io" rot="R180"/>+ <pin name="PD10" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>+ <pin name="PD9" x="17.78" y="-50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PD8" x="17.78" y="-53.34" length="middle" direction="io" rot="R180"/>+ <pin name="PB15" x="17.78" y="-55.88" length="middle" direction="io" rot="R180"/>+ <pin name="PB14" x="17.78" y="-58.42" length="middle" direction="io" rot="R180"/>+ <pin name="PB13" x="17.78" y="-60.96" length="middle" direction="io" rot="R180"/>+ <pin name="PB12" x="17.78" y="-63.5" length="middle" direction="io" rot="R180"/> </symbol> </symbols> <devicesets> <deviceset name="STM32F429VGT6" prefix="U">- <description></description>+ <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data</description> <gates> <gate name="G$1" symbol="STM32F429VGT6" x="0" y="0"/> </gates>@@ -304,101 +305,111 @@ <connect gate="G$1" pin="PE6" pad="5"/> <connect gate="G$1" pin="VBAT" pad="6"/> <connect gate="G$1" pin="PC13" pad="7"/>- <connect gate="G$1" pin="PC14-OSC32_IN" pad="8"/>- <connect gate="G$1" pin="PC15-OSC32_OUT" pad="9"/>+ <connect gate="G$1" pin="PC14/OSC32_IN" pad="8"/>+ <connect gate="G$1" pin="PC15/OSC32_OUT" pad="9"/> <connect gate="G$1" pin="VSS" pad="10"/> <connect gate="G$1" pin="VDD" pad="11"/>- <connect gate="G$1" pin="PF0" pad="12"/>- <connect gate="G$1" pin="PF1" pad="13"/>- <connect gate="G$1" pin="PF2" pad="14"/>- <connect gate="G$1" pin="PF3" pad="15"/>- <connect gate="G$1" pin="PF4" pad="16"/>- <connect gate="G$1" pin="PF5" pad="17"/>- <connect gate="G$1" pin="VSS@2" pad="18"/>+ <connect gate="G$1" pin="PH0/OSC_IN" pad="12"/>+ <connect gate="G$1" pin="PH1/OSC_OUT" pad="13"/>+ <connect gate="G$1" pin="NRST" pad="14"/>+ <connect gate="G$1" pin="PC0" pad="15"/>+ <connect gate="G$1" pin="PC1" pad="16"/>+ <connect gate="G$1" pin="PC2" pad="17"/>+ <connect gate="G$1" pin="PC3" pad="18"/> <connect gate="G$1" pin="VDD@2" pad="19"/>- <connect gate="G$1" pin="PF6" pad="20"/>- <connect gate="G$1" pin="PF7" pad="21"/>- <connect gate="G$1" pin="PF8" pad="22"/>- <connect gate="G$1" pin="PF9" pad="23"/>- <connect gate="G$1" pin="PF10" pad="24"/>- <connect gate="G$1" pin="PH0-OSC_IN" pad="25"/>- <connect gate="G$1" pin="PH1-OSC_OUT" pad="26"/>- <connect gate="G$1" pin="NRST" pad="27"/>- <connect gate="G$1" pin="PC0" pad="28"/>- <connect gate="G$1" pin="PC1" pad="29"/>- <connect gate="G$1" pin="PC2" pad="30"/>- <connect gate="G$1" pin="PC3" pad="31"/>- <connect gate="G$1" pin="PA0-WKUP" pad="32"/>- <connect gate="G$1" pin="PA1" pad="33"/>- <connect gate="G$1" pin="PA2" pad="34"/>- <connect gate="G$1" pin="PA3" pad="35"/>- <connect gate="G$1" pin="PA4" pad="36"/>- <connect gate="G$1" pin="PA5" pad="37"/>- <connect gate="G$1" pin="PA6" pad="38"/>- <connect gate="G$1" pin="PA7" pad="39"/>- <connect gate="G$1" pin="PC4" pad="40"/>- <connect gate="G$1" pin="PC5" pad="41"/>- <connect gate="G$1" pin="PB0" pad="42"/>- <connect gate="G$1" pin="PB1" pad="43"/>- <connect gate="G$1" pin="PB2-BOOT1" pad="44"/>- <connect gate="G$1" pin="PE7" pad="45"/>- <connect gate="G$1" pin="PE8" pad="46"/>- <connect gate="G$1" pin="PE9" pad="47"/>- <connect gate="G$1" pin="VSS@3" pad="48"/>- <connect gate="G$1" pin="VDD@3" pad="49"/>- <connect gate="G$1" pin="PE10" pad="50"/>- <connect gate="G$1" pin="BOOT0" pad="100"/>- <connect gate="G$1" pin="PB7" pad="99"/>- <connect gate="G$1" pin="PB6" pad="98"/>- <connect gate="G$1" pin="PB5" pad="97"/>- <connect gate="G$1" pin="PB4-NJTRST" pad="96"/>- <connect gate="G$1" pin="PB3-JTDO/TRACESWO" pad="95"/>- <connect gate="G$1" pin="VDD@4" pad="94"/>- <connect gate="G$1" pin="VSS@4" pad="93"/>- <connect gate="G$1" pin="VCAP_2" pad="92"/>- <connect gate="G$1" pin="PA13-JTMS-SWDIO" pad="91"/>- <connect gate="G$1" pin="PA12" pad="90"/>- <connect gate="G$1" pin="PA11" pad="89"/>- <connect gate="G$1" pin="PA10" pad="88"/>- <connect gate="G$1" pin="PA9" pad="87"/>- <connect gate="G$1" pin="PA8" pad="86"/>- <connect gate="G$1" pin="PD7" pad="85"/>- <connect gate="G$1" pin="PD6" pad="84"/>- <connect gate="G$1" pin="PD5" pad="83"/>- <connect gate="G$1" pin="PD4" pad="82"/>- <connect gate="G$1" pin="PD3" pad="81"/>- <connect gate="G$1" pin="PD2" pad="80"/>- <connect gate="G$1" pin="PD1" pad="79"/>- <connect gate="G$1" pin="PD0" pad="78"/>- <connect gate="G$1" pin="PC12" pad="77"/>- <connect gate="G$1" pin="PC11" pad="76"/>- <connect gate="G$1" pin="PC10" pad="75"/>- <connect gate="G$1" pin="PA15-JTDI" pad="74"/>- <connect gate="G$1" pin="PA14-JTCK-SWCLK" pad="73"/>- <connect gate="G$1" pin="PD15" pad="72"/>- <connect gate="G$1" pin="PD14" pad="71"/>- <connect gate="G$1" pin="PD13" pad="70"/>- <connect gate="G$1" pin="PD12" pad="69"/>- <connect gate="G$1" pin="PD11" pad="68"/>- <connect gate="G$1" pin="PD10" pad="67"/>- <connect gate="G$1" pin="PD9" pad="66"/>- <connect gate="G$1" pin="PD8" pad="65"/>- <connect gate="G$1" pin="PB15" pad="64"/>- <connect gate="G$1" pin="PB14" pad="63"/>- <connect gate="G$1" pin="PB13" pad="62"/>- <connect gate="G$1" pin="PB12" pad="61"/>- <connect gate="G$1" pin="VDD@5" pad="60"/>- <connect gate="G$1" pin="VSS@5" pad="59"/>- <connect gate="G$1" pin="VCAP_1" pad="58"/>- <connect gate="G$1" pin="PB11" pad="57"/>- <connect gate="G$1" pin="PB10" pad="56"/>- <connect gate="G$1" pin="PE15" pad="55"/>- <connect gate="G$1" pin="PE14" pad="54"/>- <connect gate="G$1" pin="PE13" pad="53"/>- <connect gate="G$1" pin="PE12" pad="52"/>- <connect gate="G$1" pin="PE11" pad="51"/>+ <connect gate="G$1" pin="VSSA" pad="20"/>+ <connect gate="G$1" pin="VREF+" pad="21"/>+ <connect gate="G$1" pin="VDDA" pad="22"/>+ <connect gate="G$1" pin="PA0/WKUP" pad="23"/>+ <connect gate="G$1" pin="PA1" pad="24"/>+ <connect gate="G$1" pin="PA2" pad="25"/>+ <connect gate="G$1" pin="PA3" pad="26"/>+ <connect gate="G$1" pin="VSS@2" pad="27"/>+ <connect gate="G$1" pin="VDD@3" pad="28"/>+ <connect gate="G$1" pin="PA4" pad="29"/>+ <connect gate="G$1" pin="PA5" pad="30"/>+ <connect gate="G$1" pin="PA6" pad="31"/>+ <connect gate="G$1" pin="PA7" pad="32"/>+ <connect gate="G$1" pin="PC4" pad="33"/>+ <connect gate="G$1" pin="PC5" pad="34"/>+ <connect gate="G$1" pin="PB0" pad="35"/>+ <connect gate="G$1" pin="PB1" pad="36"/>+ <connect gate="G$1" pin="PB2/BOOT1" pad="37"/>+ <connect gate="G$1" pin="PE7" pad="38"/>+ <connect gate="G$1" pin="PE8" pad="39"/>+ <connect gate="G$1" pin="PE9" pad="40"/>+ <connect gate="G$1" pin="PE10" pad="41"/>+ <connect gate="G$1" pin="PE11" pad="42"/>+ <connect gate="G$1" pin="PE12" pad="43"/>+ <connect gate="G$1" pin="PE13" pad="44"/>+ <connect gate="G$1" pin="PE14" pad="45"/>+ <connect gate="G$1" pin="PE15" pad="46"/>+ <connect gate="G$1" pin="PB10" pad="47"/>+ <connect gate="G$1" pin="PB11" pad="48"/>+ <connect gate="G$1" pin="VCAP_1" pad="49"/>+ <connect gate="G$1" pin="VDD@4" pad="50"/>+ <connect gate="G$1" pin="VDD@5" pad="100"/>+ <connect gate="G$1" pin="VSS@3" pad="99"/>+ <connect gate="G$1" pin="PE1" pad="98"/>+ <connect gate="G$1" pin="PE0" pad="97"/>+ <connect gate="G$1" pin="PB9" pad="96"/>+ <connect gate="G$1" pin="PB8" pad="95"/>+ <connect gate="G$1" pin="BOOT0" pad="94"/>+ <connect gate="G$1" pin="PB7" pad="93"/>+ <connect gate="G$1" pin="PB6" pad="92"/>+ <connect gate="G$1" pin="PB5" pad="91"/>+ <connect gate="G$1" pin="PB4" pad="90"/>+ <connect gate="G$1" pin="PB3" pad="89"/>+ <connect gate="G$1" pin="PD7" pad="88"/>+ <connect gate="G$1" pin="PD6" pad="87"/>+ <connect gate="G$1" pin="PD5" pad="86"/>+ <connect gate="G$1" pin="PD4" pad="85"/>+ <connect gate="G$1" pin="PD3" pad="84"/>+ <connect gate="G$1" pin="PD2" pad="83"/>+ <connect gate="G$1" pin="PD1" pad="82"/>+ <connect gate="G$1" pin="PD0" pad="81"/>+ <connect gate="G$1" pin="PC12" pad="80"/>+ <connect gate="G$1" pin="PC11" pad="79"/>+ <connect gate="G$1" pin="PC10" pad="78"/>+ <connect gate="G$1" pin="PA15" pad="77"/>+ <connect gate="G$1" pin="PA14" pad="76"/>+ <connect gate="G$1" pin="VDD@6" pad="75"/>+ <connect gate="G$1" pin="VSS@4" pad="74"/>+ <connect gate="G$1" pin="VCAP_2" pad="73"/>+ <connect gate="G$1" pin="PA13" pad="72"/>+ <connect gate="G$1" pin="PA12" pad="71"/>+ <connect gate="G$1" pin="PA11" pad="70"/>+ <connect gate="G$1" pin="PA10" pad="69"/>+ <connect gate="G$1" pin="PA9" pad="68"/>+ <connect gate="G$1" pin="PA8" pad="67"/>+ <connect gate="G$1" pin="PC9" pad="66"/>+ <connect gate="G$1" pin="PC8" pad="65"/>+ <connect gate="G$1" pin="PC7" pad="64"/>+ <connect gate="G$1" pin="PC6" pad="63"/>+ <connect gate="G$1" pin="PD15" pad="62"/>+ <connect gate="G$1" pin="PD14" pad="61"/>+ <connect gate="G$1" pin="PD13" pad="60"/>+ <connect gate="G$1" pin="PD12" pad="59"/>+ <connect gate="G$1" pin="PD11" pad="58"/>+ <connect gate="G$1" pin="PD10" pad="57"/>+ <connect gate="G$1" pin="PD9" pad="56"/>+ <connect gate="G$1" pin="PD8" pad="55"/>+ <connect gate="G$1" pin="PB15" pad="54"/>+ <connect gate="G$1" pin="PB14" pad="53"/>+ <connect gate="G$1" pin="PB13" pad="52"/>+ <connect gate="G$1" pin="PB12" pad="51"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="STM32F429VGT6" constant="no"/>+ <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+ <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586183807267983360" constant="no"/>+ <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/stm32f429vgt6" constant="no"/>+ <attribute name="MOUSER_PN" value="511-STM32F429VGT6" constant="no"/>+ <attribute name="DIGIKEY_PN" value="497-17459-ND" constant="no"/>+ <attribute name="LCSC_PN" value="C95448" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>