component
STM32F427ZIT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
← Commit history
Publish 0.1.1
5 files changed
+717−706
README.md+142−142@@ -8,150 +8,150 @@ STM32F427ZIT6 from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin desc | Pin | Name | Type | Function | |---|---|---|---|-| 1 | PE2 | output | GPIO Port E pin 2; can be configured for alternate functions including SPI4_CLK, SAI1_MCLK_A, and other peripherals |-| 2 | PE3 | output | GPIO Port E pin 3; can be configured for alternate functions including SPI4_MOSI and other peripherals |-| 3 | PE4 | output | GPIO Port E pin 4; can be configured for alternate functions including SPI4_MISO and other peripherals |-| 4 | PE5 | output | GPIO Port E pin 5; can be configured for alternate functions including SPI4_NSS and other peripherals |-| 5 | PE6 | output | GPIO Port E pin 6; can be configured for alternate functions including TIM9_CH2 and other peripherals |+| 1 | PE2 | bidirectional | GPIO Port E pin 2; can be configured for alternate functions including SPI4_CLK, SAI1_MCLK_A, and other peripherals |+| 2 | PE3 | bidirectional | GPIO Port E pin 3; can be configured for alternate functions including SPI4_MOSI and other peripherals |+| 3 | PE4 | bidirectional | GPIO Port E pin 4; can be configured for alternate functions including SPI4_MISO and other peripherals |+| 4 | PE5 | bidirectional | GPIO Port E pin 5; can be configured for alternate functions including SPI4_NSS and other peripherals |+| 5 | PE6 | bidirectional | GPIO Port E pin 6; can be configured for alternate functions including TIM9_CH2 and other peripherals | | 6 | VBAT | power_in | Battery voltage supply pin (1.65 V to 3.6 V); always powered independently of VDD |-| 7 | VSS | power_in | Ground reference; must be connected to system ground |-| 8 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |-| 9 | PC13 | input | GPIO Port C pin 13; typically used with 32 kHz oscillator; can be configured for RTC_AF1 and other functions |-| 10 | PC14-OSC32_IN | input | GPIO Port C pin 14 / 32 kHz oscillator input; can be used as OSC32_IN for RTC or as GPIO |-| 11 | PC15-OSC32_OUT | output | GPIO Port C pin 15 / 32 kHz oscillator output; can be used as OSC32_OUT for RTC or as GPIO |-| 12 | PH0-OSC_IN | input | GPIO Port H pin 0 / main oscillator input; can be used as OSC_IN for system clock or as GPIO |-| 13 | PH1-OSC_OUT | output | GPIO Port H pin 1 / main oscillator output; can be used as OSC_OUT for system clock or as GPIO |-| 14 | NRST | input | External reset pin (active low); 100 nF capacitor must be connected to ground |-| 15 | PC0 | output | GPIO Port C pin 0; can be configured for alternate functions including ADC12_IN10 and other peripherals |-| 16 | PC1 | output | GPIO Port C pin 1; can be configured for alternate functions including ADC12_IN11 and other peripherals |-| 17 | PC2 | output | GPIO Port C pin 2; can be configured for alternate functions including ADC12_IN12 and other peripherals |-| 18 | PC3 | output | GPIO Port C pin 3; can be configured for alternate functions including ADC12_IN13 and other peripherals |-| 19 | VSSA | power_in | Analog ground reference; must be connected to VSS |-| 20 | VDDA | power_in | Analog supply voltage (1.65 V to 3.6 V); must be filtered and decoupled separately from VDD |-| 21 | PA0 | output | GPIO Port A pin 0; can be configured for alternate functions including ADC123_IN0, UART4_TX, and other peripherals |-| 22 | PA1 | output | GPIO Port A pin 1; can be configured for alternate functions including ADC123_IN1, UART4_RX, and other peripherals |-| 23 | PA2 | output | GPIO Port A pin 2; can be configured for alternate functions including ADC123_IN2, USART2_TX, and other peripherals |-| 24 | PA3 | output | GPIO Port A pin 3; can be configured for alternate functions including ADC123_IN3, USART2_RX, and other peripherals |-| 25 | VSS | power_in | Ground reference; must be connected to system ground |-| 26 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |-| 27 | PA4 | output | GPIO Port A pin 4; can be configured for alternate functions including ADC12_IN4, SPI1_NSS, and other peripherals |-| 28 | PA5 | output | GPIO Port A pin 5; can be configured for alternate functions including ADC12_IN5, SPI1_CLK, and other peripherals |-| 29 | PA6 | output | GPIO Port A pin 6; can be configured for alternate functions including ADC12_IN6, SPI1_MISO, and other peripherals |-| 30 | PA7 | output | GPIO Port A pin 7; can be configured for alternate functions including ADC12_IN7, SPI1_MOSI, and other peripherals |-| 31 | PC4 | output | GPIO Port C pin 4; can be configured for alternate functions including ADC12_IN14 and other peripherals |-| 32 | PC5 | output | GPIO Port C pin 5; can be configured for alternate functions including ADC12_IN15 and other peripherals |-| 33 | PB0 | output | GPIO Port B pin 0; can be configured for alternate functions including ADC12_IN8 and other peripherals |-| 34 | PB1 | output | GPIO Port B pin 1; can be configured for alternate functions including ADC12_IN9 and other peripherals |-| 35 | PB2 | output | GPIO Port B pin 2; can be configured for alternate functions including BOOT1 and other peripherals |-| 36 | VSS | power_in | Ground reference; must be connected to system ground |-| 37 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |-| 38 | PB3 | output | GPIO Port B pin 3; can be configured for alternate functions including SPI1_CLK, JTAG_TDO, and other peripherals |-| 39 | PB4 | output | GPIO Port B pin 4; can be configured for alternate functions including SPI1_MISO, JTAG_TRST, and other peripherals |-| 40 | PB5 | output | GPIO Port B pin 5; can be configured for alternate functions including SPI1_MOSI and other peripherals |-| 41 | PB6 | output | GPIO Port B pin 6; can be configured for alternate functions including I2C1_SCL, USART1_TX, and other peripherals |-| 42 | PB7 | output | GPIO Port B pin 7; can be configured for alternate functions including I2C1_SDA, USART1_RX, and other peripherals |-| 43 | BOOT0 | input | Boot mode selection pin; sampled at device startup to determine boot source |-| 44 | PB8 | output | GPIO Port B pin 8; can be configured for alternate functions including I2C1_SCL, TIM4_CH3, and other peripherals |-| 45 | PB9 | output | GPIO Port B pin 9; can be configured for alternate functions including I2C1_SDA, TIM4_CH4, and other peripherals |-| 46 | PE0 | output | GPIO Port E pin 0; can be configured for alternate functions including TIM4_ETR and other peripherals |-| 47 | PE1 | output | GPIO Port E pin 1; can be configured for alternate functions including TIM1_CH1N and other peripherals |-| 48 | VSS | power_in | Ground reference; must be connected to system ground |-| 49 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |-| 50 | PE7 | output | GPIO Port E pin 7; can be configured for alternate functions including TIM1_ETR and other peripherals |-| 51 | PE8 | output | GPIO Port E pin 8; can be configured for alternate functions including TIM1_CH1N and other peripherals |-| 52 | PE9 | output | GPIO Port E pin 9; can be configured for alternate functions including TIM1_CH1 and other peripherals |-| 53 | PE10 | output | GPIO Port E pin 10; can be configured for alternate functions including TIM1_CH2N and other peripherals |-| 54 | PE11 | output | GPIO Port E pin 11; can be configured for alternate functions including TIM1_CH2 and other peripherals |-| 55 | PE12 | output | GPIO Port E pin 12; can be configured for alternate functions including SPI4_CLK and other peripherals |-| 56 | PE13 | output | GPIO Port E pin 13; can be configured for alternate functions including SPI4_MOSI and other peripherals |-| 57 | PE14 | output | GPIO Port E pin 14; can be configured for alternate functions including SPI4_MISO and other peripherals |-| 58 | PE15 | output | GPIO Port E pin 15; can be configured for alternate functions including SPI4_NSS and other peripherals |-| 59 | VSS | power_in | Ground reference; must be connected to system ground |-| 60 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |-| 61 | PB10 | output | GPIO Port B pin 10; can be configured for alternate functions including I2C2_SCL, USART3_TX, and other peripherals |-| 62 | PB11 | output | GPIO Port B pin 11; can be configured for alternate functions including I2C2_SDA, USART3_RX, and other peripherals |-| 63 | PB12 | output | GPIO Port B pin 12; can be configured for alternate functions including SPI2_NSS, I2C2_SMBA, and other peripherals |-| 64 | PB13 | output | GPIO Port B pin 13; can be configured for alternate functions including SPI2_CLK and other peripherals |-| 65 | PB14 | output | GPIO Port B pin 14; can be configured for alternate functions including SPI2_MISO and other peripherals |-| 66 | PB15 | output | GPIO Port B pin 15; can be configured for alternate functions including SPI2_MOSI and other peripherals |-| 67 | PD8 | output | GPIO Port D pin 8; can be configured for alternate functions including USART3_TX and other peripherals |-| 68 | PD9 | output | GPIO Port D pin 9; can be configured for alternate functions including USART3_RX and other peripherals |-| 69 | PD10 | output | GPIO Port D pin 10; can be configured for alternate functions including USART3_CK and other peripherals |-| 70 | PD11 | output | GPIO Port D pin 11; can be configured for alternate functions including USART3_CTS and other peripherals |-| 71 | VSS | power_in | Ground reference; must be connected to system ground |+| 7 | PC13 | bidirectional | GPIO Port C pin 13; typically used with 32 kHz oscillator; can be configured for RTC_AF1 and other functions |+| 8 | PC14/OSC32_IN | bidirectional | GPIO Port C pin 14 / 32 kHz oscillator input; can be used as OSC32_IN for RTC or as GPIO |+| 9 | PC15/OSC32_OUT | bidirectional | GPIO Port C pin 15 / 32 kHz oscillator output; can be used as OSC32_OUT for RTC or as GPIO |+| 10 | PF0 | bidirectional | |+| 11 | PF1 | bidirectional | |+| 12 | PF2 | bidirectional | |+| 13 | PF3 | bidirectional | |+| 14 | PF4 | bidirectional | |+| 15 | PF5 | bidirectional | |+| 16 | VSS | power_in | Ground reference; must be connected to system ground |+| 17 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |+| 18 | PF6 | bidirectional | |+| 19 | PF7 | bidirectional | |+| 20 | PF8 | bidirectional | |+| 21 | PF9 | bidirectional | |+| 22 | PF10 | bidirectional | |+| 23 | PH0/OSC_IN | bidirectional | GPIO Port H pin 0 / main oscillator input; can be used as OSC_IN for system clock or as GPIO |+| 24 | PH1/OSC_OUT | bidirectional | GPIO Port H pin 1 / main oscillator output; can be used as OSC_OUT for system clock or as GPIO |+| 25 | NRST | input | External reset pin (active low); 100 nF capacitor must be connected to ground |+| 26 | PC0 | bidirectional | GPIO Port C pin 0; can be configured for alternate functions including ADC12_IN10 and other peripherals |+| 27 | PC1 | bidirectional | GPIO Port C pin 1; can be configured for alternate functions including ADC12_IN11 and other peripherals |+| 28 | PC2 | bidirectional | GPIO Port C pin 2; can be configured for alternate functions including ADC12_IN12 and other peripherals |+| 29 | PC3 | bidirectional | GPIO Port C pin 3; can be configured for alternate functions including ADC12_IN13 and other peripherals |+| 30 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |+| 31 | VSSA | power_in | Analog ground reference; must be connected to VSS |+| 32 | VREF+ | power_in | |+| 33 | VDDA | power_in | Analog supply voltage (1.65 V to 3.6 V); must be filtered and decoupled separately from VDD |+| 34 | PA0/WKUP | bidirectional | |+| 35 | PA1 | bidirectional | GPIO Port A pin 1; can be configured for alternate functions including ADC123_IN1, UART4_RX, and other peripherals |+| 36 | PA2 | bidirectional | GPIO Port A pin 2; can be configured for alternate functions including ADC123_IN2, USART2_TX, and other peripherals |+| 37 | PA3 | bidirectional | GPIO Port A pin 3; can be configured for alternate functions including ADC123_IN3, USART2_RX, and other peripherals |+| 38 | VSS | power_in | Ground reference; must be connected to system ground |+| 39 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |+| 40 | PA4 | bidirectional | GPIO Port A pin 4; can be configured for alternate functions including ADC12_IN4, SPI1_NSS, and other peripherals |+| 41 | PA5 | bidirectional | GPIO Port A pin 5; can be configured for alternate functions including ADC12_IN5, SPI1_CLK, and other peripherals |+| 42 | PA6 | bidirectional | GPIO Port A pin 6; can be configured for alternate functions including ADC12_IN6, SPI1_MISO, and other peripherals |+| 43 | PA7 | bidirectional | GPIO Port A pin 7; can be configured for alternate functions including ADC12_IN7, SPI1_MOSI, and other peripherals |+| 44 | PC4 | bidirectional | GPIO Port C pin 4; can be configured for alternate functions including ADC12_IN14 and other peripherals |+| 45 | PC5 | bidirectional | GPIO Port C pin 5; can be configured for alternate functions including ADC12_IN15 and other peripherals |+| 46 | PB0 | bidirectional | GPIO Port B pin 0; can be configured for alternate functions including ADC12_IN8 and other peripherals |+| 47 | PB1 | bidirectional | GPIO Port B pin 1; can be configured for alternate functions including ADC12_IN9 and other peripherals |+| 48 | PB2/BOOT1 | bidirectional | |+| 49 | PF11 | bidirectional | |+| 50 | PF12 | bidirectional | |+| 51 | VSS | power_in | Ground reference; must be connected to system ground |+| 52 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |+| 53 | PF13 | bidirectional | |+| 54 | PF14 | bidirectional | |+| 55 | PF15 | bidirectional | |+| 56 | PG0 | bidirectional | GPIO Port G pin 0; can be configured for alternate functions and other peripherals |+| 57 | PG1 | bidirectional | GPIO Port G pin 1; can be configured for alternate functions and other peripherals |+| 58 | PE7 | bidirectional | GPIO Port E pin 7; can be configured for alternate functions including TIM1_ETR and other peripherals |+| 59 | PE8 | bidirectional | GPIO Port E pin 8; can be configured for alternate functions including TIM1_CH1N and other peripherals |+| 60 | PE9 | bidirectional | GPIO Port E pin 9; can be configured for alternate functions including TIM1_CH1 and other peripherals |+| 61 | VSS | power_in | Ground reference; must be connected to system ground |+| 62 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |+| 63 | PE10 | bidirectional | GPIO Port E pin 10; can be configured for alternate functions including TIM1_CH2N and other peripherals |+| 64 | PE11 | bidirectional | GPIO Port E pin 11; can be configured for alternate functions including TIM1_CH2 and other peripherals |+| 65 | PE12 | bidirectional | GPIO Port E pin 12; can be configured for alternate functions including SPI4_CLK and other peripherals |+| 66 | PE13 | bidirectional | GPIO Port E pin 13; can be configured for alternate functions including SPI4_MOSI and other peripherals |+| 67 | PE14 | bidirectional | GPIO Port E pin 14; can be configured for alternate functions including SPI4_MISO and other peripherals |+| 68 | PE15 | bidirectional | GPIO Port E pin 15; can be configured for alternate functions including SPI4_NSS and other peripherals |+| 69 | PB10 | bidirectional | GPIO Port B pin 10; can be configured for alternate functions including I2C2_SCL, USART3_TX, and other peripherals |+| 70 | PB11 | bidirectional | GPIO Port B pin 11; can be configured for alternate functions including I2C2_SDA, USART3_RX, and other peripherals |+| 71 | VCAP_1 | power_in | Supply voltage capacitor for internal voltage regulator; 1-10 µF capacitor to ground required | | 72 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |-| 73 | PD12 | output | GPIO Port D pin 12; can be configured for alternate functions including USART3_RTS and other peripherals |-| 74 | PD13 | output | GPIO Port D pin 13; can be configured for alternate functions including TIM4_CH1 and other peripherals |-| 75 | PD14 | output | GPIO Port D pin 14; can be configured for alternate functions including TIM4_CH2 and other peripherals |-| 76 | PD15 | output | GPIO Port D pin 15; can be configured for alternate functions including TIM4_CH3 and other peripherals |-| 77 | PC6 | output | GPIO Port C pin 6; can be configured for alternate functions including TIM8_CH1 and other peripherals |-| 78 | PC7 | output | GPIO Port C pin 7; can be configured for alternate functions including TIM8_CH2 and other peripherals |-| 79 | PC8 | output | GPIO Port C pin 8; can be configured for alternate functions including TIM8_CH3 and other peripherals |-| 80 | PC9 | output | GPIO Port C pin 9; can be configured for alternate functions including TIM8_CH4 and other peripherals |-| 81 | PA8 | output | GPIO Port A pin 8; can be configured for alternate functions including USART1_CK, MCO1, and other peripherals |-| 82 | PA9 | output | GPIO Port A pin 9; can be configured for alternate functions including USART1_TX and other peripherals |-| 83 | PA10 | output | GPIO Port A pin 10; can be configured for alternate functions including USART1_RX and other peripherals |-| 84 | PA11 | output | GPIO Port A pin 11; can be configured for alternate functions including USB_DM and other peripherals |-| 85 | VSS | power_in | Ground reference; must be connected to system ground |-| 86 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |-| 87 | PA12 | output | GPIO Port A pin 12; can be configured for alternate functions including USB_DP and other peripherals |-| 88 | PA13 | output | GPIO Port A pin 13; can be configured for alternate functions including JTAG_TMS, SWDIO, and other peripherals |-| 89 | VCAP1 | passive | Supply voltage capacitor for internal voltage regulator; 1-10 µF capacitor to ground required |-| 90 | VSS | power_in | Ground reference; must be connected to system ground |-| 91 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |-| 92 | PA14 | output | GPIO Port A pin 14; can be configured for alternate functions including JTAG_TCO, SWCLK, and other peripherals |-| 93 | PA15 | output | GPIO Port A pin 15; can be configured for alternate functions including JTAG_TDI and other peripherals |-| 94 | PC10 | output | GPIO Port C pin 10; can be configured for alternate functions including USART3_TX and other peripherals |-| 95 | PC11 | output | GPIO Port C pin 11; can be configured for alternate functions including USART3_RX and other peripherals |-| 96 | PC12 | output | GPIO Port C pin 12; can be configured for alternate functions including USART3_CK and other peripherals |-| 97 | PD0 | output | GPIO Port D pin 0; can be configured for alternate functions including CAN1_RX and other peripherals |-| 98 | PD1 | output | GPIO Port D pin 1; can be configured for alternate functions including CAN1_TX and other peripherals |-| 99 | PD2 | output | GPIO Port D pin 2; can be configured for alternate functions including USART5_RX and other peripherals |-| 100 | VSS | power_in | Ground reference; must be connected to system ground |-| 101 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |-| 102 | PD3 | output | GPIO Port D pin 3; can be configured for alternate functions including USART2_CTS and other peripherals |-| 103 | PD4 | output | GPIO Port D pin 4; can be configured for alternate functions including USART2_RTS and other peripherals |-| 104 | PD5 | output | GPIO Port D pin 5; can be configured for alternate functions including USART2_TX and other peripherals |-| 105 | PD6 | output | GPIO Port D pin 6; can be configured for alternate functions including USART2_RX and other peripherals |-| 106 | PD7 | output | GPIO Port D pin 7; can be configured for alternate functions including USART2_CK and other peripherals |-| 107 | PG2 | output | GPIO Port G pin 2; can be configured for alternate functions including SPI4_MOSI and other peripherals |-| 108 | PG3 | output | GPIO Port G pin 3; can be configured for alternate functions including SPI4_MISO and other peripherals |-| 109 | PG4 | output | GPIO Port G pin 4; can be configured for alternate functions including SPI4_NSS and other peripherals |-| 110 | PG5 | output | GPIO Port G pin 5; can be configured for alternate functions and other peripherals |-| 111 | VSS | power_in | Ground reference; must be connected to system ground |-| 112 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |-| 113 | PG6 | output | GPIO Port G pin 6; can be configured for alternate functions and other peripherals |-| 114 | PG7 | output | GPIO Port G pin 7; can be configured for alternate functions and other peripherals |-| 115 | PG8 | output | GPIO Port G pin 8; can be configured for alternate functions and other peripherals |-| 116 | PG9 | output | GPIO Port G pin 9; can be configured for alternate functions and other peripherals |-| 117 | PG10 | output | GPIO Port G pin 10; can be configured for alternate functions and other peripherals |-| 118 | PG11 | output | GPIO Port G pin 11; can be configured for alternate functions and other peripherals |-| 119 | PG12 | output | GPIO Port G pin 12; can be configured for alternate functions and other peripherals |-| 120 | PG13 | output | GPIO Port G pin 13; can be configured for alternate functions and other peripherals |-| 121 | VSS | power_in | Ground reference; must be connected to system ground |-| 122 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |-| 123 | PG14 | output | GPIO Port G pin 14; can be configured for alternate functions and other peripherals |-| 124 | PG15 | output | GPIO Port G pin 15; can be configured for alternate functions and other peripherals |-| 125 | PH2 | output | GPIO Port H pin 2; can be configured for alternate functions and other peripherals |-| 126 | PH3 | output | GPIO Port H pin 3; can be configured for alternate functions and other peripherals |-| 127 | PH4 | output | GPIO Port H pin 4; can be configured for alternate functions and other peripherals |-| 128 | PH5 | output | GPIO Port H pin 5; can be configured for alternate functions and other peripherals |-| 129 | PH6 | output | GPIO Port H pin 6; can be configured for alternate functions and other peripherals |-| 130 | PH7 | output | GPIO Port H pin 7; can be configured for alternate functions and other peripherals |-| 131 | VSS | power_in | Ground reference; must be connected to system ground |-| 132 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |-| 133 | PH8 | output | GPIO Port H pin 8; can be configured for alternate functions and other peripherals |-| 134 | PH9 | output | GPIO Port H pin 9; can be configured for alternate functions and other peripherals |-| 135 | PH10 | output | GPIO Port H pin 10; can be configured for alternate functions and other peripherals |-| 136 | PH11 | output | GPIO Port H pin 11; can be configured for alternate functions and other peripherals |-| 137 | PH12 | output | GPIO Port H pin 12; can be configured for alternate functions and other peripherals |-| 138 | PH13 | output | GPIO Port H pin 13; can be configured for alternate functions and other peripherals |-| 139 | PH14 | output | GPIO Port H pin 14; can be configured for alternate functions and other peripherals |-| 140 | PH15 | output | GPIO Port H pin 15; can be configured for alternate functions and other peripherals |-| 141 | VSS | power_in | Ground reference; must be connected to system ground |-| 142 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |-| 143 | PG0 | output | GPIO Port G pin 0; can be configured for alternate functions and other peripherals |-| 144 | PG1 | output | GPIO Port G pin 1; can be configured for alternate functions and other peripherals |+| 73 | PB12 | bidirectional | GPIO Port B pin 12; can be configured for alternate functions including SPI2_NSS, I2C2_SMBA, and other peripherals |+| 74 | PB13 | bidirectional | GPIO Port B pin 13; can be configured for alternate functions including SPI2_CLK and other peripherals |+| 75 | PB14 | bidirectional | GPIO Port B pin 14; can be configured for alternate functions including SPI2_MISO and other peripherals |+| 76 | PB15 | bidirectional | GPIO Port B pin 15; can be configured for alternate functions including SPI2_MOSI and other peripherals |+| 77 | PD8 | bidirectional | GPIO Port D pin 8; can be configured for alternate functions including USART3_TX and other peripherals |+| 78 | PD9 | bidirectional | GPIO Port D pin 9; can be configured for alternate functions including USART3_RX and other peripherals |+| 79 | PD10 | bidirectional | GPIO Port D pin 10; can be configured for alternate functions including USART3_CK and other peripherals |+| 80 | PD11 | bidirectional | GPIO Port D pin 11; can be configured for alternate functions including USART3_CTS and other peripherals |+| 81 | PD12 | bidirectional | GPIO Port D pin 12; can be configured for alternate functions including USART3_RTS and other peripherals |+| 82 | PD13 | bidirectional | GPIO Port D pin 13; can be configured for alternate functions including TIM4_CH1 and other peripherals |+| 83 | VSS | power_in | Ground reference; must be connected to system ground |+| 84 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |+| 85 | PD14 | bidirectional | GPIO Port D pin 14; can be configured for alternate functions including TIM4_CH2 and other peripherals |+| 86 | PD15 | bidirectional | GPIO Port D pin 15; can be configured for alternate functions including TIM4_CH3 and other peripherals |+| 87 | PG2 | bidirectional | GPIO Port G pin 2; can be configured for alternate functions including SPI4_MOSI and other peripherals |+| 88 | PG3 | bidirectional | GPIO Port G pin 3; can be configured for alternate functions including SPI4_MISO and other peripherals |+| 89 | PG4 | bidirectional | GPIO Port G pin 4; can be configured for alternate functions including SPI4_NSS and other peripherals |+| 90 | PG5 | bidirectional | GPIO Port G pin 5; can be configured for alternate functions and other peripherals |+| 91 | PG6 | bidirectional | GPIO Port G pin 6; can be configured for alternate functions and other peripherals |+| 92 | PG7 | bidirectional | GPIO Port G pin 7; can be configured for alternate functions and other peripherals |+| 93 | PG8 | bidirectional | GPIO Port G pin 8; can be configured for alternate functions and other peripherals |+| 94 | VSS | power_in | Ground reference; must be connected to system ground |+| 95 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |+| 96 | PC6 | bidirectional | GPIO Port C pin 6; can be configured for alternate functions including TIM8_CH1 and other peripherals |+| 97 | PC7 | bidirectional | GPIO Port C pin 7; can be configured for alternate functions including TIM8_CH2 and other peripherals |+| 98 | PC8 | bidirectional | GPIO Port C pin 8; can be configured for alternate functions including TIM8_CH3 and other peripherals |+| 99 | PC9 | bidirectional | GPIO Port C pin 9; can be configured for alternate functions including TIM8_CH4 and other peripherals |+| 100 | PA8 | bidirectional | GPIO Port A pin 8; can be configured for alternate functions including USART1_CK, MCO1, and other peripherals |+| 101 | PA9 | bidirectional | GPIO Port A pin 9; can be configured for alternate functions including USART1_TX and other peripherals |+| 102 | PA10 | bidirectional | GPIO Port A pin 10; can be configured for alternate functions including USART1_RX and other peripherals |+| 103 | PA11 | bidirectional | GPIO Port A pin 11; can be configured for alternate functions including USB_DM and other peripherals |+| 104 | PA12 | bidirectional | GPIO Port A pin 12; can be configured for alternate functions including USB_DP and other peripherals |+| 105 | PA13 | bidirectional | GPIO Port A pin 13; can be configured for alternate functions including JTAG_TMS, SWDIO, and other peripherals |+| 106 | VCAP_2 | power_in | |+| 107 | VSS | power_in | Ground reference; must be connected to system ground |+| 108 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |+| 109 | PA14 | bidirectional | GPIO Port A pin 14; can be configured for alternate functions including JTAG_TCO, SWCLK, and other peripherals |+| 110 | PA15 | bidirectional | GPIO Port A pin 15; can be configured for alternate functions including JTAG_TDI and other peripherals |+| 111 | PC10 | bidirectional | GPIO Port C pin 10; can be configured for alternate functions including USART3_TX and other peripherals |+| 112 | PC11 | bidirectional | GPIO Port C pin 11; can be configured for alternate functions including USART3_RX and other peripherals |+| 113 | PC12 | bidirectional | GPIO Port C pin 12; can be configured for alternate functions including USART3_CK and other peripherals |+| 114 | PD0 | bidirectional | GPIO Port D pin 0; can be configured for alternate functions including CAN1_RX and other peripherals |+| 115 | PD1 | bidirectional | GPIO Port D pin 1; can be configured for alternate functions including CAN1_TX and other peripherals |+| 116 | PD2 | bidirectional | GPIO Port D pin 2; can be configured for alternate functions including USART5_RX and other peripherals |+| 117 | PD3 | bidirectional | GPIO Port D pin 3; can be configured for alternate functions including USART2_CTS and other peripherals |+| 118 | PD4 | bidirectional | GPIO Port D pin 4; can be configured for alternate functions including USART2_RTS and other peripherals |+| 119 | PD5 | bidirectional | GPIO Port D pin 5; can be configured for alternate functions including USART2_TX and other peripherals |+| 120 | VSS | power_in | Ground reference; must be connected to system ground |+| 121 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |+| 122 | PD6 | bidirectional | GPIO Port D pin 6; can be configured for alternate functions including USART2_RX and other peripherals |+| 123 | PD7 | bidirectional | GPIO Port D pin 7; can be configured for alternate functions including USART2_CK and other peripherals |+| 124 | PG9 | bidirectional | GPIO Port G pin 9; can be configured for alternate functions and other peripherals |+| 125 | PG10 | bidirectional | GPIO Port G pin 10; can be configured for alternate functions and other peripherals |+| 126 | PG11 | bidirectional | GPIO Port G pin 11; can be configured for alternate functions and other peripherals |+| 127 | PG12 | bidirectional | GPIO Port G pin 12; can be configured for alternate functions and other peripherals |+| 128 | PG13 | bidirectional | GPIO Port G pin 13; can be configured for alternate functions and other peripherals |+| 129 | PG14 | bidirectional | GPIO Port G pin 14; can be configured for alternate functions and other peripherals |+| 130 | VSS | power_in | Ground reference; must be connected to system ground |+| 131 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device |+| 132 | PG15 | bidirectional | GPIO Port G pin 15; can be configured for alternate functions and other peripherals |+| 133 | PB3 | bidirectional | GPIO Port B pin 3; can be configured for alternate functions including SPI1_CLK, JTAG_TDO, and other peripherals |+| 134 | PB4 | bidirectional | GPIO Port B pin 4; can be configured for alternate functions including SPI1_MISO, JTAG_TRST, and other peripherals |+| 135 | PB5 | bidirectional | GPIO Port B pin 5; can be configured for alternate functions including SPI1_MOSI and other peripherals |+| 136 | PB6 | bidirectional | GPIO Port B pin 6; can be configured for alternate functions including I2C1_SCL, USART1_TX, and other peripherals |+| 137 | PB7 | bidirectional | GPIO Port B pin 7; can be configured for alternate functions including I2C1_SDA, USART1_RX, and other peripherals |+| 138 | BOOT0 | input | Boot mode selection pin; sampled at device startup to determine boot source |+| 139 | PB8 | bidirectional | GPIO Port B pin 8; can be configured for alternate functions including I2C1_SCL, TIM4_CH3, and other peripherals |+| 140 | PB9 | bidirectional | GPIO Port B pin 9; can be configured for alternate functions including I2C1_SDA, TIM4_CH4, and other peripherals |+| 141 | PE0 | bidirectional | GPIO Port E pin 0; can be configured for alternate functions including TIM4_ETR and other peripherals |+| 142 | PE1 | bidirectional | GPIO Port E pin 1; can be configured for alternate functions including TIM1_CH1N and other peripherals |+| 143 | PDR_ON | input | |+| 144 | VDD | power_in | Main supply voltage (1.65 V to 3.6 V); primary power supply for the device | ## Key specifications
package.json+2−2@@ -1,6 +1,6 @@ { "slug": "stm32f427zit6",- "version": "0.1.0",+ "version": "0.1.1", "type": "component", "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.", "tags": [@@ -949,4 +949,4 @@ "footprint": "viewers/footprint.html" } }-}+}
page.json+4−4@@ -4,7 +4,7 @@ "slug": "stm32f427zit6", "title": "STM32F427ZIT6", "brief": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.1.1", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -976,7 +976,7 @@ "viewers/symbol.html", "viewers/footprint.html" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "org": "adom" }
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<pin name="PG2" x="17.78" y="-5.08" length="middle" direction="out" rot="R180"/>- <pin name="PD7" x="17.78" y="-7.62" length="middle" direction="out" rot="R180"/>- <pin name="PD6" x="17.78" y="-10.16" length="middle" direction="out" rot="R180"/>- <pin name="PD5" x="17.78" y="-12.7" length="middle" direction="out" rot="R180"/>- <pin name="PD4" x="17.78" y="-15.24" length="middle" direction="out" rot="R180"/>- <pin name="PD3" x="17.78" y="-17.78" length="middle" direction="out" rot="R180"/>- <pin name="VDD@11" x="17.78" y="-20.32" length="middle" direction="pwr" rot="R180"/>- <pin name="VSS@11" x="17.78" y="-22.86" length="middle" direction="pwr" rot="R180"/>- <pin name="PD2" x="17.78" y="-25.4" length="middle" direction="out" rot="R180"/>- <pin name="PD1" x="17.78" y="-27.94" length="middle" direction="out" rot="R180"/>- <pin name="PD0" x="17.78" y="-30.48" length="middle" direction="out" rot="R180"/>- <pin name="PC12" x="17.78" y="-33.02" length="middle" direction="out" rot="R180"/>- <pin name="PC11" x="17.78" y="-35.56" length="middle" direction="out" rot="R180"/>- <pin name="PC10" x="17.78" y="-38.1" length="middle" direction="out" rot="R180"/>- <pin name="PA15" x="17.78" y="-40.64" length="middle" direction="out" rot="R180"/>- <pin name="PA14" x="17.78" y="-43.18" length="middle" direction="out" rot="R180"/>- <pin name="VDD@12" x="17.78" y="-45.72" length="middle" direction="pwr" rot="R180"/>- <pin name="VSS@12" x="17.78" y="-48.26" length="middle" direction="pwr" rot="R180"/>- <pin name="VCAP1" x="17.78" y="-50.8" length="middle" direction="pas" rot="R180"/>- <pin name="PA13" x="17.78" y="-53.34" length="middle" direction="out" rot="R180"/>- <pin name="PA12" x="17.78" y="-55.88" length="middle" direction="out" rot="R180"/>- <pin name="VDD@13" x="17.78" y="-58.42" length="middle" direction="pwr" rot="R180"/>- <pin name="VSS@13" x="17.78" y="-60.96" length="middle" direction="pwr" rot="R180"/>- <pin name="PA11" x="17.78" y="-63.5" length="middle" direction="out" rot="R180"/>- <pin name="PA10" x="17.78" y="-66.04" length="middle" direction="out" rot="R180"/>- <pin name="PA9" x="17.78" y="-68.58" length="middle" direction="out" rot="R180"/>- <pin name="PA8" x="17.78" y="-71.12" length="middle" direction="out" rot="R180"/>- <pin name="PC9" x="17.78" y="-73.66" length="middle" direction="out" rot="R180"/>- <pin name="PC8" x="17.78" y="-76.2" length="middle" direction="out" rot="R180"/>- <pin name="PC7" x="17.78" y="-78.74" length="middle" direction="out" rot="R180"/>- <pin name="PC6" x="17.78" y="-81.28" length="middle" direction="out" rot="R180"/>- <pin name="PD15" x="17.78" y="-83.82" length="middle" direction="out" rot="R180"/>- <pin name="PD14" x="17.78" y="-86.36" length="middle" direction="out" rot="R180"/>- <pin name="PD13" x="17.78" y="-88.9" length="middle" direction="out" rot="R180"/>- <pin name="PD12" x="17.78" y="-91.44" length="middle" direction="out" rot="R180"/>+ <pin name="VDD@7" x="17.78" y="88.9" length="middle" direction="pwr" rot="R180"/>+ <pin name="PDR_ON" x="17.78" y="86.36" length="middle" direction="in" rot="R180"/>+ <pin name="PE1" x="17.78" y="83.82" length="middle" direction="io" rot="R180"/>+ <pin name="PE0" x="17.78" y="81.28" length="middle" direction="io" rot="R180"/>+ <pin name="PB9" x="17.78" y="78.74" length="middle" direction="io" rot="R180"/>+ <pin name="PB8" x="17.78" y="76.2" length="middle" direction="io" rot="R180"/>+ <pin name="BOOT0" x="17.78" y="73.66" length="middle" direction="in" rot="R180"/>+ <pin name="PB7" x="17.78" y="71.12" length="middle" direction="io" rot="R180"/>+ <pin name="PB6" x="17.78" y="68.58" length="middle" direction="io" rot="R180"/>+ <pin name="PB5" x="17.78" y="66.04" length="middle" direction="io" rot="R180"/>+ <pin name="PB4" x="17.78" y="63.5" length="middle" direction="io" rot="R180"/>+ <pin name="PB3" x="17.78" y="60.96" length="middle" direction="io" rot="R180"/>+ <pin name="PG15" x="17.78" y="58.42" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@8" x="17.78" y="55.88" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@5" x="17.78" y="53.34" length="middle" direction="pwr" rot="R180"/>+ <pin name="PG14" x="17.78" y="50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PG13" x="17.78" y="48.26" length="middle" direction="io" rot="R180"/>+ <pin name="PG12" x="17.78" y="45.72" length="middle" direction="io" rot="R180"/>+ <pin name="PG11" x="17.78" y="43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PG10" x="17.78" y="40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PG9" x="17.78" y="38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PD7" x="17.78" y="35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PD6" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@9" x="17.78" y="30.48" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@6" x="17.78" y="27.94" length="middle" direction="pwr" rot="R180"/>+ <pin name="PD5" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PD4" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PD3" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PD2" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PD1" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PD0" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>+ <pin name="PA15" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+ <pin name="PA14" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@10" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@7" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+ <pin name="VCAP_2" x="17.78" y="-7.62" length="middle" direction="pwr" rot="R180"/>+ <pin name="PA13" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PA12" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PA11" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PA10" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PA9" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PA8" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PC9" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PC8" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PC7" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PC6" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@11" x="17.78" y="-35.56" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@8" x="17.78" y="-38.1" length="middle" direction="pwr" rot="R180"/>+ <pin name="PG8" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PG7" x="17.78" y="-43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PG6" x="17.78" y="-45.72" length="middle" direction="io" rot="R180"/>+ <pin name="PG5" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>+ <pin name="PG4" x="17.78" y="-50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PG3" x="17.78" y="-53.34" length="middle" direction="io" rot="R180"/>+ <pin name="PG2" x="17.78" y="-55.88" length="middle" direction="io" rot="R180"/>+ <pin name="PD15" x="17.78" y="-58.42" length="middle" direction="io" rot="R180"/>+ <pin name="PD14" x="17.78" y="-60.96" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@12" x="17.78" y="-63.5" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@9" x="17.78" y="-66.04" length="middle" direction="pwr" rot="R180"/>+ <pin name="PD13" x="17.78" y="-68.58" length="middle" direction="io" rot="R180"/>+ <pin name="PD12" x="17.78" y="-71.12" length="middle" direction="io" rot="R180"/>+ <pin name="PD11" x="17.78" y="-73.66" length="middle" direction="io" rot="R180"/>+ <pin name="PD10" x="17.78" y="-76.2" length="middle" direction="io" rot="R180"/>+ <pin name="PD9" x="17.78" y="-78.74" length="middle" direction="io" rot="R180"/>+ <pin name="PD8" x="17.78" y="-81.28" length="middle" direction="io" rot="R180"/>+ <pin name="PB15" x="17.78" y="-83.82" length="middle" direction="io" rot="R180"/>+ <pin name="PB14" x="17.78" y="-86.36" length="middle" direction="io" rot="R180"/>+ <pin name="PB13" x="17.78" y="-88.9" length="middle" direction="io" rot="R180"/>+ <pin name="PB12" x="17.78" y="-91.44" length="middle" direction="io" rot="R180"/> </symbol> </symbols> <devicesets> <deviceset name="STM32F427ZIT6" prefix="U">- <description></description>+ <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data</description> <gates> <gate name="G$1" symbol="STM32F427ZIT6" x="0" y="0"/> </gates>@@ -391,146 +392,156 @@ <connect gate="G$1" pin="PE5" pad="4"/> <connect gate="G$1" pin="PE6" pad="5"/> <connect gate="G$1" pin="VBAT" pad="6"/>- <connect gate="G$1" pin="VSS" pad="7"/>- <connect gate="G$1" pin="VDD" pad="8"/>- <connect gate="G$1" pin="PC13" pad="9"/>- <connect gate="G$1" pin="PC14-OSC32_IN" pad="10"/>- <connect gate="G$1" pin="PC15-OSC32_OUT" pad="11"/>- <connect gate="G$1" pin="PH0-OSC_IN" pad="12"/>- <connect gate="G$1" pin="PH1-OSC_OUT" pad="13"/>- <connect gate="G$1" pin="NRST" pad="14"/>- <connect gate="G$1" pin="PC0" pad="15"/>- <connect gate="G$1" pin="PC1" pad="16"/>- <connect gate="G$1" pin="PC2" pad="17"/>- <connect gate="G$1" pin="PC3" pad="18"/>- <connect gate="G$1" pin="VSSA" pad="19"/>- <connect gate="G$1" pin="VDDA" pad="20"/>- <connect gate="G$1" pin="PA0" pad="21"/>- <connect gate="G$1" pin="PA1" pad="22"/>- <connect gate="G$1" pin="PA2" pad="23"/>- <connect gate="G$1" pin="PA3" pad="24"/>- <connect gate="G$1" pin="VSS@2" pad="25"/>- <connect gate="G$1" pin="VDD@2" pad="26"/>- <connect gate="G$1" pin="PA4" pad="27"/>- <connect gate="G$1" pin="PA5" pad="28"/>- <connect gate="G$1" pin="PA6" pad="29"/>- <connect gate="G$1" pin="PA7" pad="30"/>- <connect gate="G$1" pin="PC4" pad="31"/>- <connect gate="G$1" pin="PC5" pad="32"/>- <connect gate="G$1" pin="PB0" pad="33"/>- <connect gate="G$1" pin="PB1" pad="34"/>- <connect gate="G$1" pin="PB2" pad="35"/>- <connect gate="G$1" pin="VSS@3" pad="36"/>- <connect gate="G$1" pin="VDD@3" pad="37"/>- <connect gate="G$1" pin="PB3" pad="38"/>- <connect gate="G$1" pin="PB4" pad="39"/>- <connect gate="G$1" pin="PB5" pad="40"/>- <connect gate="G$1" pin="PB6" pad="41"/>- <connect gate="G$1" pin="PB7" pad="42"/>- <connect gate="G$1" pin="BOOT0" pad="43"/>- <connect gate="G$1" pin="PB8" pad="44"/>- <connect gate="G$1" pin="PB9" pad="45"/>- <connect gate="G$1" pin="PE0" pad="46"/>- <connect gate="G$1" pin="PE1" pad="47"/>- <connect gate="G$1" pin="VSS@4" pad="48"/>- <connect gate="G$1" pin="VDD@4" pad="49"/>- <connect gate="G$1" pin="PE7" pad="50"/>- <connect gate="G$1" pin="PE8" pad="51"/>- <connect gate="G$1" pin="PE9" pad="52"/>- <connect gate="G$1" pin="PE10" pad="53"/>- <connect gate="G$1" pin="PE11" pad="54"/>- <connect gate="G$1" pin="PE12" pad="55"/>- <connect gate="G$1" pin="PE13" pad="56"/>- <connect gate="G$1" pin="PE14" pad="57"/>- <connect gate="G$1" pin="PE15" pad="58"/>- <connect gate="G$1" pin="VSS@5" pad="59"/>- <connect gate="G$1" pin="VDD@5" pad="60"/>- <connect gate="G$1" pin="PB10" pad="61"/>- <connect gate="G$1" pin="PB11" pad="62"/>- <connect gate="G$1" pin="PB12" pad="63"/>- <connect gate="G$1" pin="PB13" pad="64"/>- <connect gate="G$1" pin="PB14" pad="65"/>- <connect gate="G$1" pin="PB15" pad="66"/>- <connect gate="G$1" pin="PD8" pad="67"/>- <connect gate="G$1" pin="PD9" pad="68"/>- <connect gate="G$1" pin="PD10" pad="69"/>- <connect gate="G$1" pin="PD11" pad="70"/>- <connect gate="G$1" pin="VSS@6" pad="71"/>+ <connect gate="G$1" pin="PC13" pad="7"/>+ <connect gate="G$1" pin="PC14/OSC32_IN" pad="8"/>+ <connect gate="G$1" pin="PC15/OSC32_OUT" pad="9"/>+ <connect gate="G$1" pin="PF0" pad="10"/>+ <connect gate="G$1" pin="PF1" pad="11"/>+ <connect gate="G$1" pin="PF2" pad="12"/>+ <connect gate="G$1" pin="PF3" pad="13"/>+ <connect gate="G$1" pin="PF4" pad="14"/>+ <connect gate="G$1" pin="PF5" pad="15"/>+ <connect gate="G$1" pin="VSS" pad="16"/>+ <connect gate="G$1" pin="VDD" pad="17"/>+ <connect gate="G$1" pin="PF6" pad="18"/>+ <connect gate="G$1" pin="PF7" pad="19"/>+ <connect gate="G$1" pin="PF8" pad="20"/>+ <connect gate="G$1" pin="PF9" pad="21"/>+ <connect gate="G$1" pin="PF10" pad="22"/>+ <connect gate="G$1" pin="PH0/OSC_IN" pad="23"/>+ <connect gate="G$1" pin="PH1/OSC_OUT" pad="24"/>+ <connect gate="G$1" pin="NRST" pad="25"/>+ <connect gate="G$1" pin="PC0" pad="26"/>+ <connect gate="G$1" pin="PC1" pad="27"/>+ <connect gate="G$1" pin="PC2" pad="28"/>+ <connect gate="G$1" pin="PC3" pad="29"/>+ <connect gate="G$1" pin="VDD@2" pad="30"/>+ <connect gate="G$1" pin="VSSA" pad="31"/>+ <connect gate="G$1" pin="VREF+" pad="32"/>+ <connect gate="G$1" pin="VDDA" pad="33"/>+ <connect gate="G$1" pin="PA0/WKUP" pad="34"/>+ <connect gate="G$1" pin="PA1" pad="35"/>+ <connect gate="G$1" pin="PA2" pad="36"/>+ <connect gate="G$1" pin="PA3" pad="37"/>+ <connect gate="G$1" pin="VSS@2" pad="38"/>+ <connect gate="G$1" pin="VDD@3" pad="39"/>+ <connect gate="G$1" pin="PA4" pad="40"/>+ <connect gate="G$1" pin="PA5" pad="41"/>+ <connect gate="G$1" pin="PA6" pad="42"/>+ <connect gate="G$1" pin="PA7" pad="43"/>+ <connect gate="G$1" pin="PC4" pad="44"/>+ <connect gate="G$1" pin="PC5" pad="45"/>+ <connect gate="G$1" pin="PB0" pad="46"/>+ <connect gate="G$1" pin="PB1" pad="47"/>+ <connect gate="G$1" pin="PB2/BOOT1" pad="48"/>+ <connect gate="G$1" pin="PF11" pad="49"/>+ <connect gate="G$1" pin="PF12" pad="50"/>+ <connect gate="G$1" pin="VSS@3" pad="51"/>+ <connect gate="G$1" pin="VDD@4" pad="52"/>+ <connect gate="G$1" pin="PF13" pad="53"/>+ <connect gate="G$1" pin="PF14" pad="54"/>+ <connect gate="G$1" pin="PF15" pad="55"/>+ <connect gate="G$1" pin="PG0" pad="56"/>+ <connect gate="G$1" pin="PG1" pad="57"/>+ <connect gate="G$1" pin="PE7" pad="58"/>+ <connect gate="G$1" pin="PE8" pad="59"/>+ <connect gate="G$1" pin="PE9" pad="60"/>+ <connect gate="G$1" pin="VSS@4" pad="61"/>+ <connect gate="G$1" pin="VDD@5" pad="62"/>+ <connect gate="G$1" pin="PE10" pad="63"/>+ <connect gate="G$1" pin="PE11" pad="64"/>+ <connect gate="G$1" pin="PE12" pad="65"/>+ <connect gate="G$1" pin="PE13" pad="66"/>+ <connect gate="G$1" pin="PE14" pad="67"/>+ <connect gate="G$1" pin="PE15" pad="68"/>+ <connect gate="G$1" pin="PB10" pad="69"/>+ <connect gate="G$1" pin="PB11" pad="70"/>+ <connect gate="G$1" pin="VCAP_1" pad="71"/> <connect gate="G$1" pin="VDD@6" pad="72"/>- <connect gate="G$1" pin="PG1" pad="144"/>- <connect gate="G$1" pin="PG0" pad="143"/>- <connect gate="G$1" pin="VDD@7" pad="142"/>- <connect gate="G$1" pin="VSS@7" pad="141"/>- <connect gate="G$1" pin="PH15" pad="140"/>- <connect gate="G$1" pin="PH14" pad="139"/>- <connect gate="G$1" pin="PH13" pad="138"/>- <connect gate="G$1" pin="PH12" pad="137"/>- <connect gate="G$1" pin="PH11" pad="136"/>- <connect gate="G$1" pin="PH10" pad="135"/>- <connect gate="G$1" pin="PH9" pad="134"/>- <connect gate="G$1" pin="PH8" pad="133"/>- <connect gate="G$1" pin="VDD@8" pad="132"/>- <connect gate="G$1" pin="VSS@8" pad="131"/>- <connect gate="G$1" pin="PH7" pad="130"/>- <connect gate="G$1" pin="PH6" pad="129"/>- <connect gate="G$1" pin="PH5" pad="128"/>- <connect gate="G$1" pin="PH4" pad="127"/>- <connect gate="G$1" pin="PH3" pad="126"/>- <connect gate="G$1" pin="PH2" pad="125"/>- <connect gate="G$1" pin="PG15" pad="124"/>- <connect gate="G$1" pin="PG14" pad="123"/>- <connect gate="G$1" pin="VDD@9" pad="122"/>- <connect gate="G$1" pin="VSS@9" pad="121"/>- <connect gate="G$1" pin="PG13" pad="120"/>- <connect gate="G$1" pin="PG12" pad="119"/>- <connect gate="G$1" pin="PG11" pad="118"/>- <connect gate="G$1" pin="PG10" pad="117"/>- <connect gate="G$1" pin="PG9" pad="116"/>- <connect gate="G$1" pin="PG8" pad="115"/>- <connect gate="G$1" pin="PG7" pad="114"/>- <connect gate="G$1" pin="PG6" pad="113"/>- <connect gate="G$1" pin="VDD@10" pad="112"/>- <connect gate="G$1" pin="VSS@10" pad="111"/>- <connect gate="G$1" pin="PG5" pad="110"/>- <connect gate="G$1" pin="PG4" pad="109"/>- <connect gate="G$1" pin="PG3" pad="108"/>- <connect gate="G$1" pin="PG2" pad="107"/>- <connect gate="G$1" pin="PD7" pad="106"/>- <connect gate="G$1" pin="PD6" pad="105"/>- <connect gate="G$1" pin="PD5" pad="104"/>- <connect gate="G$1" pin="PD4" pad="103"/>- <connect gate="G$1" pin="PD3" pad="102"/>- <connect gate="G$1" pin="VDD@11" pad="101"/>- <connect gate="G$1" pin="VSS@11" pad="100"/>- <connect gate="G$1" pin="PD2" pad="99"/>- <connect gate="G$1" pin="PD1" pad="98"/>- <connect gate="G$1" pin="PD0" pad="97"/>- <connect gate="G$1" pin="PC12" pad="96"/>- <connect gate="G$1" pin="PC11" pad="95"/>- <connect gate="G$1" pin="PC10" pad="94"/>- <connect gate="G$1" pin="PA15" pad="93"/>- <connect gate="G$1" pin="PA14" pad="92"/>- <connect gate="G$1" pin="VDD@12" pad="91"/>- <connect gate="G$1" pin="VSS@12" pad="90"/>- <connect gate="G$1" pin="VCAP1" pad="89"/>- <connect gate="G$1" pin="PA13" pad="88"/>- <connect gate="G$1" pin="PA12" pad="87"/>- <connect gate="G$1" pin="VDD@13" pad="86"/>- <connect gate="G$1" pin="VSS@13" pad="85"/>- <connect gate="G$1" pin="PA11" pad="84"/>- <connect gate="G$1" pin="PA10" pad="83"/>- <connect gate="G$1" pin="PA9" pad="82"/>- <connect gate="G$1" pin="PA8" pad="81"/>- <connect gate="G$1" pin="PC9" pad="80"/>- <connect gate="G$1" pin="PC8" pad="79"/>- <connect gate="G$1" pin="PC7" pad="78"/>- <connect gate="G$1" pin="PC6" pad="77"/>- <connect gate="G$1" pin="PD15" pad="76"/>- <connect gate="G$1" pin="PD14" pad="75"/>- <connect gate="G$1" pin="PD13" pad="74"/>- <connect gate="G$1" pin="PD12" pad="73"/>+ <connect gate="G$1" pin="VDD@7" pad="144"/>+ <connect gate="G$1" pin="PDR_ON" pad="143"/>+ <connect gate="G$1" pin="PE1" pad="142"/>+ <connect gate="G$1" pin="PE0" pad="141"/>+ <connect gate="G$1" pin="PB9" pad="140"/>+ <connect gate="G$1" pin="PB8" pad="139"/>+ <connect gate="G$1" pin="BOOT0" pad="138"/>+ <connect gate="G$1" pin="PB7" pad="137"/>+ <connect gate="G$1" pin="PB6" pad="136"/>+ <connect gate="G$1" pin="PB5" pad="135"/>+ <connect gate="G$1" pin="PB4" pad="134"/>+ <connect gate="G$1" pin="PB3" pad="133"/>+ <connect gate="G$1" pin="PG15" pad="132"/>+ <connect gate="G$1" pin="VDD@8" pad="131"/>+ <connect gate="G$1" pin="VSS@5" pad="130"/>+ <connect gate="G$1" pin="PG14" pad="129"/>+ <connect gate="G$1" pin="PG13" pad="128"/>+ <connect gate="G$1" pin="PG12" pad="127"/>+ <connect gate="G$1" pin="PG11" pad="126"/>+ <connect gate="G$1" pin="PG10" pad="125"/>+ <connect gate="G$1" pin="PG9" pad="124"/>+ <connect gate="G$1" pin="PD7" pad="123"/>+ <connect gate="G$1" pin="PD6" pad="122"/>+ <connect gate="G$1" pin="VDD@9" pad="121"/>+ <connect gate="G$1" pin="VSS@6" pad="120"/>+ <connect gate="G$1" pin="PD5" pad="119"/>+ <connect gate="G$1" pin="PD4" pad="118"/>+ <connect gate="G$1" pin="PD3" pad="117"/>+ <connect gate="G$1" pin="PD2" pad="116"/>+ <connect gate="G$1" pin="PD1" pad="115"/>+ <connect gate="G$1" pin="PD0" pad="114"/>+ <connect gate="G$1" pin="PC12" pad="113"/>+ <connect gate="G$1" pin="PC11" pad="112"/>+ <connect gate="G$1" pin="PC10" pad="111"/>+ <connect gate="G$1" pin="PA15" pad="110"/>+ <connect gate="G$1" pin="PA14" pad="109"/>+ <connect gate="G$1" pin="VDD@10" pad="108"/>+ <connect gate="G$1" pin="VSS@7" pad="107"/>+ <connect gate="G$1" pin="VCAP_2" pad="106"/>+ <connect gate="G$1" pin="PA13" pad="105"/>+ <connect gate="G$1" pin="PA12" pad="104"/>+ <connect gate="G$1" pin="PA11" pad="103"/>+ <connect gate="G$1" pin="PA10" pad="102"/>+ <connect gate="G$1" pin="PA9" pad="101"/>+ <connect gate="G$1" pin="PA8" pad="100"/>+ <connect gate="G$1" pin="PC9" pad="99"/>+ <connect gate="G$1" pin="PC8" pad="98"/>+ <connect gate="G$1" pin="PC7" pad="97"/>+ <connect gate="G$1" pin="PC6" pad="96"/>+ <connect gate="G$1" pin="VDD@11" pad="95"/>+ <connect gate="G$1" pin="VSS@8" pad="94"/>+ <connect gate="G$1" pin="PG8" pad="93"/>+ <connect gate="G$1" pin="PG7" pad="92"/>+ <connect gate="G$1" pin="PG6" pad="91"/>+ <connect gate="G$1" pin="PG5" pad="90"/>+ <connect gate="G$1" pin="PG4" pad="89"/>+ <connect gate="G$1" pin="PG3" pad="88"/>+ <connect gate="G$1" pin="PG2" pad="87"/>+ <connect gate="G$1" pin="PD15" pad="86"/>+ <connect gate="G$1" pin="PD14" pad="85"/>+ <connect gate="G$1" pin="VDD@12" pad="84"/>+ <connect gate="G$1" pin="VSS@9" pad="83"/>+ <connect gate="G$1" pin="PD13" pad="82"/>+ <connect gate="G$1" pin="PD12" pad="81"/>+ <connect gate="G$1" pin="PD11" pad="80"/>+ <connect gate="G$1" pin="PD10" pad="79"/>+ <connect gate="G$1" pin="PD9" pad="78"/>+ <connect gate="G$1" pin="PD8" pad="77"/>+ <connect gate="G$1" pin="PB15" pad="76"/>+ <connect gate="G$1" pin="PB14" pad="75"/>+ <connect gate="G$1" pin="PB13" pad="74"/>+ <connect gate="G$1" pin="PB12" pad="73"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="STM32F427ZIT6" constant="no"/>+ <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+ <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588858460243312640" constant="no"/>+ <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/stm32f427zit6" constant="no"/>+ <attribute name="MOUSER_PN" value="511-STM32F427ZIT6" constant="no"/>+ <attribute name="DIGIKEY_PN" value="497-14050-ND" constant="no"/>+ <attribute name="LCSC_PN" value="C117819" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>