component
STM32F427VGT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
← Commit history
Publish 0.1.1
5 files changed
+418−407
README.md+92−92@@ -13,99 +13,99 @@ STM32F427VGT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | 3 | PE4 | bidirectional | GPIO Port E pin 4; alternate functions: TRACED1, SAI1_FS_A, ETH_MII_TXD1, FMC_A20. | | 4 | PE5 | bidirectional | GPIO Port E pin 5; alternate functions: TRACED2, SAI1_SCK_A, ETH_MII_TXD0, FMC_A21. | | 5 | PE6 | bidirectional | GPIO Port E pin 6; alternate functions: TRACED3, SAI1_SD_A, ETH_MII_TXD3, FMC_A22. |-| 6 | VREF+ | power_in | Reference voltage input pin for analog converter; supply voltage VDDA with 100 nF capacitor to VSSA. |-| 7 | VDDA | power_in | Analog supply voltage 1.8 V to 3.6 V; must be connected with 100 nF capacitor to VSSA near pin. |-| 8 | VSSA | power_in | Ground for analog supply; must be connected with 100 nF capacitor to VDDA near pin. |-| 9 | PB9 | bidirectional | GPIO Port B pin 9; alternate functions: TIM4_CH4, SDIO_D5, SPI2_NSS, I2S2_WS, CAN1_TX, OTG_HS_ULPI_D6, ETH_MII_RXD3, FMC_NE1. |-| 10 | BOOT0 | input | Boot pin; must be connected to VSS to boot from flash memory; connect to VDDA through 10 kΩ resistor. |-| 11 | PB8 | bidirectional | GPIO Port B pin 8; alternate functions: TIM4_CH3, SDIO_D4, I2C1_SCL, SPI5_MOSI, CAN1_RX, OTG_HS_ULPI_D7, ETH_MII_TXD3, FMC_NAND_CE1. |-| 12 | PB7 | bidirectional | GPIO Port B pin 7; alternate functions: TIM4_CH2, FSMC_NL, I2C1_SDA, SPI5_MISO, USART1_RX, OTG_HS_ULPI_D0, ETH_RMII_TX_EN, ETH_MII_TX_EN, FMC_NL. |-| 13 | PB6 | bidirectional | GPIO Port B pin 6; alternate functions: TIM4_CH1, I2C1_SCL, USART1_TX, OTG_HS_ULPI_D1, CAN2_TX, ETH_RMII_TXD1, ETH_MII_TXD1, FMC_NOP. |-| 14 | PB5 | bidirectional | GPIO Port B pin 5; alternate functions: TIM3_CH2, SPI1_MOSI, SPI3_MOSI, USART1_CK, I2S3_SD, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1. |-| 15 | PB4 | bidirectional | GPIO Port B pin 4; alternate functions: TIM3_CH1, SPI1_MISO, SPI3_MISO, USART2_CK, I2S3_MCK, CAN1_RX, OTG_HS_ULPI_D6, DFSDM1_DATIN7, ETH_MII_TXD2, FMC_SDCKE0. |-| 16 | PB3 | bidirectional | GPIO Port B pin 3; alternate functions: TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_CK, I2S3_CK, SDIO_CK, CAN1_TX, OTG_HS_ULPI_D5, DFSDM1_CKOUT, ETH_MII_TXD1, FMC_SDCKE1. |-| 17 | PA15 | bidirectional | GPIO Port A pin 15; alternate functions: TIM2_CH1_ETR, SPI1_NSS, SPI3_NSS, USART1_CK, USART4_RX, I2S1_WS, I2C2_SDA, USBH_ULPI_D0, OTG_HS_ULPI_D0, JTDO, ETH_MII_TXD0, FMC_SDNWE. |-| 18 | PA14 | bidirectional | GPIO Port A pin 14; alternate functions: SPI3_MISO, USART2_TX, I2C2_SCL, OTG_HS_SOF, JTCK, ETH_MII_RXCLK, FMC_SDNWE. |-| 19 | PA13 | bidirectional | GPIO Port A pin 13; alternate functions: USART3_CTS, OTG_HS_ULPI_D2, JTMS, SWDIO. |-| 20 | VDDA | power_in | Analog supply voltage 1.8 V to 3.6 V; must be connected with 100 nF capacitor to VSSA near pin. |-| 21 | VSSA | power_in | Ground for analog supply; must be connected with 100 nF capacitor to VDDA near pin. |-| 22 | PA12 | bidirectional | GPIO Port A pin 12; alternate functions: SPI3_MOSI, USART1_RTS, I2C2_SDA, USART6_RX, OTG_HS_DP, CAN1_TX, DFSDM1_SDIN0, OTG_FS_DP, ETH_MII_RXD0. |-| 23 | PA11 | bidirectional | GPIO Port A pin 11; alternate functions: USART1_CTS, SPI4_MISO, USART6_TX, OTG_HS_DM, CAN1_RX, DFSDM1_CKIN1, OTG_FS_DM, ETH_MII_RXDV, ETH_RMII_RXDV. |-| 24 | PA10 | bidirectional | GPIO Port A pin 10; alternate functions: TIM1_CH3, USART1_RX, SPI5_MOSI, OTG_FS_ID, ETH_MII_RXD1, ETH_RMII_RXD1. |-| 25 | PA9 | bidirectional | GPIO Port A pin 9; alternate functions: TIM1_CH2, USART1_TX, SPI5_MISO, SDIO_CK, I2C3_SMBA, OTG_FS_VBUS, ETH_MII_TX_CLK, I2S2_EXTSD. |-| 26 | PA8 | bidirectional | GPIO Port A pin 8; alternate functions: MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, SPI5_NSS, OTG_FS_SOF, ETH_MII_MCO, FMC_D32. |-| 27 | PH2 | bidirectional | GPIO Port H pin 2; alternate functions: none standard; FMC_SDCKE0, FMC_SDNRAS. |-| 28 | PH3 | bidirectional | GPIO Port H pin 3; alternate functions: none standard; FMC_SDNE0, FMC_SDNRAS. |-| 29 | NRST | input | Reset pin; external reset input; normally pulled high via 10 kΩ resistor to VDDA. |-| 30 | VSS | power_in | Ground supply voltage; must be connected to VSS. |-| 31 | VDD | power_in | Main supply voltage 1.8 V to 3.6 V; must be bypassed with 100 nF and 10 µF capacitors. |+| 6 | VBAT | power_in | |+| 7 | PC13 | bidirectional | GPIO Port C pin 13; alternate functions: RTC_AF1, WKUP2; Maximum current: 3 mA; Maximum frequency: <2 MHz. |+| 8 | PC14/OSC32_IN | bidirectional | |+| 9 | PC15/OSC32_OUT | bidirectional | |+| 10 | VSS | power_in | Ground supply voltage; must be connected to VSS. |+| 11 | VDD | power_in | Main supply voltage 1.8 V to 3.6 V; must be bypassed with 100 nF and 10 µF capacitors. |+| 12 | PH0/OSC_IN | bidirectional | |+| 13 | PH1/OSC_OUT | bidirectional | |+| 14 | NRST | input | Reset pin; external reset input; normally pulled high via 10 kΩ resistor to VDDA. |+| 15 | PC0 | bidirectional | GPIO Port C pin 0; alternate functions: QUADSPI_BK2_IO3, SAI2_MCLK_A, DFSDM1_CKIN0, ETH_MII_RXD2, ETH_RMII_RXD2, DCMI_D5, FMC_SDNWE. |+| 16 | PC1 | bidirectional | GPIO Port C pin 1; alternate functions: TRACED0, I2C3_SDA, DFSDM1_DATIN0, SPI2_MOSI, I2S2_SD, USART6_RX, OTG_HS_ULPI_STP, ETH_RMII_MDC, ETH_MII_MDC, DCMI_D6, FMC_SDNE0. |+| 17 | PC2 | bidirectional | GPIO Port C pin 2; alternate functions: SPI2_MISO, I2S2_MCK, USART3_TX, OTG_HS_ULPI_DIR, ETH_MII_TXD2, DCMI_D0, FMC_SDNE1. |+| 18 | PC3 | bidirectional | GPIO Port C pin 3; alternate functions: SPI2_MOSI, I2S2_SD, USART3_RX, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, ETH_RMII_REF_CLK, DCMI_D1, FMC_SDCKE1. |+| 19 | VDD | power_in | Main supply voltage 1.8 V to 3.6 V; must be bypassed with 100 nF and 10 µF capacitors. |+| 20 | VSSA | power_in | Ground for analog supply; must be connected with 100 nF capacitor to VDDA near pin. |+| 21 | VREF+ | power_in | Reference voltage input pin for analog converter; supply voltage VDDA with 100 nF capacitor to VSSA. |+| 22 | VDDA | power_in | Analog supply voltage 1.8 V to 3.6 V; must be connected with 100 nF capacitor to VSSA near pin. |+| 23 | PA0/WKUP | bidirectional | GPIO Port A pin 0 with wakeup capability; alternate functions: TIM2_CH1_ETR, USART2_CTS, USART7_TX, ETH_MII_RXD2, DCMI_D2, FMC_SDNWE, WKUP1. |+| 24 | PA1 | bidirectional | GPIO Port A pin 1; alternate functions: TIM2_CH2, USART2_RTS, USART7_RX, TIM5_CH2, ETH_RMII_REF_CLK, ETH_MII_RXD0, DCMI_D1, FMC_SDNRAS. |+| 25 | PA2 | bidirectional | GPIO Port A pin 2; alternate functions: TIM2_CH3, USART2_TX, USART7_TX, TIM5_CH3, SAI1_SCK_B, OTG_HS_ULPI_D1, ETH_RMII_MDIO, ETH_MII_MDIO, DCMI_PIXCLK, FMC_SDCAS. |+| 26 | PA3 | bidirectional | GPIO Port A pin 3; alternate functions: USART2_RX, SDIO_D0, OTG_HS_ULPI_D0, DCMI_VSYNC, ETH_MII_COL, FMC_SDCKE1. |+| 27 | VSS | power_in | Ground supply voltage; must be connected to VSS. |+| 28 | VDD | power_in | Main supply voltage 1.8 V to 3.6 V; must be bypassed with 100 nF and 10 µF capacitors. |+| 29 | PA4 | bidirectional | GPIO Port A pin 4; alternate functions: SPI1_NSS, I2S1_WS, USART2_CK, SPI3_NSS, I2S3_WS, USART6_TX, SAI1_FS_B, OTG_HS_SOF, DCMI_HSYNC, ETH_MII_RXD4, FMC_NWE. |+| 30 | PA5 | bidirectional | GPIO Port A pin 5; alternate functions: TIM2_CH1_ETR, SPI1_SCK, I2S1_CK, USART2_RTS, SDIO_D1, SPI4_MOSI, OTG_HS_ULPI_CK, ETH_MII_RXCLK, ETH_RMII_REF_CLK, FMC_SDNWE. |+| 31 | PA6 | bidirectional | GPIO Port A pin 6; alternate functions: TIM1_BKIN, TIM3_CH1, SPI1_MISO, I2S1_MCK, USART2_CTS, SDIO_D2, TIM13_CH1, ETH_MII_RXD2, FMC_SDNE1. | | 32 | PA7 | bidirectional | GPIO Port A pin 7; alternate functions: TIM1_CH1N, SPI1_MOSI, I2S1_SD, USART2_RX, SDIO_D3, ETH_MII_RXD3, FMC_SDNWE. |-| 33 | PA6 | bidirectional | GPIO Port A pin 6; alternate functions: TIM1_BKIN, TIM3_CH1, SPI1_MISO, I2S1_MCK, USART2_CTS, SDIO_D2, TIM13_CH1, ETH_MII_RXD2, FMC_SDNE1. |-| 34 | PA5 | bidirectional | GPIO Port A pin 5; alternate functions: TIM2_CH1_ETR, SPI1_SCK, I2S1_CK, USART2_RTS, SDIO_D1, SPI4_MOSI, OTG_HS_ULPI_CK, ETH_MII_RXCLK, ETH_RMII_REF_CLK, FMC_SDNWE. |-| 35 | PA4 | bidirectional | GPIO Port A pin 4; alternate functions: SPI1_NSS, I2S1_WS, USART2_CK, SPI3_NSS, I2S3_WS, USART6_TX, SAI1_FS_B, OTG_HS_SOF, DCMI_HSYNC, ETH_MII_RXD4, FMC_NWE. |-| 36 | PA3 | bidirectional | GPIO Port A pin 3; alternate functions: USART2_RX, SDIO_D0, OTG_HS_ULPI_D0, DCMI_VSYNC, ETH_MII_COL, FMC_SDCKE1. |-| 37 | PA2 | bidirectional | GPIO Port A pin 2; alternate functions: TIM2_CH3, USART2_TX, USART7_TX, TIM5_CH3, SAI1_SCK_B, OTG_HS_ULPI_D1, ETH_RMII_MDIO, ETH_MII_MDIO, DCMI_PIXCLK, FMC_SDCAS. |-| 38 | PA1 | bidirectional | GPIO Port A pin 1; alternate functions: TIM2_CH2, USART2_RTS, USART7_RX, TIM5_CH2, ETH_RMII_REF_CLK, ETH_MII_RXD0, DCMI_D1, FMC_SDNRAS. |-| 39 | PA0-WKUP | bidirectional | GPIO Port A pin 0 with wakeup capability; alternate functions: TIM2_CH1_ETR, USART2_CTS, USART7_TX, ETH_MII_RXD2, DCMI_D2, FMC_SDNWE, WKUP1. |-| 40 | VSS | power_in | Ground supply voltage; must be connected to VSS. |-| 41 | VDD | power_in | Main supply voltage 1.8 V to 3.6 V; must be bypassed with 100 nF and 10 µF capacitors. |-| 42 | PB0 | bidirectional | GPIO Port B pin 0; alternate functions: TIM1_CH2N, TIM3_CH4, SPI5_MOSI, UART4_CTS, ETH_MII_RXD4, ETH_RMII_RXD4, FMC_SDNWE. |-| 43 | PB1 | bidirectional | GPIO Port B pin 1; alternate functions: TIM1_CH3N, TIM3_CH3, DFSDM1_DATIN1, UART5_RX, I2C4_SDA, USART3_RX, OTG_HS_ULPI_D2, ETH_MII_RXD5, ETH_RMII_RXD5, DCMI_D0, FMC_SDCKE1. |-| 44 | PB2 | bidirectional | GPIO Port B pin 2; alternate functions: TIM2_CH4, SPI3_MOSI, QUADSPI_CLK, I2S2_SD, USART3_TX, OTG_HS_ULPI_D4, SDIO_CK, DCMI_D10, FMC_SDNE0. |-| 45 | PE7 | bidirectional | GPIO Port E pin 7; alternate functions: TIM1_ETR, UART7_RX, SPI4_MOSI, SAI1_SD_B, DFSDM1_DATIN3, ETH_MII_RXD4, FMC_D4, FMC_DA4. |-| 46 | PE8 | bidirectional | GPIO Port E pin 8; alternate functions: TIM1_CH1N, UART7_TX, SPI4_MISO, SAI1_SCK_B, DFSDM1_CKIN0, ETH_MII_RXD5, FMC_D5, FMC_DA5. |-| 47 | PE9 | bidirectional | GPIO Port E pin 9; alternate functions: TIM1_CH2N, USART6_RX, SPI4_NSS, SAI1_FS_B, FMC_D6, FMC_DA6. |-| 48 | PE10 | bidirectional | GPIO Port E pin 10; alternate functions: TIM1_CH2N, USART6_RX, SPI4_NSS, SAI1_SD_B, DFSDM1_DATIN4, FMC_D7, FMC_DA7. |-| 49 | PE11 | bidirectional | GPIO Port E pin 11; alternate functions: TIM1_CH2, SPI4_NSS, SAI2_SD_B, LPTIM1_IN2, FMC_D8, FMC_DA8. |-| 50 | PE12 | bidirectional | GPIO Port E pin 12; alternate functions: TIM1_CH3N, SPI4_SCK, SAI2_SCK_B, LPTIM1_ETR, FMC_D9, FMC_DA9. |-| 51 | PE13 | bidirectional | GPIO Port E pin 13; alternate functions: TIM1_CH3, SPI4_MISO, SAI2_FS_B, LPTIM1_OUT, FMC_D10, FMC_DA10. |-| 52 | PE14 | bidirectional | GPIO Port E pin 14; alternate functions: TIM1_CH4, SPI4_MOSI, SAI2_MCLK_B, DFSDM1_CKIN2, FMC_D11, FMC_DA11. |-| 53 | PE15 | bidirectional | GPIO Port E pin 15; alternate functions: TIM1_BKIN, SPI4_MISO, SAI2_SD_B, DFSDM1_DATIN2, DCMI_D13, FMC_D12, FMC_DA12. |-| 54 | VSS | power_in | Ground supply voltage; must be connected to VSS. |-| 55 | VDD | power_in | Main supply voltage 1.8 V to 3.6 V; must be bypassed with 100 nF and 10 µF capacitors. |-| 56 | PD8 | bidirectional | GPIO Port D pin 8; alternate functions: USART3_TX, FSMC_D13, SDIO_CMD, DCMI_D0, FMC_D13, FMC_DA13. |-| 57 | PD9 | bidirectional | GPIO Port D pin 9; alternate functions: USART3_RX, FSMC_D14, SDIO_D2, DCMI_D1, FMC_D14, FMC_DA14. |-| 58 | PD10 | bidirectional | GPIO Port D pin 10; alternate functions: none standard alternate; FSMC_D15, SDIO_D3, DCMI_D11, FMC_D15, FMC_DA15. |-| 59 | PD11 | bidirectional | GPIO Port D pin 11; alternate functions: USART3_CTS, QUADSPI_BK1_IO0, I2C4_SMBA, SAI2_SD_A, DCMI_D5, FMC_A16, FMC_CLE. |-| 60 | PD12 | bidirectional | GPIO Port D pin 12; alternate functions: TIM4_CH1, USART3_RTS, QUADSPI_BK1_IO1, I2C4_SCL, SAI2_FS_A, LPTIM1_IN1, DCMI_D6, FMC_A17, FMC_ALE. |-| 61 | PD13 | bidirectional | GPIO Port D pin 13; alternate functions: TIM4_CH2, QUADSPI_BK1_IO3, I2C4_SDA, SAI2_SCK_A, LPTIM1_ETR, DCMI_D7, FMC_A18. |-| 62 | PD14 | bidirectional | GPIO Port D pin 14; alternate functions: TIM4_CH3, none alternate; USART8_CTS, FMC_D0, FMC_DA0. |-| 63 | PD15 | bidirectional | GPIO Port D pin 15; alternate functions: TIM4_CH4, none alternate; USART8_RTS, FMC_D1, FMC_DA1. |-| 64 | VCAP_1 | passive | Decoupling capacitor connection for internal voltage regulator; connect 100 nF capacitor from VCAP_1 to VSS. |-| 65 | VSS | power_in | Ground supply voltage; must be connected to VSS. |-| 66 | VDD | power_in | Main supply voltage 1.8 V to 3.6 V; must be bypassed with 100 nF and 10 µF capacitors. |-| 67 | PC0 | bidirectional | GPIO Port C pin 0; alternate functions: QUADSPI_BK2_IO3, SAI2_MCLK_A, DFSDM1_CKIN0, ETH_MII_RXD2, ETH_RMII_RXD2, DCMI_D5, FMC_SDNWE. |-| 68 | PC1 | bidirectional | GPIO Port C pin 1; alternate functions: TRACED0, I2C3_SDA, DFSDM1_DATIN0, SPI2_MOSI, I2S2_SD, USART6_RX, OTG_HS_ULPI_STP, ETH_RMII_MDC, ETH_MII_MDC, DCMI_D6, FMC_SDNE0. |-| 69 | PC2 | bidirectional | GPIO Port C pin 2; alternate functions: SPI2_MISO, I2S2_MCK, USART3_TX, OTG_HS_ULPI_DIR, ETH_MII_TXD2, DCMI_D0, FMC_SDNE1. |-| 70 | PC3 | bidirectional | GPIO Port C pin 3; alternate functions: SPI2_MOSI, I2S2_SD, USART3_RX, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, ETH_RMII_REF_CLK, DCMI_D1, FMC_SDCKE1. |-| 71 | PC4 | bidirectional | GPIO Port C pin 4; alternate functions: DFSDM1_DATIN1, USART1_TX, UART7_TX, ETH_RMII_RXD0, ETH_MII_RXD0, DCMI_D2, FMC_SDNE0. |-| 72 | PC5 | bidirectional | GPIO Port C pin 5; alternate functions: DFSDM1_CKIN1, USART1_RX, UART7_RX, ETH_RMII_RXD1, ETH_MII_RXD1, DCMI_D3, FMC_SDCKE0. |-| 73 | PC6 | bidirectional | GPIO Port C pin 6; alternate functions: TIM3_CH1, TIM8_CH1, I2S2_MCK, USART6_TX, SDIO_D6, DCMI_D0, FMC_NWAIT. |-| 74 | PC7 | bidirectional | GPIO Port C pin 7; alternate functions: TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, SDIO_D7, DCMI_D1, FMC_NE1. |-| 75 | PC8 | bidirectional | GPIO Port C pin 8; alternate functions: TIM3_CH3, TIM8_CH3, USART6_CTS, SDIO_D0, DCMI_D2, FMC_NE2, FMC_NCE. |-| 76 | PC9 | bidirectional | GPIO Port C pin 9; alternate functions: MCO2, TIM3_CH4, TIM8_CH4, I2S_CKIN, SDIO_D1, I2C3_SDA, DCMI_D3, FMC_NCRDY, FMC_NWAIT. |-| 77 | PA13-JTMS-SWDIO | bidirectional | GPIO Port A pin 13 with JTAG/SWD functionality; alternate functions: USART3_CTS, OTG_HS_ULPI_D2, JTMS, SWDIO. |-| 78 | PA14-JTCK-SWCLK | bidirectional | GPIO Port A pin 14 with JTAG/SWD functionality; alternate functions: SPI3_MISO, USART2_TX, I2C2_SCL, OTG_HS_SOF, JTCK, SWCLK. |-| 79 | PA15-JTDI | bidirectional | GPIO Port A pin 15 with JTAG functionality; alternate functions: TIM2_CH1_ETR, SPI1_NSS, SPI3_NSS, USART1_CK, I2S1_WS, I2C2_SDA, USBH_ULPI_D0, OTG_HS_ULPI_D0, JTDI, ETH_MII_TXD0. |-| 80 | VSS | power_in | Ground supply voltage; must be connected to VSS. |-| 81 | VDD | power_in | Main supply voltage 1.8 V to 3.6 V; must be bypassed with 100 nF and 10 µF capacitors. |-| 82 | PC10 | bidirectional | GPIO Port C pin 10; alternate functions: USART3_TX, SPI3_SCK, I2S3_CK, SDIO_D2, UART4_TX, QUADSPI_BK1_IO1, DCMI_D8, FMC_NCRDY, FMC_NWAIT. |-| 83 | PC11 | bidirectional | GPIO Port C pin 11; alternate functions: USART3_RX, SPI3_MISO, UART4_RX, QUADSPI_BK2_NCS, DCMI_D4, FMC_NCRDY. |-| 84 | PC12 | bidirectional | GPIO Port C pin 12; alternate functions: USART3_CK, SPI3_MOSI, I2S3_SD, UART5_TX, SDIO_CK, DCMI_D9, FMC_NCRDY. |-| 85 | PC13 | bidirectional | GPIO Port C pin 13; alternate functions: RTC_AF1, WKUP2; Maximum current: 3 mA; Maximum frequency: <2 MHz. |-| 86 | PC14 | bidirectional | GPIO Port C pin 14; alternate functions: RTC_AF1, OSC32_IN; Maximum current: 3 mA; Maximum frequency: <2 MHz. |-| 87 | PC15 | bidirectional | GPIO Port C pin 15; alternate functions: RTC_AF1, OSC32_OUT; Maximum current: 3 mA; Maximum frequency: <2 MHz. |-| 88 | PI8 | bidirectional | GPIO Port I pin 8; alternate functions: DCMI_D0; Maximum current: 3 mA; Maximum frequency: <2 MHz. |-| 89 | PH6 | bidirectional | GPIO Port H pin 6; alternate functions: TIM12_CH1, I2C2_SMBA, DCMI_D9, FMC_SDNE1. |-| 90 | PH7 | bidirectional | GPIO Port H pin 7; alternate functions: I2C3_SCL, DCMI_D10, FMC_SDCKE1. |-| 91 | PH8 | bidirectional | GPIO Port H pin 8; alternate functions: TIM12_CH2, I2C3_SDA, DCMI_D11, FMC_SDNE0. |-| 92 | PH9 | bidirectional | GPIO Port H pin 9; alternate functions: TIM12_CH2, I2C3_SMBA, DCMI_D0, FMC_D23. |-| 93 | PH10 | bidirectional | GPIO Port H pin 10; alternate functions: TIM5_CH1, I2C4_SMBA, DCMI_D1, FMC_D24. |-| 94 | PH11 | bidirectional | GPIO Port H pin 11; alternate functions: TIM5_CH2, I2C4_SCL, DCMI_D2, FMC_D25. |-| 95 | PH12 | bidirectional | GPIO Port H pin 12; alternate functions: TIM5_CH3, I2C4_SDA, DCMI_D3, FMC_D26. |-| 96 | PB10 | bidirectional | GPIO Port B pin 10; alternate functions: TIM2_CH3, USART3_TX, SPI2_SCK, I2S2_CK, OTG_HS_ULPI_D3, ETH_MII_RX_ER, FMC_NE0. |-| 97 | PB11 | bidirectional | GPIO Port B pin 11; alternate functions: TIM2_CH4, USART3_RX, I2C2_SDA, OTG_HS_ULPI_D4, USART4_TX, UART4_TX, ETH_RMII_TX_EN, ETH_MII_TX_EN, DCMI_D4, FMC_SDNE1. |-| 98 | VCAP_2 | passive | Decoupling capacitor connection for internal voltage regulator; connect 100 nF capacitor from VCAP_2 to VSS. |+| 33 | PC4 | bidirectional | GPIO Port C pin 4; alternate functions: DFSDM1_DATIN1, USART1_TX, UART7_TX, ETH_RMII_RXD0, ETH_MII_RXD0, DCMI_D2, FMC_SDNE0. |+| 34 | PC5 | bidirectional | GPIO Port C pin 5; alternate functions: DFSDM1_CKIN1, USART1_RX, UART7_RX, ETH_RMII_RXD1, ETH_MII_RXD1, DCMI_D3, FMC_SDCKE0. |+| 35 | PB0 | bidirectional | GPIO Port B pin 0; alternate functions: TIM1_CH2N, TIM3_CH4, SPI5_MOSI, UART4_CTS, ETH_MII_RXD4, ETH_RMII_RXD4, FMC_SDNWE. |+| 36 | PB1 | bidirectional | GPIO Port B pin 1; alternate functions: TIM1_CH3N, TIM3_CH3, DFSDM1_DATIN1, UART5_RX, I2C4_SDA, USART3_RX, OTG_HS_ULPI_D2, ETH_MII_RXD5, ETH_RMII_RXD5, DCMI_D0, FMC_SDCKE1. |+| 37 | PB2/BOOT1 | bidirectional | |+| 38 | PE7 | bidirectional | GPIO Port E pin 7; alternate functions: TIM1_ETR, UART7_RX, SPI4_MOSI, SAI1_SD_B, DFSDM1_DATIN3, ETH_MII_RXD4, FMC_D4, FMC_DA4. |+| 39 | PE8 | bidirectional | GPIO Port E pin 8; alternate functions: TIM1_CH1N, UART7_TX, SPI4_MISO, SAI1_SCK_B, DFSDM1_CKIN0, ETH_MII_RXD5, FMC_D5, FMC_DA5. |+| 40 | PE9 | bidirectional | GPIO Port E pin 9; alternate functions: TIM1_CH2N, USART6_RX, SPI4_NSS, SAI1_FS_B, FMC_D6, FMC_DA6. |+| 41 | PE10 | bidirectional | GPIO Port E pin 10; alternate functions: TIM1_CH2N, USART6_RX, SPI4_NSS, SAI1_SD_B, DFSDM1_DATIN4, FMC_D7, FMC_DA7. |+| 42 | PE11 | bidirectional | GPIO Port E pin 11; alternate functions: TIM1_CH2, SPI4_NSS, SAI2_SD_B, LPTIM1_IN2, FMC_D8, FMC_DA8. |+| 43 | PE12 | bidirectional | GPIO Port E pin 12; alternate functions: TIM1_CH3N, SPI4_SCK, SAI2_SCK_B, LPTIM1_ETR, FMC_D9, FMC_DA9. |+| 44 | PE13 | bidirectional | GPIO Port E pin 13; alternate functions: TIM1_CH3, SPI4_MISO, SAI2_FS_B, LPTIM1_OUT, FMC_D10, FMC_DA10. |+| 45 | PE14 | bidirectional | GPIO Port E pin 14; alternate functions: TIM1_CH4, SPI4_MOSI, SAI2_MCLK_B, DFSDM1_CKIN2, FMC_D11, FMC_DA11. |+| 46 | PE15 | bidirectional | GPIO Port E pin 15; alternate functions: TIM1_BKIN, SPI4_MISO, SAI2_SD_B, DFSDM1_DATIN2, DCMI_D13, FMC_D12, FMC_DA12. |+| 47 | PB10 | bidirectional | GPIO Port B pin 10; alternate functions: TIM2_CH3, USART3_TX, SPI2_SCK, I2S2_CK, OTG_HS_ULPI_D3, ETH_MII_RX_ER, FMC_NE0. |+| 48 | PB11 | bidirectional | GPIO Port B pin 11; alternate functions: TIM2_CH4, USART3_RX, I2C2_SDA, OTG_HS_ULPI_D4, USART4_TX, UART4_TX, ETH_RMII_TX_EN, ETH_MII_TX_EN, DCMI_D4, FMC_SDNE1. |+| 49 | VCAP_1 | power_in | Decoupling capacitor connection for internal voltage regulator; connect 100 nF capacitor from VCAP_1 to VSS. |+| 50 | VDD | power_in | Main supply voltage 1.8 V to 3.6 V; must be bypassed with 100 nF and 10 µF capacitors. |+| 51 | PB12 | bidirectional | |+| 52 | PB13 | bidirectional | |+| 53 | PB14 | bidirectional | |+| 54 | PB15 | bidirectional | |+| 55 | PD8 | bidirectional | GPIO Port D pin 8; alternate functions: USART3_TX, FSMC_D13, SDIO_CMD, DCMI_D0, FMC_D13, FMC_DA13. |+| 56 | PD9 | bidirectional | GPIO Port D pin 9; alternate functions: USART3_RX, FSMC_D14, SDIO_D2, DCMI_D1, FMC_D14, FMC_DA14. |+| 57 | PD10 | bidirectional | GPIO Port D pin 10; alternate functions: none standard alternate; FSMC_D15, SDIO_D3, DCMI_D11, FMC_D15, FMC_DA15. |+| 58 | PD11 | bidirectional | GPIO Port D pin 11; alternate functions: USART3_CTS, QUADSPI_BK1_IO0, I2C4_SMBA, SAI2_SD_A, DCMI_D5, FMC_A16, FMC_CLE. |+| 59 | PD12 | bidirectional | GPIO Port D pin 12; alternate functions: TIM4_CH1, USART3_RTS, QUADSPI_BK1_IO1, I2C4_SCL, SAI2_FS_A, LPTIM1_IN1, DCMI_D6, FMC_A17, FMC_ALE. |+| 60 | PD13 | bidirectional | GPIO Port D pin 13; alternate functions: TIM4_CH2, QUADSPI_BK1_IO3, I2C4_SDA, SAI2_SCK_A, LPTIM1_ETR, DCMI_D7, FMC_A18. |+| 61 | PD14 | bidirectional | GPIO Port D pin 14; alternate functions: TIM4_CH3, none alternate; USART8_CTS, FMC_D0, FMC_DA0. |+| 62 | PD15 | bidirectional | GPIO Port D pin 15; alternate functions: TIM4_CH4, none alternate; USART8_RTS, FMC_D1, FMC_DA1. |+| 63 | PC6 | bidirectional | GPIO Port C pin 6; alternate functions: TIM3_CH1, TIM8_CH1, I2S2_MCK, USART6_TX, SDIO_D6, DCMI_D0, FMC_NWAIT. |+| 64 | PC7 | bidirectional | GPIO Port C pin 7; alternate functions: TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, SDIO_D7, DCMI_D1, FMC_NE1. |+| 65 | PC8 | bidirectional | GPIO Port C pin 8; alternate functions: TIM3_CH3, TIM8_CH3, USART6_CTS, SDIO_D0, DCMI_D2, FMC_NE2, FMC_NCE. |+| 66 | PC9 | bidirectional | GPIO Port C pin 9; alternate functions: MCO2, TIM3_CH4, TIM8_CH4, I2S_CKIN, SDIO_D1, I2C3_SDA, DCMI_D3, FMC_NCRDY, FMC_NWAIT. |+| 67 | PA8 | bidirectional | GPIO Port A pin 8; alternate functions: MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, SPI5_NSS, OTG_FS_SOF, ETH_MII_MCO, FMC_D32. |+| 68 | PA9 | bidirectional | GPIO Port A pin 9; alternate functions: TIM1_CH2, USART1_TX, SPI5_MISO, SDIO_CK, I2C3_SMBA, OTG_FS_VBUS, ETH_MII_TX_CLK, I2S2_EXTSD. |+| 69 | PA10 | bidirectional | GPIO Port A pin 10; alternate functions: TIM1_CH3, USART1_RX, SPI5_MOSI, OTG_FS_ID, ETH_MII_RXD1, ETH_RMII_RXD1. |+| 70 | PA11 | bidirectional | GPIO Port A pin 11; alternate functions: USART1_CTS, SPI4_MISO, USART6_TX, OTG_HS_DM, CAN1_RX, DFSDM1_CKIN1, OTG_FS_DM, ETH_MII_RXDV, ETH_RMII_RXDV. |+| 71 | PA12 | bidirectional | GPIO Port A pin 12; alternate functions: SPI3_MOSI, USART1_RTS, I2C2_SDA, USART6_RX, OTG_HS_DP, CAN1_TX, DFSDM1_SDIN0, OTG_FS_DP, ETH_MII_RXD0. |+| 72 | PA13 | bidirectional | GPIO Port A pin 13; alternate functions: USART3_CTS, OTG_HS_ULPI_D2, JTMS, SWDIO. |+| 73 | VCAP_2 | power_in | Decoupling capacitor connection for internal voltage regulator; connect 100 nF capacitor from VCAP_2 to VSS. |+| 74 | VSS | power_in | Ground supply voltage; must be connected to VSS. |+| 75 | VDD | power_in | Main supply voltage 1.8 V to 3.6 V; must be bypassed with 100 nF and 10 µF capacitors. |+| 76 | PA14 | bidirectional | GPIO Port A pin 14; alternate functions: SPI3_MISO, USART2_TX, I2C2_SCL, OTG_HS_SOF, JTCK, ETH_MII_RXCLK, FMC_SDNWE. |+| 77 | PA15 | bidirectional | GPIO Port A pin 15; alternate functions: TIM2_CH1_ETR, SPI1_NSS, SPI3_NSS, USART1_CK, USART4_RX, I2S1_WS, I2C2_SDA, USBH_ULPI_D0, OTG_HS_ULPI_D0, JTDO, ETH_MII_TXD0, FMC_SDNWE. |+| 78 | PC10 | bidirectional | GPIO Port C pin 10; alternate functions: USART3_TX, SPI3_SCK, I2S3_CK, SDIO_D2, UART4_TX, QUADSPI_BK1_IO1, DCMI_D8, FMC_NCRDY, FMC_NWAIT. |+| 79 | PC11 | bidirectional | GPIO Port C pin 11; alternate functions: USART3_RX, SPI3_MISO, UART4_RX, QUADSPI_BK2_NCS, DCMI_D4, FMC_NCRDY. |+| 80 | PC12 | bidirectional | GPIO Port C pin 12; alternate functions: USART3_CK, SPI3_MOSI, I2S3_SD, UART5_TX, SDIO_CK, DCMI_D9, FMC_NCRDY. |+| 81 | PD0 | bidirectional | |+| 82 | PD1 | bidirectional | |+| 83 | PD2 | bidirectional | |+| 84 | PD3 | bidirectional | |+| 85 | PD4 | bidirectional | |+| 86 | PD5 | bidirectional | |+| 87 | PD6 | bidirectional | |+| 88 | PD7 | bidirectional | |+| 89 | PB3 | bidirectional | GPIO Port B pin 3; alternate functions: TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_CK, I2S3_CK, SDIO_CK, CAN1_TX, OTG_HS_ULPI_D5, DFSDM1_CKOUT, ETH_MII_TXD1, FMC_SDCKE1. |+| 90 | PB4 | bidirectional | GPIO Port B pin 4; alternate functions: TIM3_CH1, SPI1_MISO, SPI3_MISO, USART2_CK, I2S3_MCK, CAN1_RX, OTG_HS_ULPI_D6, DFSDM1_DATIN7, ETH_MII_TXD2, FMC_SDCKE0. |+| 91 | PB5 | bidirectional | GPIO Port B pin 5; alternate functions: TIM3_CH2, SPI1_MOSI, SPI3_MOSI, USART1_CK, I2S3_SD, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1. |+| 92 | PB6 | bidirectional | GPIO Port B pin 6; alternate functions: TIM4_CH1, I2C1_SCL, USART1_TX, OTG_HS_ULPI_D1, CAN2_TX, ETH_RMII_TXD1, ETH_MII_TXD1, FMC_NOP. |+| 93 | PB7 | bidirectional | GPIO Port B pin 7; alternate functions: TIM4_CH2, FSMC_NL, I2C1_SDA, SPI5_MISO, USART1_RX, OTG_HS_ULPI_D0, ETH_RMII_TX_EN, ETH_MII_TX_EN, FMC_NL. |+| 94 | BOOT0 | input | Boot pin; must be connected to VSS to boot from flash memory; connect to VDDA through 10 kΩ resistor. |+| 95 | PB8 | bidirectional | GPIO Port B pin 8; alternate functions: TIM4_CH3, SDIO_D4, I2C1_SCL, SPI5_MOSI, CAN1_RX, OTG_HS_ULPI_D7, ETH_MII_TXD3, FMC_NAND_CE1. |+| 96 | PB9 | bidirectional | GPIO Port B pin 9; alternate functions: TIM4_CH4, SDIO_D5, SPI2_NSS, I2S2_WS, CAN1_TX, OTG_HS_ULPI_D6, ETH_MII_RXD3, FMC_NE1. |+| 97 | PE0 | bidirectional | |+| 98 | PE1 | bidirectional | | | 99 | VSS | power_in | Ground supply voltage; must be connected to VSS. | | 100 | VDD | power_in | Main supply voltage 1.8 V to 3.6 V; must be bypassed with 100 nF and 10 µF capacitors. |
package.json+2−2@@ -1,6 +1,6 @@ { "slug": "stm32f427vgt6",- "version": "0.1.0",+ "version": "0.1.1", "type": "component", "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.", "tags": [@@ -685,4 +685,4 @@ "footprint": "viewers/footprint.html" } }-}+}
page.json+4−4@@ -4,7 +4,7 @@ "slug": "stm32f427vgt6", "title": "STM32F427VGT6", "brief": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.1.1", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -712,7 +712,7 @@ "viewers/symbol.html", "viewers/footprint.html" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "org": "adom" }
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direction="io"/>+ <pin name="PB1" x="-17.78" y="-27.94" length="middle" direction="io"/>+ <pin name="PB2/BOOT1" x="-17.78" y="-30.48" length="middle" direction="io"/>+ <pin name="PE7" x="-17.78" y="-33.02" length="middle" direction="io"/>+ <pin name="PE8" x="-17.78" y="-35.56" length="middle" direction="io"/>+ <pin name="PE9" x="-17.78" y="-38.1" length="middle" direction="io"/>+ <pin name="PE10" x="-17.78" y="-40.64" length="middle" direction="io"/>+ <pin name="PE11" x="-17.78" y="-43.18" length="middle" direction="io"/>+ <pin name="PE12" x="-17.78" y="-45.72" length="middle" direction="io"/>+ <pin name="PE13" x="-17.78" y="-48.26" length="middle" direction="io"/>+ <pin name="PE14" x="-17.78" y="-50.8" length="middle" direction="io"/>+ <pin name="PE15" x="-17.78" y="-53.34" length="middle" direction="io"/>+ <pin name="PB10" x="-17.78" y="-55.88" length="middle" direction="io"/>+ <pin name="PB11" x="-17.78" y="-58.42" length="middle" direction="io"/>+ <pin name="VCAP_1" x="-17.78" y="-60.96" length="middle" direction="pwr"/>+ <pin name="VDD@4" x="-17.78" y="-63.5" length="middle" direction="pwr"/>+ <pin name="VDD@5" x="17.78" y="60.96" length="middle" direction="pwr" rot="R180"/> <pin name="VSS@3" x="17.78" y="58.42" length="middle" direction="pwr" rot="R180"/>- <pin name="VCAP_2" x="17.78" y="55.88" length="middle" direction="pas" rot="R180"/>- <pin name="PB11" x="17.78" y="53.34" length="middle" direction="io" rot="R180"/>- <pin name="PB10" x="17.78" y="50.8" length="middle" direction="io" rot="R180"/>- <pin name="PH12" x="17.78" y="48.26" length="middle" direction="io" rot="R180"/>- <pin name="PH11" x="17.78" y="45.72" length="middle" direction="io" rot="R180"/>- <pin name="PH10" x="17.78" y="43.18" length="middle" direction="io" rot="R180"/>- <pin name="PH9" x="17.78" y="40.64" length="middle" direction="io" rot="R180"/>- <pin name="PH8" x="17.78" y="38.1" length="middle" direction="io" rot="R180"/>- <pin name="PH7" x="17.78" y="35.56" length="middle" direction="io" rot="R180"/>- <pin name="PH6" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>- <pin name="PI8" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/>- <pin name="PC15" x="17.78" y="27.94" length="middle" direction="io" rot="R180"/>- <pin name="PC14" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>- <pin name="PC13" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>- <pin name="PC12" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>- <pin name="PC11" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>- <pin name="PC10" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>- <pin name="VDD@4" x="17.78" y="12.7" length="middle" direction="pwr" rot="R180"/>- <pin name="VSS@4" x="17.78" y="10.16" length="middle" direction="pwr" rot="R180"/>- <pin name="PA15-JTDI" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>- <pin name="PA14-JTCK-SWCLK" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>- <pin name="PA13-JTMS-SWDIO" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>- <pin name="PC9" x="17.78" y="0" length="middle" direction="io" rot="R180"/>- <pin name="PC8" x="17.78" y="-2.54" length="middle" direction="io" rot="R180"/>- <pin name="PC7" x="17.78" y="-5.08" length="middle" direction="io" rot="R180"/>- <pin name="PC6" x="17.78" y="-7.62" length="middle" direction="io" rot="R180"/>- <pin name="PC5" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>- <pin name="PC4" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>- <pin name="PC3" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>- <pin name="PC2" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>- <pin name="PC1" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>- <pin name="PC0" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>- <pin name="VDD@5" x="17.78" y="-25.4" length="middle" direction="pwr" rot="R180"/>- <pin name="VSS@5" x="17.78" y="-27.94" length="middle" direction="pwr" rot="R180"/>- <pin name="VCAP_1" x="17.78" y="-30.48" length="middle" direction="pas" rot="R180"/>- <pin name="PD15" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>- <pin name="PD14" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>- <pin name="PD13" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>- <pin name="PD12" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>- <pin name="PD11" x="17.78" y="-43.18" length="middle" direction="io" rot="R180"/>- <pin name="PD10" x="17.78" y="-45.72" length="middle" direction="io" rot="R180"/>- <pin name="PD9" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>- <pin name="PD8" x="17.78" y="-50.8" length="middle" direction="io" rot="R180"/>- <pin name="VDD@6" x="17.78" y="-53.34" length="middle" direction="pwr" rot="R180"/>- <pin name="VSS@6" x="17.78" y="-55.88" length="middle" direction="pwr" rot="R180"/>- <pin name="PE15" x="17.78" y="-58.42" length="middle" direction="io" rot="R180"/>- <pin name="PE14" x="17.78" y="-60.96" length="middle" direction="io" rot="R180"/>- <pin name="PE13" x="17.78" y="-63.5" length="middle" direction="io" rot="R180"/>+ <pin name="PE1" x="17.78" y="55.88" length="middle" direction="io" rot="R180"/>+ <pin name="PE0" x="17.78" y="53.34" length="middle" direction="io" rot="R180"/>+ <pin name="PB9" x="17.78" y="50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PB8" x="17.78" y="48.26" length="middle" direction="io" rot="R180"/>+ <pin name="BOOT0" x="17.78" y="45.72" length="middle" direction="in" rot="R180"/>+ <pin name="PB7" x="17.78" y="43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PB6" x="17.78" y="40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PB5" x="17.78" y="38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PB4" x="17.78" y="35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PB3" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PD7" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PD6" x="17.78" y="27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PD5" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PD4" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PD3" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PD2" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PD1" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PD0" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>+ <pin name="PA15" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+ <pin name="PA14" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@6" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@4" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+ <pin name="VCAP_2" x="17.78" y="-7.62" length="middle" direction="pwr" rot="R180"/>+ <pin name="PA13" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PA12" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PA11" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PA10" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PA9" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PA8" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PC9" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PC8" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PC7" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PC6" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PD15" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PD14" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PD13" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PD12" x="17.78" y="-43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PD11" x="17.78" y="-45.72" length="middle" direction="io" rot="R180"/>+ <pin name="PD10" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>+ <pin name="PD9" x="17.78" y="-50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PD8" x="17.78" y="-53.34" length="middle" direction="io" rot="R180"/>+ <pin name="PB15" x="17.78" y="-55.88" length="middle" direction="io" rot="R180"/>+ <pin name="PB14" x="17.78" y="-58.42" length="middle" direction="io" rot="R180"/>+ <pin name="PB13" x="17.78" y="-60.96" length="middle" direction="io" rot="R180"/>+ <pin name="PB12" x="17.78" y="-63.5" length="middle" direction="io" rot="R180"/> </symbol> </symbols> <devicesets> <deviceset name="STM32F427VGT6" prefix="U">- <description></description>+ <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data</description> <gates> <gate name="G$1" symbol="STM32F427VGT6" x="0" y="0"/> </gates>@@ -302,103 +303,113 @@ <connect gate="G$1" pin="PE4" pad="3"/> <connect gate="G$1" pin="PE5" pad="4"/> <connect gate="G$1" pin="PE6" pad="5"/>- <connect gate="G$1" pin="VREF+" pad="6"/>- <connect gate="G$1" pin="VDDA" pad="7"/>- <connect gate="G$1" pin="VSSA" pad="8"/>- <connect gate="G$1" pin="PB9" pad="9"/>- <connect gate="G$1" pin="BOOT0" pad="10"/>- <connect gate="G$1" pin="PB8" pad="11"/>- <connect gate="G$1" pin="PB7" pad="12"/>- <connect gate="G$1" pin="PB6" pad="13"/>- <connect gate="G$1" pin="PB5" pad="14"/>- <connect gate="G$1" pin="PB4" pad="15"/>- <connect gate="G$1" pin="PB3" pad="16"/>- <connect gate="G$1" pin="PA15" pad="17"/>- <connect gate="G$1" pin="PA14" pad="18"/>- <connect gate="G$1" pin="PA13" pad="19"/>- <connect gate="G$1" pin="VDDA@2" pad="20"/>- <connect gate="G$1" pin="VSSA@2" pad="21"/>- <connect gate="G$1" pin="PA12" pad="22"/>- <connect gate="G$1" pin="PA11" pad="23"/>- <connect gate="G$1" pin="PA10" pad="24"/>- <connect gate="G$1" pin="PA9" pad="25"/>- <connect gate="G$1" pin="PA8" pad="26"/>- <connect gate="G$1" pin="PH2" pad="27"/>- <connect gate="G$1" pin="PH3" pad="28"/>- <connect gate="G$1" pin="NRST" pad="29"/>- <connect gate="G$1" pin="VSS" pad="30"/>- <connect gate="G$1" pin="VDD" pad="31"/>+ <connect gate="G$1" pin="VBAT" pad="6"/>+ <connect gate="G$1" pin="PC13" pad="7"/>+ <connect gate="G$1" pin="PC14/OSC32_IN" pad="8"/>+ <connect gate="G$1" pin="PC15/OSC32_OUT" pad="9"/>+ <connect gate="G$1" pin="VSS" pad="10"/>+ <connect gate="G$1" pin="VDD" pad="11"/>+ <connect gate="G$1" pin="PH0/OSC_IN" pad="12"/>+ <connect gate="G$1" pin="PH1/OSC_OUT" pad="13"/>+ <connect gate="G$1" pin="NRST" pad="14"/>+ <connect gate="G$1" pin="PC0" pad="15"/>+ <connect gate="G$1" pin="PC1" pad="16"/>+ <connect gate="G$1" pin="PC2" pad="17"/>+ <connect gate="G$1" pin="PC3" pad="18"/>+ <connect gate="G$1" pin="VDD@2" pad="19"/>+ <connect gate="G$1" pin="VSSA" pad="20"/>+ <connect gate="G$1" pin="VREF+" pad="21"/>+ <connect gate="G$1" pin="VDDA" pad="22"/>+ <connect gate="G$1" pin="PA0/WKUP" pad="23"/>+ <connect gate="G$1" pin="PA1" pad="24"/>+ <connect gate="G$1" pin="PA2" pad="25"/>+ <connect gate="G$1" pin="PA3" pad="26"/>+ <connect gate="G$1" pin="VSS@2" pad="27"/>+ <connect gate="G$1" pin="VDD@3" pad="28"/>+ <connect gate="G$1" pin="PA4" pad="29"/>+ <connect gate="G$1" pin="PA5" pad="30"/>+ <connect gate="G$1" pin="PA6" pad="31"/> <connect gate="G$1" pin="PA7" pad="32"/>- <connect gate="G$1" pin="PA6" pad="33"/>- <connect gate="G$1" pin="PA5" pad="34"/>- <connect gate="G$1" pin="PA4" pad="35"/>- <connect gate="G$1" pin="PA3" pad="36"/>- <connect gate="G$1" pin="PA2" pad="37"/>- <connect gate="G$1" pin="PA1" pad="38"/>- <connect gate="G$1" pin="PA0-WKUP" pad="39"/>- <connect gate="G$1" pin="VSS@2" pad="40"/>- <connect gate="G$1" pin="VDD@2" pad="41"/>- <connect gate="G$1" pin="PB0" pad="42"/>- <connect gate="G$1" pin="PB1" pad="43"/>- <connect gate="G$1" pin="PB2" pad="44"/>- <connect gate="G$1" pin="PE7" pad="45"/>- <connect gate="G$1" pin="PE8" pad="46"/>- <connect gate="G$1" pin="PE9" pad="47"/>- <connect gate="G$1" pin="PE10" pad="48"/>- <connect gate="G$1" pin="PE11" pad="49"/>- <connect gate="G$1" pin="PE12" pad="50"/>- <connect gate="G$1" pin="VDD@3" pad="100"/>+ <connect gate="G$1" pin="PC4" pad="33"/>+ <connect gate="G$1" pin="PC5" pad="34"/>+ <connect gate="G$1" pin="PB0" pad="35"/>+ <connect gate="G$1" pin="PB1" pad="36"/>+ <connect gate="G$1" pin="PB2/BOOT1" pad="37"/>+ <connect gate="G$1" pin="PE7" pad="38"/>+ <connect gate="G$1" pin="PE8" pad="39"/>+ <connect gate="G$1" pin="PE9" pad="40"/>+ <connect gate="G$1" pin="PE10" pad="41"/>+ <connect gate="G$1" pin="PE11" pad="42"/>+ <connect gate="G$1" pin="PE12" pad="43"/>+ <connect gate="G$1" pin="PE13" pad="44"/>+ <connect gate="G$1" pin="PE14" pad="45"/>+ <connect gate="G$1" pin="PE15" pad="46"/>+ <connect gate="G$1" pin="PB10" pad="47"/>+ <connect gate="G$1" pin="PB11" pad="48"/>+ <connect gate="G$1" pin="VCAP_1" pad="49"/>+ <connect gate="G$1" pin="VDD@4" pad="50"/>+ <connect gate="G$1" pin="VDD@5" pad="100"/> <connect gate="G$1" pin="VSS@3" pad="99"/>- <connect gate="G$1" pin="VCAP_2" pad="98"/>- <connect gate="G$1" pin="PB11" pad="97"/>- <connect gate="G$1" pin="PB10" pad="96"/>- <connect gate="G$1" pin="PH12" pad="95"/>- <connect gate="G$1" pin="PH11" pad="94"/>- <connect gate="G$1" pin="PH10" pad="93"/>- <connect gate="G$1" pin="PH9" pad="92"/>- <connect gate="G$1" pin="PH8" pad="91"/>- <connect gate="G$1" pin="PH7" pad="90"/>- <connect gate="G$1" pin="PH6" pad="89"/>- <connect gate="G$1" pin="PI8" pad="88"/>- <connect gate="G$1" pin="PC15" pad="87"/>- <connect gate="G$1" pin="PC14" pad="86"/>- <connect gate="G$1" pin="PC13" pad="85"/>- <connect gate="G$1" pin="PC12" pad="84"/>- <connect gate="G$1" pin="PC11" pad="83"/>- <connect gate="G$1" pin="PC10" pad="82"/>- <connect gate="G$1" pin="VDD@4" pad="81"/>- <connect gate="G$1" pin="VSS@4" pad="80"/>- <connect gate="G$1" pin="PA15-JTDI" pad="79"/>- <connect gate="G$1" pin="PA14-JTCK-SWCLK" pad="78"/>- <connect gate="G$1" pin="PA13-JTMS-SWDIO" pad="77"/>- <connect gate="G$1" pin="PC9" pad="76"/>- <connect gate="G$1" pin="PC8" pad="75"/>- <connect gate="G$1" pin="PC7" pad="74"/>- <connect gate="G$1" pin="PC6" pad="73"/>- <connect gate="G$1" pin="PC5" pad="72"/>- <connect gate="G$1" pin="PC4" pad="71"/>- <connect gate="G$1" pin="PC3" pad="70"/>- <connect gate="G$1" pin="PC2" pad="69"/>- <connect gate="G$1" pin="PC1" pad="68"/>- <connect gate="G$1" pin="PC0" pad="67"/>- <connect gate="G$1" pin="VDD@5" pad="66"/>- <connect gate="G$1" pin="VSS@5" pad="65"/>- <connect gate="G$1" pin="VCAP_1" pad="64"/>- <connect gate="G$1" pin="PD15" pad="63"/>- <connect gate="G$1" pin="PD14" pad="62"/>- <connect gate="G$1" pin="PD13" pad="61"/>- <connect gate="G$1" pin="PD12" pad="60"/>- <connect gate="G$1" pin="PD11" pad="59"/>- <connect gate="G$1" pin="PD10" pad="58"/>- <connect gate="G$1" pin="PD9" pad="57"/>- <connect gate="G$1" pin="PD8" pad="56"/>- <connect gate="G$1" pin="VDD@6" pad="55"/>- <connect gate="G$1" pin="VSS@6" pad="54"/>- <connect gate="G$1" pin="PE15" pad="53"/>- <connect gate="G$1" pin="PE14" pad="52"/>- <connect gate="G$1" pin="PE13" pad="51"/>+ <connect gate="G$1" pin="PE1" pad="98"/>+ <connect gate="G$1" pin="PE0" pad="97"/>+ <connect gate="G$1" pin="PB9" pad="96"/>+ <connect gate="G$1" pin="PB8" pad="95"/>+ <connect gate="G$1" pin="BOOT0" pad="94"/>+ <connect gate="G$1" pin="PB7" pad="93"/>+ <connect gate="G$1" pin="PB6" pad="92"/>+ <connect gate="G$1" pin="PB5" pad="91"/>+ <connect gate="G$1" pin="PB4" pad="90"/>+ <connect gate="G$1" pin="PB3" pad="89"/>+ <connect gate="G$1" pin="PD7" pad="88"/>+ <connect gate="G$1" pin="PD6" pad="87"/>+ <connect gate="G$1" pin="PD5" pad="86"/>+ <connect gate="G$1" pin="PD4" pad="85"/>+ <connect gate="G$1" pin="PD3" pad="84"/>+ <connect gate="G$1" pin="PD2" pad="83"/>+ <connect gate="G$1" pin="PD1" pad="82"/>+ <connect gate="G$1" pin="PD0" pad="81"/>+ <connect gate="G$1" pin="PC12" pad="80"/>+ <connect gate="G$1" pin="PC11" pad="79"/>+ <connect gate="G$1" pin="PC10" pad="78"/>+ <connect gate="G$1" pin="PA15" pad="77"/>+ <connect gate="G$1" pin="PA14" pad="76"/>+ <connect gate="G$1" pin="VDD@6" pad="75"/>+ <connect gate="G$1" pin="VSS@4" pad="74"/>+ <connect gate="G$1" pin="VCAP_2" pad="73"/>+ <connect gate="G$1" pin="PA13" pad="72"/>+ <connect gate="G$1" pin="PA12" pad="71"/>+ <connect gate="G$1" pin="PA11" pad="70"/>+ <connect gate="G$1" pin="PA10" pad="69"/>+ <connect gate="G$1" pin="PA9" pad="68"/>+ <connect gate="G$1" pin="PA8" pad="67"/>+ <connect gate="G$1" pin="PC9" pad="66"/>+ <connect gate="G$1" pin="PC8" pad="65"/>+ <connect gate="G$1" pin="PC7" pad="64"/>+ <connect gate="G$1" pin="PC6" pad="63"/>+ <connect gate="G$1" pin="PD15" pad="62"/>+ <connect gate="G$1" pin="PD14" pad="61"/>+ <connect gate="G$1" pin="PD13" pad="60"/>+ <connect gate="G$1" pin="PD12" pad="59"/>+ <connect gate="G$1" pin="PD11" pad="58"/>+ <connect gate="G$1" pin="PD10" pad="57"/>+ <connect gate="G$1" pin="PD9" pad="56"/>+ <connect gate="G$1" pin="PD8" pad="55"/>+ <connect gate="G$1" pin="PB15" pad="54"/>+ <connect gate="G$1" pin="PB14" pad="53"/>+ <connect gate="G$1" pin="PB13" pad="52"/>+ <connect gate="G$1" pin="PB12" pad="51"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="STM32F427VGT6" constant="no"/>+ <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+ <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588858460209623040" constant="no"/>+ <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/stm32f427vgt6" constant="no"/>+ <attribute name="MOUSER_PN" value="511-STM32F427VGT6" constant="no"/>+ <attribute name="DIGIKEY_PN" value="497-17449-ND" constant="no"/>+ <attribute name="LCSC_PN" value="C117815" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>