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STM32F401RET6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+112@@ -0,0 +1,112 @@+# STM32F401RET6++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)++STM32F401RET6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VBAT | power_in | Backup battery supply for RTC, external clock 32 kHz oscillator, and backup registers when VDD is off (1.65 V to 3.6 V). |+| 2 | PC13 | bidirectional | General-purpose I/O (5V tolerant), also RTC_TAMP1/RTC_TS/RTC_OUT and EVENTOUT. Powered from backup domain - limited output drive (2 MHz, 30 pF, no current-source loads). |+| 3 | PC14-OSC32_IN | bidirectional | General-purpose I/O PC14 (5V tolerant) doubling as the 32.768 kHz LSE oscillator input OSC32_IN. Not 5 V tolerant in analog/oscillator mode. |+| 4 | PC15-OSC32_OUT | bidirectional | General-purpose I/O PC15 (5V tolerant) doubling as the 32.768 kHz LSE oscillator output OSC32_OUT. Not 5 V tolerant in analog/oscillator mode. |+| 5 | PH0-OSC_IN | bidirectional | General-purpose I/O PH0 or high-speed external HSE crystal oscillator input OSC_IN (typically 4-26 MHz). Not 5 V tolerant when in oscillator mode. |+| 6 | PH1-OSC_OUT | bidirectional | General-purpose I/O PH1 or high-speed external HSE crystal oscillator output OSC_OUT. Not 5 V tolerant when in oscillator mode. |+| 7 | NRST | bidirectional | Bidirectional active-low system reset with embedded weak pull-up resistor (~40 kΩ). Drive low >20 µs to reset the MCU. |+| 8 | PC0 | bidirectional | General-purpose I/O (5V tolerant); additional function ADC1_IN10 (12-bit ADC channel 10). |+| 9 | PC1 | bidirectional | General-purpose I/O (5V tolerant); additional function ADC1_IN11. |+| 10 | PC2 | bidirectional | General-purpose I/O (5V tolerant); AF SPI2_MISO / I2S2ext_SD; additional function ADC1_IN12. |+| 11 | PC3 | bidirectional | General-purpose I/O (5V tolerant); AF SPI2_MOSI / I2S2_SD; additional function ADC1_IN13. |+| 12 | VSSA/VREF- | power_in | Analog ground and negative ADC/DAC reference (tied together on LQFP-64). Connect to the board analog ground plane. |+| 13 | VDDA/VREF+ | power_in | Analog supply and positive ADC/DAC reference (tied together on LQFP-64), 1.7 V to 3.6 V. Requires decoupling to VSSA. |+| 14 | PA0-WKUP | bidirectional | General-purpose I/O (5V tolerant); AF USART2_CTS, TIM2_CH1/TIM2_ETR, TIM5_CH1, EVENTOUT; additional functions ADC1_IN0 and WKUP wake-up-from-standby input. |+| 15 | PA1 | bidirectional | General-purpose I/O (5V tolerant); AF USART2_RTS, TIM2_CH2, TIM5_CH2; additional function ADC1_IN1. |+| 16 | PA2 | bidirectional | General-purpose I/O (5V tolerant); AF USART2_TX, TIM2_CH3, TIM5_CH3, TIM9_CH1; additional function ADC1_IN2. |+| 17 | PA3 | bidirectional | General-purpose I/O (5V tolerant); AF USART2_RX, TIM2_CH4, TIM5_CH4, TIM9_CH2; additional function ADC1_IN3. |+| 18 | VSS | power_in | Digital ground. |+| 19 | VDD | power_in | Digital core/IO supply, 1.7 V to 3.6 V. Requires local decoupling capacitors to VSS. |+| 20 | PA4 | bidirectional | General-purpose I/O (5V tolerant); AF SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK; additional function ADC1_IN4. |+| 21 | PA5 | bidirectional | General-purpose I/O (5V tolerant); AF SPI1_SCK, TIM2_CH1/TIM2_ETR; additional function ADC1_IN5. |+| 22 | PA6 | bidirectional | General-purpose I/O (5V tolerant); AF SPI1_MISO, TIM1_BKIN, TIM3_CH1; additional function ADC1_IN6. |+| 23 | PA7 | bidirectional | General-purpose I/O (5V tolerant); AF SPI1_MOSI, TIM1_CH1N, TIM3_CH2; additional function ADC1_IN7. |+| 24 | PC4 | bidirectional | General-purpose I/O (5V tolerant); additional function ADC1_IN14. |+| 25 | PC5 | bidirectional | General-purpose I/O (5V tolerant); additional function ADC1_IN15. |+| 26 | PB0 | bidirectional | General-purpose I/O (5V tolerant); AF TIM1_CH2N, TIM3_CH3; additional function ADC1_IN8. |+| 27 | PB1 | bidirectional | General-purpose I/O (5V tolerant); AF TIM1_CH3N, TIM3_CH4; additional function ADC1_IN9. |+| 28 | PB2-BOOT1 | bidirectional | General-purpose I/O PB2 (5V tolerant), also latched at reset as BOOT1 to select the boot memory in combination with BOOT0. |+| 29 | PB10 | bidirectional | General-purpose I/O (5V tolerant); AF SPI2_SCK/I2S2_CK, I2C2_SCL, TIM2_CH3. |+| 30 | VCAP1 | passive | Internal 1.2 V core regulator decoupling. Requires a low-ESR ~2.2 µF ceramic capacitor to VSS. |+| 31 | VSS | power_in | Digital ground. |+| 32 | VDD | power_in | Digital core/IO supply, 1.7 V to 3.6 V. |+| 33 | PB12 | bidirectional | General-purpose I/O (5V tolerant); AF SPI2_NSS/I2S2_WS, I2C2_SMBA, TIM1_BKIN. |+| 34 | PB13 | bidirectional | General-purpose I/O (5V tolerant); AF SPI2_SCK/I2S2_CK, TIM1_CH1N. |+| 35 | PB14 | bidirectional | General-purpose I/O (5V tolerant); AF SPI2_MISO, I2S2ext_SD, TIM1_CH2N. |+| 36 | PB15 | bidirectional | General-purpose I/O (5V tolerant); AF SPI2_MOSI/I2S2_SD, TIM1_CH3N; additional function RTC_REFIN. |+| 37 | PC6 | bidirectional | General-purpose I/O (5V tolerant); AF I2S2_MCK, USART6_TX, TIM3_CH1, SDIO_D6. |+| 38 | PC7 | bidirectional | General-purpose I/O (5V tolerant); AF I2S3_MCK, USART6_RX, TIM3_CH2, SDIO_D7. |+| 39 | PC8 | bidirectional | General-purpose I/O (5V tolerant); AF USART6_CK, TIM3_CH3, SDIO_D0. |+| 40 | PC9 | bidirectional | General-purpose I/O (5V tolerant); AF I2S_CKIN, I2C3_SDA, TIM3_CH4, SDIO_D1, MCO_2. |+| 41 | PA8 | bidirectional | General-purpose I/O (5V tolerant); AF I2C3_SCL, USART1_CK, TIM1_CH1, OTG_FS_SOF, MCO_1 clock output. |+| 42 | PA9 | bidirectional | General-purpose I/O (5V tolerant); AF I2C3_SMBA, USART1_TX, TIM1_CH2; additional function OTG_FS_VBUS sense. |+| 43 | PA10 | bidirectional | General-purpose I/O (5V tolerant); AF USART1_RX, TIM1_CH3, OTG_FS_ID. |+| 44 | PA11 | bidirectional | General-purpose I/O (5V tolerant); AF USART1_CTS, USART6_TX, TIM1_CH4, OTG_FS_DM (USB D−). |+| 45 | PA12 | bidirectional | General-purpose I/O (5V tolerant); AF USART1_RTS, USART6_RX, TIM1_ETR, OTG_FS_DP (USB D+). |+| 46 | PA13 (JTMS-SWDIO) | bidirectional | General-purpose I/O PA13 (5V tolerant); default after reset is JTMS / SWDIO (SW-DP/JTAG data). Also EVENTOUT. |+| 47 | VSS | power_in | Digital ground. |+| 48 | VDD | power_in | Digital core/IO supply, 1.7 V to 3.6 V. |+| 49 | PA14 (JTCK-SWCLK) | bidirectional | General-purpose I/O PA14 (5V tolerant); default after reset is JTCK / SWCLK (SW-DP/JTAG clock). |+| 50 | PA15 (JTDI) | bidirectional | General-purpose I/O PA15 (5V tolerant); default after reset is JTDI (JTAG data input). AF SPI1_NSS, SPI3_NSS/I2S3_WS, TIM2_CH1/TIM2_ETR. |+| 51 | PC10 | bidirectional | General-purpose I/O (5V tolerant); AF SPI3_SCK/I2S3_CK, SDIO_D2. |+| 52 | PC11 | bidirectional | General-purpose I/O (5V tolerant); AF I2S3ext_SD, SPI3_MISO, SDIO_D3. |+| 53 | PC12 | bidirectional | General-purpose I/O (5V tolerant); AF SPI3_MOSI/I2S3_SD, SDIO_CK. |+| 54 | PD2 | bidirectional | General-purpose I/O (5V tolerant); AF TIM3_ETR, SDIO_CMD. |+| 55 | PB3 (JTDO-SWO) | bidirectional | General-purpose I/O PB3 (5V tolerant); default after reset is JTDO / SWO trace output. AF SPI1_SCK, SPI3_SCK/I2S3_CK, I2C2_SDA, TIM2_CH2. |+| 56 | PB4 (NJTRST) | bidirectional | General-purpose I/O PB4 (5V tolerant); default after reset is NJTRST (JTAG reset). AF SPI1_MISO, SPI3_MISO, I2S3ext_SD, I2C3_SDA, TIM3_CH1. |+| 57 | PB5 | bidirectional | General-purpose I/O (5V tolerant); AF SPI1_MOSI, SPI3_MOSI/I2S3_SD, I2C1_SMBA, TIM3_CH2. |+| 58 | PB6 | bidirectional | General-purpose I/O (5V tolerant); AF I2C1_SCL, USART1_TX, TIM4_CH1. |+| 59 | PB7 | bidirectional | General-purpose I/O (5V tolerant); AF I2C1_SDA, USART1_RX, TIM4_CH2. |+| 60 | BOOT0 | input | Dedicated boot-mode selection pin (5V tolerant), latched at reset with BOOT1 (PB2) to choose main flash, system memory, or SRAM boot. Also VPP for flash programming in production. |+| 61 | PB8 | bidirectional | General-purpose I/O (5V tolerant); AF I2C1_SCL, TIM4_CH3, TIM10_CH1, SDIO_D4. |+| 62 | PB9 | bidirectional | General-purpose I/O (5V tolerant); AF SPI2_NSS/I2S2_WS, I2C1_SDA, TIM4_CH4, TIM11_CH1, SDIO_D5. |+| 63 | VSS | power_in | Digital ground. |+| 64 | VDD | power_in | Digital core/IO supply, 1.7 V to 3.6 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-64(10x10) |+| Category | MCU |+| Pins | 64 |++## Ordering variants++- `STM32F401RET6CDU6`+- `STM32F401RET6CEU6`+- `STM32F401RET6CDY6`+- `STM32F401RET6CEY6`+- `STM32F401RET6RDT6`+- `STM32F401RET6RET6`+- `STM32F401RET6VDT6`+- `STM32F401RET6VET6`+- `STM32F401RET6VDH6`+- `STM32F401RET6VEH6`++## CAD (KiCad official)++- Symbol: `STM32F401RET6`+- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`+- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/stm32f401ret6.pdf) (135 pp, sha256 `7daad2163948dcbe`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32f401ret6-datasheet.pdf)
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