STM32F401RET6

@@ -8,70 +8,70 @@ STM32F401RET6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descr  | Pin | Name | Type | Function | |---|---|---|---|-| 1 | VBAT | power_in | Backup battery supply for RTC, external clock 32 kHz oscillator, and backup registers when VDD is off (1.65 V to 3.6 V). |-| 2 | PC13 | bidirectional | General-purpose I/O (5V tolerant), also RTC_TAMP1/RTC_TS/RTC_OUT and EVENTOUT. Powered from backup domain - limited output drive (2 MHz, 30 pF, no current-source loads). |-| 3 | PC14-OSC32_IN | bidirectional | General-purpose I/O PC14 (5V tolerant) doubling as the 32.768 kHz LSE oscillator input OSC32_IN. Not 5 V tolerant in analog/oscillator mode. |-| 4 | PC15-OSC32_OUT | bidirectional | General-purpose I/O PC15 (5V tolerant) doubling as the 32.768 kHz LSE oscillator output OSC32_OUT. Not 5 V tolerant in analog/oscillator mode. |-| 5 | PH0-OSC_IN | bidirectional | General-purpose I/O PH0 or high-speed external HSE crystal oscillator input OSC_IN (typically 4-26 MHz). Not 5 V tolerant when in oscillator mode. |-| 6 | PH1-OSC_OUT | bidirectional | General-purpose I/O PH1 or high-speed external HSE crystal oscillator output OSC_OUT. Not 5 V tolerant when in oscillator mode. |-| 7 | NRST | bidirectional | Bidirectional active-low system reset with embedded weak pull-up resistor (~40 kΩ). Drive low >20 µs to reset the MCU. |-| 8 | PC0 | bidirectional | General-purpose I/O (5V tolerant); additional function ADC1_IN10 (12-bit ADC channel 10). |-| 9 | PC1 | bidirectional | General-purpose I/O (5V tolerant); additional function ADC1_IN11. |-| 10 | PC2 | bidirectional | General-purpose I/O (5V tolerant); AF SPI2_MISO / I2S2ext_SD; additional function ADC1_IN12. |-| 11 | PC3 | bidirectional | General-purpose I/O (5V tolerant); AF SPI2_MOSI / I2S2_SD; additional function ADC1_IN13. |-| 12 | VSSA/VREF- | power_in | Analog ground and negative ADC/DAC reference (tied together on LQFP-64). Connect to the board analog ground plane. |-| 13 | VDDA/VREF+ | power_in | Analog supply and positive ADC/DAC reference (tied together on LQFP-64), 1.7 V to 3.6 V. Requires decoupling to VSSA. |-| 14 | PA0-WKUP | bidirectional | General-purpose I/O (5V tolerant); AF USART2_CTS, TIM2_CH1/TIM2_ETR, TIM5_CH1, EVENTOUT; additional functions ADC1_IN0 and WKUP wake-up-from-standby input. |-| 15 | PA1 | bidirectional | General-purpose I/O (5V tolerant); AF USART2_RTS, TIM2_CH2, TIM5_CH2; additional function ADC1_IN1. |-| 16 | PA2 | bidirectional | General-purpose I/O (5V tolerant); AF USART2_TX, TIM2_CH3, TIM5_CH3, TIM9_CH1; additional function ADC1_IN2. |-| 17 | PA3 | bidirectional | General-purpose I/O (5V tolerant); AF USART2_RX, TIM2_CH4, TIM5_CH4, TIM9_CH2; additional function ADC1_IN3. |-| 18 | VSS | power_in | Digital ground. |-| 19 | VDD | power_in | Digital core/IO supply, 1.7 V to 3.6 V. Requires local decoupling capacitors to VSS. |-| 20 | PA4 | bidirectional | General-purpose I/O (5V tolerant); AF SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK; additional function ADC1_IN4. |-| 21 | PA5 | bidirectional | General-purpose I/O (5V tolerant); AF SPI1_SCK, TIM2_CH1/TIM2_ETR; additional function ADC1_IN5. |-| 22 | PA6 | bidirectional | General-purpose I/O (5V tolerant); AF SPI1_MISO, TIM1_BKIN, TIM3_CH1; additional function ADC1_IN6. |-| 23 | PA7 | bidirectional | General-purpose I/O (5V tolerant); AF SPI1_MOSI, TIM1_CH1N, TIM3_CH2; additional function ADC1_IN7. |-| 24 | PC4 | bidirectional | General-purpose I/O (5V tolerant); additional function ADC1_IN14. |-| 25 | PC5 | bidirectional | General-purpose I/O (5V tolerant); additional function ADC1_IN15. |-| 26 | PB0 | bidirectional | General-purpose I/O (5V tolerant); AF TIM1_CH2N, TIM3_CH3; additional function ADC1_IN8. |-| 27 | PB1 | bidirectional | General-purpose I/O (5V tolerant); AF TIM1_CH3N, TIM3_CH4; additional function ADC1_IN9. |-| 28 | PB2-BOOT1 | bidirectional | General-purpose I/O PB2 (5V tolerant), also latched at reset as BOOT1 to select the boot memory in combination with BOOT0. |-| 29 | PB10 | bidirectional | General-purpose I/O (5V tolerant); AF SPI2_SCK/I2S2_CK, I2C2_SCL, TIM2_CH3. |-| 30 | VCAP1 | passive | Internal 1.2 V core regulator decoupling. Requires a low-ESR ~2.2 µF ceramic capacitor to VSS. |-| 31 | VSS | power_in | Digital ground. |-| 32 | VDD | power_in | Digital core/IO supply, 1.7 V to 3.6 V. |-| 33 | PB12 | bidirectional | General-purpose I/O (5V tolerant); AF SPI2_NSS/I2S2_WS, I2C2_SMBA, TIM1_BKIN. |-| 34 | PB13 | bidirectional | General-purpose I/O (5V tolerant); AF SPI2_SCK/I2S2_CK, TIM1_CH1N. |-| 35 | PB14 | bidirectional | General-purpose I/O (5V tolerant); AF SPI2_MISO, I2S2ext_SD, TIM1_CH2N. |-| 36 | PB15 | bidirectional | General-purpose I/O (5V tolerant); AF SPI2_MOSI/I2S2_SD, TIM1_CH3N; additional function RTC_REFIN. |-| 37 | PC6 | bidirectional | General-purpose I/O (5V tolerant); AF I2S2_MCK, USART6_TX, TIM3_CH1, SDIO_D6. |-| 38 | PC7 | bidirectional | General-purpose I/O (5V tolerant); AF I2S3_MCK, USART6_RX, TIM3_CH2, SDIO_D7. |-| 39 | PC8 | bidirectional | General-purpose I/O (5V tolerant); AF USART6_CK, TIM3_CH3, SDIO_D0. |-| 40 | PC9 | bidirectional | General-purpose I/O (5V tolerant); AF I2S_CKIN, I2C3_SDA, TIM3_CH4, SDIO_D1, MCO_2. |-| 41 | PA8 | bidirectional | General-purpose I/O (5V tolerant); AF I2C3_SCL, USART1_CK, TIM1_CH1, OTG_FS_SOF, MCO_1 clock output. |-| 42 | PA9 | bidirectional | General-purpose I/O (5V tolerant); AF I2C3_SMBA, USART1_TX, TIM1_CH2; additional function OTG_FS_VBUS sense. |-| 43 | PA10 | bidirectional | General-purpose I/O (5V tolerant); AF USART1_RX, TIM1_CH3, OTG_FS_ID. |-| 44 | PA11 | bidirectional | General-purpose I/O (5V tolerant); AF USART1_CTS, USART6_TX, TIM1_CH4, OTG_FS_DM (USB D−). |-| 45 | PA12 | bidirectional | General-purpose I/O (5V tolerant); AF USART1_RTS, USART6_RX, TIM1_ETR, OTG_FS_DP (USB D+). |-| 46 | PA13 (JTMS-SWDIO) | bidirectional | General-purpose I/O PA13 (5V tolerant); default after reset is JTMS / SWDIO (SW-DP/JTAG data). Also EVENTOUT. |-| 47 | VSS | power_in | Digital ground. |-| 48 | VDD | power_in | Digital core/IO supply, 1.7 V to 3.6 V. |-| 49 | PA14 (JTCK-SWCLK) | bidirectional | General-purpose I/O PA14 (5V tolerant); default after reset is JTCK / SWCLK (SW-DP/JTAG clock). |-| 50 | PA15 (JTDI) | bidirectional | General-purpose I/O PA15 (5V tolerant); default after reset is JTDI (JTAG data input). AF SPI1_NSS, SPI3_NSS/I2S3_WS, TIM2_CH1/TIM2_ETR. |-| 51 | PC10 | bidirectional | General-purpose I/O (5V tolerant); AF SPI3_SCK/I2S3_CK, SDIO_D2. |-| 52 | PC11 | bidirectional | General-purpose I/O (5V tolerant); AF I2S3ext_SD, SPI3_MISO, SDIO_D3. |-| 53 | PC12 | bidirectional | General-purpose I/O (5V tolerant); AF SPI3_MOSI/I2S3_SD, SDIO_CK. |-| 54 | PD2 | bidirectional | General-purpose I/O (5V tolerant); AF TIM3_ETR, SDIO_CMD. |-| 55 | PB3 (JTDO-SWO) | bidirectional | General-purpose I/O PB3 (5V tolerant); default after reset is JTDO / SWO trace output. AF SPI1_SCK, SPI3_SCK/I2S3_CK, I2C2_SDA, TIM2_CH2. |-| 56 | PB4 (NJTRST) | bidirectional | General-purpose I/O PB4 (5V tolerant); default after reset is NJTRST (JTAG reset). AF SPI1_MISO, SPI3_MISO, I2S3ext_SD, I2C3_SDA, TIM3_CH1. |-| 57 | PB5 | bidirectional | General-purpose I/O (5V tolerant); AF SPI1_MOSI, SPI3_MOSI/I2S3_SD, I2C1_SMBA, TIM3_CH2. |-| 58 | PB6 | bidirectional | General-purpose I/O (5V tolerant); AF I2C1_SCL, USART1_TX, TIM4_CH1. |-| 59 | PB7 | bidirectional | General-purpose I/O (5V tolerant); AF I2C1_SDA, USART1_RX, TIM4_CH2. |-| 60 | BOOT0 | input | Dedicated boot-mode selection pin (5V tolerant), latched at reset with BOOT1 (PB2) to choose main flash, system memory, or SRAM boot. Also VPP for flash programming in production. |-| 61 | PB8 | bidirectional | General-purpose I/O (5V tolerant); AF I2C1_SCL, TIM4_CH3, TIM10_CH1, SDIO_D4. |-| 62 | PB9 | bidirectional | General-purpose I/O (5V tolerant); AF SPI2_NSS/I2S2_WS, I2C1_SDA, TIM4_CH4, TIM11_CH1, SDIO_D5. |-| 63 | VSS | power_in | Digital ground. |-| 64 | VDD | power_in | Digital core/IO supply, 1.7 V to 3.6 V. |+| 1 | VBAT | power_in | Backup domain supply, 1.65 V to 3.6 V. Powers the RTC, LSE oscillator and backup registers when VDD is off. |+| 2 | PC13 | bidirectional | GPIO Port C bit 13. Supplied through the power switch (limited drive: ≤2 MHz, ≤30 pF, no LED). Additional functions: RTC_TAMP1, RTC_OUT, RTC_TS. Alternate: EVENTOUT. |+| 3 | PC14-OSC32_IN | bidirectional | GPIO PC14 / LSE 32.768 kHz oscillator input. Backup-domain I/O supplied through the power switch (limited drive). FT except in analog/oscillator mode. |+| 4 | PC15-OSC32_OUT | bidirectional | GPIO PC15 / LSE 32.768 kHz oscillator output. Backup-domain I/O supplied through the power switch (limited drive). FT except in analog/oscillator mode. |+| 5 | PH0-OSC_IN | bidirectional | GPIO PH0 / HSE 4-26 MHz main oscillator input. FT except in analog/oscillator mode. |+| 6 | PH1-OSC_OUT | bidirectional | GPIO PH1 / HSE main oscillator output. FT except in analog/oscillator mode. |+| 7 | NRST | bidirectional | Bidirectional device reset pin (active low) with embedded weak pull-up (~40 kΩ). Drive low to force a system reset; the MCU also drives it low internally during an internal reset event. |+| 8 | PC0 | bidirectional | GPIO Port C bit 0, 5 V tolerant. Additional analog function: ADC1_IN10. Alternate: EVENTOUT. |+| 9 | PC1 | bidirectional | GPIO Port C bit 1, 5 V tolerant. Additional analog function: ADC1_IN11. Alternate: EVENTOUT. |+| 10 | PC2 | bidirectional | GPIO Port C bit 2, 5 V tolerant. Additional analog function: ADC1_IN12. Alternates: SPI2_MISO, I2S2ext_SD, EVENTOUT. |+| 11 | PC3 | bidirectional | GPIO Port C bit 3, 5 V tolerant. Additional analog function: ADC1_IN13. Alternates: SPI2_MOSI/I2S2_SD, EVENTOUT. |+| 12 | VSSA/VREF- | power_in | Analog ground and negative ADC reference (tied together in LQFP64). Connect to the board analog ground. |+| 13 | VDDA/VREF+ | power_in | Analog supply and positive ADC reference (tied together in LQFP64). 1.7 V (min) to 3.6 V; must be ≥ VDD when both are powered. |+| 14 | PA0 | bidirectional | GPIO Port A bit 0, 5 V tolerant. Additional functions: ADC1_IN0, WKUP. Alternates: USART2_CTS, TIM2_CH1/TIM2_ETR, TIM5_CH1, EVENTOUT. |+| 15 | PA1 | bidirectional | GPIO Port A bit 1, 5 V tolerant. Additional function: ADC1_IN1. Alternates: USART2_RTS, TIM2_CH2, TIM5_CH2, EVENTOUT. |+| 16 | PA2 | bidirectional | GPIO Port A bit 2, 5 V tolerant. Additional function: ADC1_IN2. Alternates: USART2_TX, TIM2_CH3, TIM5_CH3, TIM9_CH1, EVENTOUT. |+| 17 | PA3 | bidirectional | GPIO Port A bit 3, 5 V tolerant. Additional function: ADC1_IN3. Alternates: USART2_RX, TIM2_CH4, TIM5_CH4, TIM9_CH2, EVENTOUT. |+| 18 | VSS | power_in | Digital ground reference for VDD supply domain. |+| 19 | VDD | power_in | Digital supply, 1.7 V to 3.6 V. Decouple with 100 nF close to each VDD pin plus one bulk 4.7 µF. |+| 20 | PA4 | bidirectional | GPIO Port A bit 4, 5 V tolerant. Additional function: ADC1_IN4. Alternates: SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, EVENTOUT. |+| 21 | PA5 | bidirectional | GPIO Port A bit 5, 5 V tolerant. Additional function: ADC1_IN5. Alternates: SPI1_SCK, TIM2_CH1/TIM2_ETR, EVENTOUT. |+| 22 | PA6 | bidirectional | GPIO Port A bit 6, 5 V tolerant. Additional function: ADC1_IN6. Alternates: SPI1_MISO, TIM1_BKIN, TIM3_CH1, EVENTOUT. |+| 23 | PA7 | bidirectional | GPIO Port A bit 7, 5 V tolerant. Additional function: ADC1_IN7. Alternates: SPI1_MOSI, TIM1_CH1N, TIM3_CH2, EVENTOUT. |+| 24 | PC4 | bidirectional | GPIO Port C bit 4, 5 V tolerant. Additional function: ADC1_IN14. Alternate: EVENTOUT. |+| 25 | PC5 | bidirectional | GPIO Port C bit 5, 5 V tolerant. Additional function: ADC1_IN15. Alternate: EVENTOUT. |+| 26 | PB0 | bidirectional | GPIO Port B bit 0, 5 V tolerant. Additional function: ADC1_IN8. Alternates: TIM1_CH2N, TIM3_CH3, EVENTOUT. |+| 27 | PB1 | bidirectional | GPIO Port B bit 1, 5 V tolerant. Additional function: ADC1_IN9. Alternates: TIM1_CH3N, TIM3_CH4, EVENTOUT. |+| 28 | PB2 | bidirectional | GPIO Port B bit 2, 5 V tolerant. Additional function: BOOT1 (sampled at reset with BOOT0 to select boot memory). Alternate: EVENTOUT. |+| 29 | PB10 | bidirectional | GPIO Port B bit 10, 5 V tolerant. Alternates: SPI2_SCK/I2S2_CK, I2C2_SCL, TIM2_CH3, EVENTOUT. |+| 30 | VCAP1 | passive | Internal 1.2 V core-regulator decoupling. Connect a 2.2 µF (typical) low-ESR ceramic capacitor to VSS. Do NOT drive externally when the internal regulator is enabled. |+| 31 | VSS | power_in | Digital ground reference for VDD supply domain. |+| 32 | VDD | power_in | Digital supply, 1.7 V to 3.6 V. Decouple with 100 nF close to each VDD pin plus one bulk 4.7 µF. |+| 33 | PB12 | bidirectional | GPIO Port B bit 12, 5 V tolerant. Alternates: SPI2_NSS/I2S2_WS, I2C2_SMBA, TIM1_BKIN, EVENTOUT. |+| 34 | PB13 | bidirectional | GPIO Port B bit 13, 5 V tolerant. Alternates: SPI2_SCK/I2S2_CK, TIM1_CH1N, EVENTOUT. |+| 35 | PB14 | bidirectional | GPIO Port B bit 14, 5 V tolerant. Alternates: SPI2_MISO, I2S2ext_SD, TIM1_CH2N, EVENTOUT. |+| 36 | PB15 | bidirectional | GPIO Port B bit 15, 5 V tolerant. Additional function: RTC_REFIN. Alternates: SPI2_MOSI/I2S2_SD, TIM1_CH3N, EVENTOUT. |+| 37 | PC6 | bidirectional | GPIO Port C bit 6, 5 V tolerant. Alternates: I2S2_MCK, USART6_TX, TIM3_CH1, SDIO_D6, EVENTOUT. |+| 38 | PC7 | bidirectional | GPIO Port C bit 7, 5 V tolerant. Alternates: I2S3_MCK, USART6_RX, TIM3_CH2, SDIO_D7, EVENTOUT. |+| 39 | PC8 | bidirectional | GPIO Port C bit 8, 5 V tolerant. Alternates: USART6_CK, TIM3_CH3, SDIO_D0, EVENTOUT. |+| 40 | PC9 | bidirectional | GPIO Port C bit 9, 5 V tolerant. Alternates: I2S_CKIN, I2C3_SDA, TIM3_CH4, SDIO_D1, MCO_2, EVENTOUT. |+| 41 | PA8 | bidirectional | GPIO Port A bit 8, 5 V tolerant. Alternates: I2C3_SCL, USART1_CK, TIM1_CH1, OTG_FS_SOF, MCO_1, EVENTOUT. |+| 42 | PA9 | bidirectional | GPIO Port A bit 9, 5 V tolerant. Additional function: OTG_FS_VBUS. Alternates: I2C3_SMBA, USART1_TX, TIM1_CH2, EVENTOUT. |+| 43 | PA10 | bidirectional | GPIO Port A bit 10, 5 V tolerant. Alternates: USART1_RX, TIM1_CH3, OTG_FS_ID, EVENTOUT. |+| 44 | PA11 | bidirectional | GPIO Port A bit 11, 5 V tolerant. Alternates: USART1_CTS, USART6_TX, TIM1_CH4, OTG_FS_DM, EVENTOUT. |+| 45 | PA12 | bidirectional | GPIO Port A bit 12, 5 V tolerant. Alternates: USART1_RTS, USART6_RX, TIM1_ETR, OTG_FS_DP, EVENTOUT. |+| 46 | PA13 (JTMS-SWDIO) | bidirectional | GPIO PA13, default function JTMS-SWDIO after reset (SWD data / JTAG mode select). 5 V tolerant. Alternate: EVENTOUT. |+| 47 | VSS | power_in | Digital ground reference for VDD supply domain. |+| 48 | VDD | power_in | Digital supply, 1.7 V to 3.6 V. Decouple with 100 nF close to each VDD pin plus one bulk 4.7 µF. |+| 49 | PA14 (JTCK-SWCLK) | bidirectional | GPIO PA14, default function JTCK-SWCLK after reset (SWD/JTAG clock). 5 V tolerant. Alternate: EVENTOUT. |+| 50 | PA15 (JTDI) | bidirectional | GPIO PA15, default function JTDI after reset (JTAG data in). 5 V tolerant. Alternates: SPI1_NSS, SPI3_NSS/I2S3_WS, TIM2_CH1/TIM2_ETR, EVENTOUT. |+| 51 | PC10 | bidirectional | GPIO Port C bit 10, 5 V tolerant. Alternates: SPI3_SCK/I2S3_CK, SDIO_D2, EVENTOUT. |+| 52 | PC11 | bidirectional | GPIO Port C bit 11, 5 V tolerant. Alternates: I2S3ext_SD, SPI3_MISO, SDIO_D3, EVENTOUT. |+| 53 | PC12 | bidirectional | GPIO Port C bit 12, 5 V tolerant. Alternates: SPI3_MOSI/I2S3_SD, SDIO_CK, EVENTOUT. |+| 54 | PD2 | bidirectional | GPIO Port D bit 2, 5 V tolerant. Alternates: TIM3_ETR, SDIO_CMD, EVENTOUT. |+| 55 | PB3 (JTDO-SWO) | bidirectional | GPIO PB3, default function JTDO/traceSWO after reset. 5 V tolerant. Alternates: SPI1_SCK, SPI3_SCK/I2S3_CK, I2C2_SDA, TIM2_CH2, EVENTOUT. |+| 56 | PB4 (NJTRST) | bidirectional | GPIO PB4, default function NJTRST after reset (JTAG reset, active low). 5 V tolerant. Alternates: SPI1_MISO, SPI3_MISO, I2S3ext_SD, I2C3_SDA, TIM3_CH1, EVENTOUT. |+| 57 | PB5 | bidirectional | GPIO Port B bit 5, 5 V tolerant. Alternates: SPI1_MOSI, SPI3_MOSI/I2S3_SD, I2C1_SMBA, TIM3_CH2, EVENTOUT. |+| 58 | PB6 | bidirectional | GPIO Port B bit 6, 5 V tolerant. Alternates: I2C1_SCL, USART1_TX, TIM4_CH1, EVENTOUT. |+| 59 | PB7 | bidirectional | GPIO Port B bit 7, 5 V tolerant. Alternates: I2C1_SDA, USART1_RX, TIM4_CH2, EVENTOUT. |+| 60 | BOOT0 | input | Dedicated boot-mode select input, sampled at reset. Combined with BOOT1 (PB2) it selects boot from main Flash (BOOT0=0), system memory bootloader (BOOT0=1,BOOT1=0), or embedded SRAM (BOOT0=1,BOOT1=1). Also serves as V_PP for factory programming. |+| 61 | PB8 | bidirectional | GPIO Port B bit 8, 5 V tolerant. Alternates: I2C1_SCL, TIM4_CH3, TIM10_CH1, SDIO_D4, EVENTOUT. |+| 62 | PB9 | bidirectional | GPIO Port B bit 9, 5 V tolerant. Alternates: SPI2_NSS/I2S2_WS, I2C1_SDA, TIM4_CH4, TIM11_CH1, SDIO_D5, EVENTOUT. |+| 63 | VSS | power_in | Digital ground reference for VDD supply domain. |+| 64 | VDD | power_in | Digital supply, 1.7 V to 3.6 V. Decouple with 100 nF close to each VDD pin plus one bulk 4.7 µF. |  ## Key specifications @@ -84,16 +84,16 @@ STM32F401RET6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descr  ## Ordering variants -- `STM32F401RET6CDU6`-- `STM32F401RET6CEU6`-- `STM32F401RET6CDY6`-- `STM32F401RET6CEY6`-- `STM32F401RET6RDT6`-- `STM32F401RET6RET6`-- `STM32F401RET6VDT6`-- `STM32F401RET6VET6`-- `STM32F401RET6VDH6`-- `STM32F401RET6VEH6`+- `STM32F401RET6STM32F401RDT6`+- `STM32F401RET6`+- `STM32F401RET6STM32F401CDY`+- `STM32F401RET6STM32F401CEY`+- `STM32F401RET6STM32F401CDU`+- `STM32F401RET6STM32F401CEU`+- `STM32F401RET6STM32F401VDT6`+- `STM32F401RET6STM32F401VET6`+- `STM32F401RET6STM32F401VDH6`+- `STM32F401RET6STM32F401VEH6`  ## CAD (KiCad official) 

@@ -32,385 +32,385 @@         "number": "1",         "name": "VBAT",         "type": "power_in",-        "description": "Backup battery supply for RTC, external clock 32 kHz oscillator, and backup registers when VDD is off (1.65 V to 3.6 V)."+        "description": "Backup domain supply, 1.65 V to 3.6 V. Powers the RTC, LSE oscillator and backup registers when VDD is off."       },       {         "number": "2",         "name": "PC13",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant), also RTC_TAMP1/RTC_TS/RTC_OUT and EVENTOUT. Powered from backup domain - limited output drive (2 MHz, 30 pF, no current-source loads)."+        "description": "GPIO Port C bit 13. Supplied through the power switch (limited drive: \u22642 MHz, \u226430 pF, no LED). Additional functions: RTC_TAMP1, RTC_OUT, RTC_TS. Alternate: EVENTOUT."       },       {         "number": "3",         "name": "PC14-OSC32_IN",         "type": "bidirectional",-        "description": "General-purpose I/O PC14 (5V tolerant) doubling as the 32.768 kHz LSE oscillator input OSC32_IN. Not 5 V tolerant in analog/oscillator mode."+        "description": "GPIO PC14 / LSE 32.768 kHz oscillator input. Backup-domain I/O supplied through the power switch (limited drive). FT except in analog/oscillator mode."       },       {         "number": "4",         "name": "PC15-OSC32_OUT",         "type": "bidirectional",-        "description": "General-purpose I/O PC15 (5V tolerant) doubling as the 32.768 kHz LSE oscillator output OSC32_OUT. Not 5 V tolerant in analog/oscillator mode."+        "description": "GPIO PC15 / LSE 32.768 kHz oscillator output. Backup-domain I/O supplied through the power switch (limited drive). FT except in analog/oscillator mode."       },       {         "number": "5",         "name": "PH0-OSC_IN",         "type": "bidirectional",-        "description": "General-purpose I/O PH0 or high-speed external HSE crystal oscillator input OSC_IN (typically 4-26 MHz). Not 5 V tolerant when in oscillator mode."+        "description": "GPIO PH0 / HSE 4-26 MHz main oscillator input. FT except in analog/oscillator mode."       },       {         "number": "6",         "name": "PH1-OSC_OUT",         "type": "bidirectional",-        "description": "General-purpose I/O PH1 or high-speed external HSE crystal oscillator output OSC_OUT. Not 5 V tolerant when in oscillator mode."+        "description": "GPIO PH1 / HSE main oscillator output. FT except in analog/oscillator mode."       },       {         "number": "7",         "name": "NRST",         "type": "bidirectional",-        "description": "Bidirectional active-low system reset with embedded weak pull-up resistor (~40 kΩ). Drive low >20 µs to reset the MCU."+        "description": "Bidirectional device reset pin (active low) with embedded weak pull-up (~40 k\u03a9). Drive low to force a system reset; the MCU also drives it low internally during an internal reset event."       },       {         "number": "8",         "name": "PC0",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); additional function ADC1_IN10 (12-bit ADC channel 10)."+        "description": "GPIO Port C bit 0, 5 V tolerant. Additional analog function: ADC1_IN10. Alternate: EVENTOUT."       },       {         "number": "9",         "name": "PC1",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); additional function ADC1_IN11."+        "description": "GPIO Port C bit 1, 5 V tolerant. Additional analog function: ADC1_IN11. Alternate: EVENTOUT."       },       {         "number": "10",         "name": "PC2",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF SPI2_MISO / I2S2ext_SD; additional function ADC1_IN12."+        "description": "GPIO Port C bit 2, 5 V tolerant. Additional analog function: ADC1_IN12. Alternates: SPI2_MISO, I2S2ext_SD, EVENTOUT."       },       {         "number": "11",         "name": "PC3",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF SPI2_MOSI / I2S2_SD; additional function ADC1_IN13."+        "description": "GPIO Port C bit 3, 5 V tolerant. Additional analog function: ADC1_IN13. Alternates: SPI2_MOSI/I2S2_SD, EVENTOUT."       },       {         "number": "12",         "name": "VSSA/VREF-",         "type": "power_in",-        "description": "Analog ground and negative ADC/DAC reference (tied together on LQFP-64). Connect to the board analog ground plane."+        "description": "Analog ground and negative ADC reference (tied together in LQFP64). Connect to the board analog ground."       },       {         "number": "13",         "name": "VDDA/VREF+",         "type": "power_in",-        "description": "Analog supply and positive ADC/DAC reference (tied together on LQFP-64), 1.7 V to 3.6 V. Requires decoupling to VSSA."+        "description": "Analog supply and positive ADC reference (tied together in LQFP64). 1.7 V (min) to 3.6 V; must be \u2265 VDD when both are powered."       },       {         "number": "14",-        "name": "PA0-WKUP",+        "name": "PA0",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF USART2_CTS, TIM2_CH1/TIM2_ETR, TIM5_CH1, EVENTOUT; additional functions ADC1_IN0 and WKUP wake-up-from-standby input."+        "description": "GPIO Port A bit 0, 5 V tolerant. Additional functions: ADC1_IN0, WKUP. Alternates: USART2_CTS, TIM2_CH1/TIM2_ETR, TIM5_CH1, EVENTOUT."       },       {         "number": "15",         "name": "PA1",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF USART2_RTS, TIM2_CH2, TIM5_CH2; additional function ADC1_IN1."+        "description": "GPIO Port A bit 1, 5 V tolerant. Additional function: ADC1_IN1. Alternates: USART2_RTS, TIM2_CH2, TIM5_CH2, EVENTOUT."       },       {         "number": "16",         "name": "PA2",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF USART2_TX, TIM2_CH3, TIM5_CH3, TIM9_CH1; additional function ADC1_IN2."+        "description": "GPIO Port A bit 2, 5 V tolerant. Additional function: ADC1_IN2. Alternates: USART2_TX, TIM2_CH3, TIM5_CH3, TIM9_CH1, EVENTOUT."       },       {         "number": "17",         "name": "PA3",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF USART2_RX, TIM2_CH4, TIM5_CH4, TIM9_CH2; additional function ADC1_IN3."+        "description": "GPIO Port A bit 3, 5 V tolerant. Additional function: ADC1_IN3. Alternates: USART2_RX, TIM2_CH4, TIM5_CH4, TIM9_CH2, EVENTOUT."       },       {         "number": "18",         "name": "VSS",         "type": "power_in",-        "description": "Digital ground."+        "description": "Digital ground reference for VDD supply domain."       },       {         "number": "19",         "name": "VDD",         "type": "power_in",-        "description": "Digital core/IO supply, 1.7 V to 3.6 V. Requires local decoupling capacitors to VSS."+        "description": "Digital supply, 1.7 V to 3.6 V. Decouple with 100 nF close to each VDD pin plus one bulk 4.7 \u00b5F."       },       {         "number": "20",         "name": "PA4",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK; additional function ADC1_IN4."+        "description": "GPIO Port A bit 4, 5 V tolerant. Additional function: ADC1_IN4. Alternates: SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, EVENTOUT."       },       {         "number": "21",         "name": "PA5",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF SPI1_SCK, TIM2_CH1/TIM2_ETR; additional function ADC1_IN5."+        "description": "GPIO Port A bit 5, 5 V tolerant. Additional function: ADC1_IN5. Alternates: SPI1_SCK, TIM2_CH1/TIM2_ETR, EVENTOUT."       },       {         "number": "22",         "name": "PA6",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF SPI1_MISO, TIM1_BKIN, TIM3_CH1; additional function ADC1_IN6."+        "description": "GPIO Port A bit 6, 5 V tolerant. Additional function: ADC1_IN6. Alternates: SPI1_MISO, TIM1_BKIN, TIM3_CH1, EVENTOUT."       },       {         "number": "23",         "name": "PA7",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF SPI1_MOSI, TIM1_CH1N, TIM3_CH2; additional function ADC1_IN7."+        "description": "GPIO Port A bit 7, 5 V tolerant. Additional function: ADC1_IN7. Alternates: SPI1_MOSI, TIM1_CH1N, TIM3_CH2, EVENTOUT."       },       {         "number": "24",         "name": "PC4",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); additional function ADC1_IN14."+        "description": "GPIO Port C bit 4, 5 V tolerant. Additional function: ADC1_IN14. Alternate: EVENTOUT."       },       {         "number": "25",         "name": "PC5",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); additional function ADC1_IN15."+        "description": "GPIO Port C bit 5, 5 V tolerant. Additional function: ADC1_IN15. Alternate: EVENTOUT."       },       {         "number": "26",         "name": "PB0",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF TIM1_CH2N, TIM3_CH3; additional function ADC1_IN8."+        "description": "GPIO Port B bit 0, 5 V tolerant. Additional function: ADC1_IN8. Alternates: TIM1_CH2N, TIM3_CH3, EVENTOUT."       },       {         "number": "27",         "name": "PB1",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF TIM1_CH3N, TIM3_CH4; additional function ADC1_IN9."+        "description": "GPIO Port B bit 1, 5 V tolerant. Additional function: ADC1_IN9. Alternates: TIM1_CH3N, TIM3_CH4, EVENTOUT."       },       {         "number": "28",-        "name": "PB2-BOOT1",+        "name": "PB2",         "type": "bidirectional",-        "description": "General-purpose I/O PB2 (5V tolerant), also latched at reset as BOOT1 to select the boot memory in combination with BOOT0."+        "description": "GPIO Port B bit 2, 5 V tolerant. Additional function: BOOT1 (sampled at reset with BOOT0 to select boot memory). Alternate: EVENTOUT."       },       {         "number": "29",         "name": "PB10",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF SPI2_SCK/I2S2_CK, I2C2_SCL, TIM2_CH3."+        "description": "GPIO Port B bit 10, 5 V tolerant. Alternates: SPI2_SCK/I2S2_CK, I2C2_SCL, TIM2_CH3, EVENTOUT."       },       {         "number": "30",         "name": "VCAP1",         "type": "passive",-        "description": "Internal 1.2 V core regulator decoupling. Requires a low-ESR ~2.2 µF ceramic capacitor to VSS."+        "description": "Internal 1.2 V core-regulator decoupling. Connect a 2.2 \u00b5F (typical) low-ESR ceramic capacitor to VSS. Do NOT drive externally when the internal regulator is enabled."       },       {         "number": "31",         "name": "VSS",         "type": "power_in",-        "description": "Digital ground."+        "description": "Digital ground reference for VDD supply domain."       },       {         "number": "32",         "name": "VDD",         "type": "power_in",-        "description": "Digital core/IO supply, 1.7 V to 3.6 V."+        "description": "Digital supply, 1.7 V to 3.6 V. Decouple with 100 nF close to each VDD pin plus one bulk 4.7 \u00b5F."       },       {         "number": "33",         "name": "PB12",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF SPI2_NSS/I2S2_WS, I2C2_SMBA, TIM1_BKIN."+        "description": "GPIO Port B bit 12, 5 V tolerant. Alternates: SPI2_NSS/I2S2_WS, I2C2_SMBA, TIM1_BKIN, EVENTOUT."       },       {         "number": "34",         "name": "PB13",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF SPI2_SCK/I2S2_CK, TIM1_CH1N."+        "description": "GPIO Port B bit 13, 5 V tolerant. Alternates: SPI2_SCK/I2S2_CK, TIM1_CH1N, EVENTOUT."       },       {         "number": "35",         "name": "PB14",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF SPI2_MISO, I2S2ext_SD, TIM1_CH2N."+        "description": "GPIO Port B bit 14, 5 V tolerant. Alternates: SPI2_MISO, I2S2ext_SD, TIM1_CH2N, EVENTOUT."       },       {         "number": "36",         "name": "PB15",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF SPI2_MOSI/I2S2_SD, TIM1_CH3N; additional function RTC_REFIN."+        "description": "GPIO Port B bit 15, 5 V tolerant. Additional function: RTC_REFIN. Alternates: SPI2_MOSI/I2S2_SD, TIM1_CH3N, EVENTOUT."       },       {         "number": "37",         "name": "PC6",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF I2S2_MCK, USART6_TX, TIM3_CH1, SDIO_D6."+        "description": "GPIO Port C bit 6, 5 V tolerant. Alternates: I2S2_MCK, USART6_TX, TIM3_CH1, SDIO_D6, EVENTOUT."       },       {         "number": "38",         "name": "PC7",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF I2S3_MCK, USART6_RX, TIM3_CH2, SDIO_D7."+        "description": "GPIO Port C bit 7, 5 V tolerant. Alternates: I2S3_MCK, USART6_RX, TIM3_CH2, SDIO_D7, EVENTOUT."       },       {         "number": "39",         "name": "PC8",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF USART6_CK, TIM3_CH3, SDIO_D0."+        "description": "GPIO Port C bit 8, 5 V tolerant. Alternates: USART6_CK, TIM3_CH3, SDIO_D0, EVENTOUT."       },       {         "number": "40",         "name": "PC9",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF I2S_CKIN, I2C3_SDA, TIM3_CH4, SDIO_D1, MCO_2."+        "description": "GPIO Port C bit 9, 5 V tolerant. Alternates: I2S_CKIN, I2C3_SDA, TIM3_CH4, SDIO_D1, MCO_2, EVENTOUT."       },       {         "number": "41",         "name": "PA8",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF I2C3_SCL, USART1_CK, TIM1_CH1, OTG_FS_SOF, MCO_1 clock output."+        "description": "GPIO Port A bit 8, 5 V tolerant. Alternates: I2C3_SCL, USART1_CK, TIM1_CH1, OTG_FS_SOF, MCO_1, EVENTOUT."       },       {         "number": "42",         "name": "PA9",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF I2C3_SMBA, USART1_TX, TIM1_CH2; additional function OTG_FS_VBUS sense."+        "description": "GPIO Port A bit 9, 5 V tolerant. Additional function: OTG_FS_VBUS. Alternates: I2C3_SMBA, USART1_TX, TIM1_CH2, EVENTOUT."       },       {         "number": "43",         "name": "PA10",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF USART1_RX, TIM1_CH3, OTG_FS_ID."+        "description": "GPIO Port A bit 10, 5 V tolerant. Alternates: USART1_RX, TIM1_CH3, OTG_FS_ID, EVENTOUT."       },       {         "number": "44",         "name": "PA11",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF USART1_CTS, USART6_TX, TIM1_CH4, OTG_FS_DM (USB D−)."+        "description": "GPIO Port A bit 11, 5 V tolerant. Alternates: USART1_CTS, USART6_TX, TIM1_CH4, OTG_FS_DM, EVENTOUT."       },       {         "number": "45",         "name": "PA12",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF USART1_RTS, USART6_RX, TIM1_ETR, OTG_FS_DP (USB D+)."+        "description": "GPIO Port A bit 12, 5 V tolerant. Alternates: USART1_RTS, USART6_RX, TIM1_ETR, OTG_FS_DP, EVENTOUT."       },       {         "number": "46",         "name": "PA13 (JTMS-SWDIO)",         "type": "bidirectional",-        "description": "General-purpose I/O PA13 (5V tolerant); default after reset is JTMS / SWDIO (SW-DP/JTAG data). Also EVENTOUT."+        "description": "GPIO PA13, default function JTMS-SWDIO after reset (SWD data / JTAG mode select). 5 V tolerant. Alternate: EVENTOUT."       },       {         "number": "47",         "name": "VSS",         "type": "power_in",-        "description": "Digital ground."+        "description": "Digital ground reference for VDD supply domain."       },       {         "number": "48",         "name": "VDD",         "type": "power_in",-        "description": "Digital core/IO supply, 1.7 V to 3.6 V."+        "description": "Digital supply, 1.7 V to 3.6 V. Decouple with 100 nF close to each VDD pin plus one bulk 4.7 \u00b5F."       },       {         "number": "49",         "name": "PA14 (JTCK-SWCLK)",         "type": "bidirectional",-        "description": "General-purpose I/O PA14 (5V tolerant); default after reset is JTCK / SWCLK (SW-DP/JTAG clock)."+        "description": "GPIO PA14, default function JTCK-SWCLK after reset (SWD/JTAG clock). 5 V tolerant. Alternate: EVENTOUT."       },       {         "number": "50",         "name": "PA15 (JTDI)",         "type": "bidirectional",-        "description": "General-purpose I/O PA15 (5V tolerant); default after reset is JTDI (JTAG data input). AF SPI1_NSS, SPI3_NSS/I2S3_WS, TIM2_CH1/TIM2_ETR."+        "description": "GPIO PA15, default function JTDI after reset (JTAG data in). 5 V tolerant. Alternates: SPI1_NSS, SPI3_NSS/I2S3_WS, TIM2_CH1/TIM2_ETR, EVENTOUT."       },       {         "number": "51",         "name": "PC10",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF SPI3_SCK/I2S3_CK, SDIO_D2."+        "description": "GPIO Port C bit 10, 5 V tolerant. Alternates: SPI3_SCK/I2S3_CK, SDIO_D2, EVENTOUT."       },       {         "number": "52",         "name": "PC11",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF I2S3ext_SD, SPI3_MISO, SDIO_D3."+        "description": "GPIO Port C bit 11, 5 V tolerant. Alternates: I2S3ext_SD, SPI3_MISO, SDIO_D3, EVENTOUT."       },       {         "number": "53",         "name": "PC12",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF SPI3_MOSI/I2S3_SD, SDIO_CK."+        "description": "GPIO Port C bit 12, 5 V tolerant. Alternates: SPI3_MOSI/I2S3_SD, SDIO_CK, EVENTOUT."       },       {         "number": "54",         "name": "PD2",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF TIM3_ETR, SDIO_CMD."+        "description": "GPIO Port D bit 2, 5 V tolerant. Alternates: TIM3_ETR, SDIO_CMD, EVENTOUT."       },       {         "number": "55",         "name": "PB3 (JTDO-SWO)",         "type": "bidirectional",-        "description": "General-purpose I/O PB3 (5V tolerant); default after reset is JTDO / SWO trace output. AF SPI1_SCK, SPI3_SCK/I2S3_CK, I2C2_SDA, TIM2_CH2."+        "description": "GPIO PB3, default function JTDO/traceSWO after reset. 5 V tolerant. Alternates: SPI1_SCK, SPI3_SCK/I2S3_CK, I2C2_SDA, TIM2_CH2, EVENTOUT."       },       {         "number": "56",         "name": "PB4 (NJTRST)",         "type": "bidirectional",-        "description": "General-purpose I/O PB4 (5V tolerant); default after reset is NJTRST (JTAG reset). AF SPI1_MISO, SPI3_MISO, I2S3ext_SD, I2C3_SDA, TIM3_CH1."+        "description": "GPIO PB4, default function NJTRST after reset (JTAG reset, active low). 5 V tolerant. Alternates: SPI1_MISO, SPI3_MISO, I2S3ext_SD, I2C3_SDA, TIM3_CH1, EVENTOUT."       },       {         "number": "57",         "name": "PB5",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF SPI1_MOSI, SPI3_MOSI/I2S3_SD, I2C1_SMBA, TIM3_CH2."+        "description": "GPIO Port B bit 5, 5 V tolerant. Alternates: SPI1_MOSI, SPI3_MOSI/I2S3_SD, I2C1_SMBA, TIM3_CH2, EVENTOUT."       },       {         "number": "58",         "name": "PB6",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF I2C1_SCL, USART1_TX, TIM4_CH1."+        "description": "GPIO Port B bit 6, 5 V tolerant. Alternates: I2C1_SCL, USART1_TX, TIM4_CH1, EVENTOUT."       },       {         "number": "59",         "name": "PB7",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF I2C1_SDA, USART1_RX, TIM4_CH2."+        "description": "GPIO Port B bit 7, 5 V tolerant. Alternates: I2C1_SDA, USART1_RX, TIM4_CH2, EVENTOUT."       },       {         "number": "60",         "name": "BOOT0",         "type": "input",-        "description": "Dedicated boot-mode selection pin (5V tolerant), latched at reset with BOOT1 (PB2) to choose main flash, system memory, or SRAM boot. Also VPP for flash programming in production."+        "description": "Dedicated boot-mode select input, sampled at reset. Combined with BOOT1 (PB2) it selects boot from main Flash (BOOT0=0), system memory bootloader (BOOT0=1,BOOT1=0), or embedded SRAM (BOOT0=1,BOOT1=1). Also serves as V_PP for factory programming."       },       {         "number": "61",         "name": "PB8",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF I2C1_SCL, TIM4_CH3, TIM10_CH1, SDIO_D4."+        "description": "GPIO Port B bit 8, 5 V tolerant. Alternates: I2C1_SCL, TIM4_CH3, TIM10_CH1, SDIO_D4, EVENTOUT."       },       {         "number": "62",         "name": "PB9",         "type": "bidirectional",-        "description": "General-purpose I/O (5V tolerant); AF SPI2_NSS/I2S2_WS, I2C1_SDA, TIM4_CH4, TIM11_CH1, SDIO_D5."+        "description": "GPIO Port B bit 9, 5 V tolerant. Alternates: SPI2_NSS/I2S2_WS, I2C1_SDA, TIM4_CH4, TIM11_CH1, SDIO_D5, EVENTOUT."       },       {         "number": "63",         "name": "VSS",         "type": "power_in",-        "description": "Digital ground."+        "description": "Digital ground reference for VDD supply domain."       },       {         "number": "64",         "name": "VDD",         "type": "power_in",-        "description": "Digital core/IO supply, 1.7 V to 3.6 V."+        "description": "Digital supply, 1.7 V to 3.6 V. Decouple with 100 nF close to each VDD pin plus one bulk 4.7 \u00b5F."       }     ],     "provenance": {@@ -474,8 +474,5 @@     "docs/stm32f401ret6-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": {-    "public": true-  }+  ] }\ No newline at end of file