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STM32F373VBT7
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+136@@ -0,0 +1,136 @@+# STM32F373VBT7++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)++STM32F373VBT7 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PE2 | bidirectional | 5 V tolerant FT I/O; alternate functions TSC_G7_IO1 and TRACECLK. |+| 2 | PE3 | bidirectional | 5 V tolerant FT I/O; alternate functions TSC_G7_IO2 and TRACED0. |+| 3 | PE4 | bidirectional | 5 V tolerant FT I/O; alternate functions TSC_G7_IO3 and TRACED1. |+| 4 | PE5 | bidirectional | 5 V tolerant FT I/O; alternate functions TSC_G7_IO4 and TRACED2. |+| 5 | PE6 | bidirectional | 5 V tolerant FT I/O; alternate function TRACED3, additional functions WKUP3 and RTC_TAMPER3. |+| 6 | VBAT | power_in | Backup power supply for the RTC and backup registers. |+| 7 | PC13 | bidirectional | Standard 3.3 V TC I/O supplied through the power switch, which sinks only 3 mA, so output use is limited to 2 MHz with 30 pF maximum load and it must not drive current sources such as LEDs. |+| 8 | PC14 (OSC32_IN) | bidirectional | Standard 3.3 V TC I/O supplied through the power switch (3 mA limit), with OSC32_IN low-speed oscillator function; output use is limited to 2 MHz with 30 pF and must not source current. |+| 9 | PC15 (OSC32_OUT) | bidirectional | Standard 3.3 V TC I/O supplied through the power switch (3 mA limit), with OSC32_OUT low-speed oscillator function; output use is limited to 2 MHz with 30 pF and must not source current. |+| 10 | PF9 | bidirectional | 5 V tolerant FT I/O; alternate functions TIM14_CH1. |+| 11 | PF10 | bidirectional | 5 V tolerant FT I/O with no alternate function listed for this pin. |+| 12 | PF0 (OSC_IN) | bidirectional | 5 V tolerant FTf I/O (FM+ capable); alternate function I2C2_SDA, additional function OSC_IN. |+| 13 | PF1 (OSC_OUT) | bidirectional | 5 V tolerant FTf I/O (FM+ capable); alternate function I2C2_SCL, additional function OSC_OUT. |+| 14 | NRST | bidirectional | Device reset input / internal reset output, active low, with embedded weak pull-up. |+| 15 | PC0 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate function TIM5_CH1_ETR, additional function ADC_IN10. |+| 16 | PC1 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate function TIM5_CH2, additional function ADCIN11 (as printed in source). |+| 17 | PC2 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions SPI2_MISO/I2S2_MCK and TIM5_CH3, additional function ADC_IN12. |+| 18 | PC3 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions SPI2_MOSI/I2S2_SD and TIM5_CH4, additional function ADC_IN13. |+| 19 | PF2 | bidirectional | 5 V tolerant FT I/O; alternate function I2C2_SMBA. |+| 20 | VSSA/VREF- | power_in | Analog ground (VSSA/VREF-) for the ADC, COMP and DAC. |+| 21 | VDDA | power_in | Analog power supply. |+| 22 | VREF+ | power_in | Reference voltage for ADC, COMP and DAC. |+| 23 | PA0 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include USART2_CTS, TIM2_CH1_ETR, TIM5_CH1_ETR, TIM19_CH1, TSC_G1_IO1 and COMP1_OUT; additional functions RTC_TAMPER2, WKUP1, ADC_IN0 and COMP1_INM. |+| 24 | PA1 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include SPI3_SCK/I2S3_CK, USART2_RTS, TIM2_CH2, TIM15_CH1N, TIM5_CH2, TIM19_CH2 and TSC_G1_IO2; additional functions RTC_REFIN, ADC_IN1 and COMP1_INP. |+| 25 | PA2 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include COMP2_OUT, SPI3_MISO/I2S3_MCK, USART2_TX, TIM2_CH3, TIM15_CH1 and TSC_G1_IO3; additional functions ADC_IN2 and COMP2_INM. |+| 26 | PA3 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include SPI3_MOSI/I2S3_SD, USART2_RX, TIM2_CH4, TIM15_CH2 and TSC_G1_IO4; additional functions ADC_IN3 and COMP2_INP. |+| 27 | PF4 | bidirectional | 5 V tolerant FT I/O with no alternate function listed for this pin. |+| 28 | VDD_2 | power_in | Digital power supply. |+| 29 | PA4 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK, TIM3_CH2, TIM12_CH1 and TSC_G2_IO1; additional functions ADC_IN4 and DAC1_OUT1. |+| 30 | PA5 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include SPI1_SCK/I2S1_CK, CEC, TIM2_CH1_ETR, TIM14_CH1, TIM12_CH2 and TSC_G2_IO2; additional functions ADC_IN5 and DAC1_OUT2. |+| 31 | PA6 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include SPI1_MISO/I2S1_MCK, COMP1_OUT, TIM3_CH1, TIM13_CH1, TIM16_CH1 and TSC_G2_IO3; additional functions ADC_IN6 and DAC2_OUT1. |+| 32 | PA7 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TSC_G2_IO4, TIM14_CH1, SPI1_MOSI/I2S1_SD, TIM17_CH1, TIM3_CH2 and COMP2_OUT; additional function ADC_IN7. |+| 33 | PC4 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM13_CH1, TSC_G3_IO1 and USART1_TX; additional function ADC_IN14. |+| 34 | PC5 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TSC_G3_IO2 and USART1_RX; additional function ADC_IN15. |+| 35 | PB0 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include SPI1_MOSI/I2S1_SD, TIM3_CH3, TSC_G3_IO3 and TIM3_CH2; additional functions ADC_IN8 and SDADC1_AIN6P. |+| 36 | PB1 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM3_CH4 and TSC_G3_IO4; additional functions ADC_IN9, SDADC1_AIN5P and SDADC1_AIN6M. |+| 37 | PB2 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD12 with additional functions SDADC1_AIN4P and SDADC2_AIN6P. |+| 38 | PE7 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD12; additional functions SDADC1_AIN3P, SDADC1_AIN4M, SDADC2_AIN5P and SDADC2_AIN6M. |+| 39 | PE8 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD12; additional functions SDADC1_AIN8P and SDADC2_AIN8P. |+| 40 | PE9 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD12; additional functions SDADC1_AIN7P, SDADC1_AIN8M, SDADC2_AIN7P and SDADC2_AIN8M. |+| 41 | PE10 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD12; additional function SDADC1_AIN2P. |+| 42 | PE11 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD12; additional functions SDADC1_AIN1P, SDADC1_AIN2M and SDADC2_AIN4P. |+| 43 | PE12 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD12; additional functions SDADC1_AIN0P, SDADC2_AIN3P and SDADC2_AIN4M. |+| 44 | PE13 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD12; additional functions SDADC1_AIN0M and SDADC2_AIN2P. |+| 45 | PE14 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD12; additional functions SDADC2_AIN1P and SDADC2_AIN2M. |+| 46 | PE15 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD12; alternate function USART3_RX and additional function SDADC2_AIN0P. |+| 47 | PB10 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD12; alternate functions include SPI2_SCK/I2S2_CK, USART3_TX, CEC, TSC_SYNC and TIM2_CH3; additional function SDADC2_AIN0M. |+| 48 | VREFSD- | power_in | External reference voltage for SDADC1, SDADC2 and SDADC3 (negative input), also the negative SDADC analog input in single-ended mode. |+| 49 | VSSSD | power_in | Ground for SDADC1, SDADC2 and SDADC3. |+| 50 | VDDSD12 | power_in | Power supply for SDADC1 and SDADC2. |+| 51 | VDDSD3 | power_in | Power supply for SDADC3. |+| 52 | VREFSD+ | power_in | External reference voltage for SDADC1, SDADC2 and SDADC3 (positive input). |+| 53 | PB14 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD3; alternate functions include SPI2_MISO/I2S2_MCK, USART3_RTS, TIM15_CH1, TIM12_CH1 and TSC_G6_IO1; additional function SDADC3_AIN8P. |+| 54 | PB15 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD3; alternate functions include SPI2_MOSI/I2S2_SD, TIM15_CH1N, TIM15_CH2, TIM12_CH2, TSC_G6_IO2 and RTC_REFIN; additional functions SDADC3_AIN7P and SDADC3_AIN8M. |+| 55 | PD8 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD3; alternate functions include SPI2_SCK/I2S2_CK, USART3_TX and TSC_G6_IO3; additional function SDADC3_AIN6P. |+| 56 | PD9 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD3; alternate functions include USART3_RX and TSC_G6_IO4; additional functions SDADC3_AIN5P and SDADC3_AIN6M. |+| 57 | PD10 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD3; alternate function USART3_CK; additional function SDADC3_AIN4P. |+| 58 | PD11 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD3; alternate function USART3_CTS; additional functions SDADC3_AIN3P and SDADC3_AIN4M. |+| 59 | PD12 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD3; alternate functions USART3_RTS, TIM4_CH1 and TSC_G8_IO1; additional function SDADC3_AIN2P. |+| 60 | PD13 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD3; alternate functions TIM4_CH2 and TSC_G8_IO2; additional functions SDADC3_AIN1P and SDADC3_AIN2M. |+| 61 | PD14 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD3; alternate functions TIM4_CH3 and TSC_G8_IO3; additional function SDADC3_AIN0P. |+| 62 | PD15 | bidirectional | Standard 3.3 V TC I/O powered from VDDSD3; alternate functions TIM4_CH4 and TSC_G8_IO4; additional function SDADC3_AIN0M. |+| 63 | PC6 | bidirectional | 5 V tolerant FT I/O; alternate functions TIM3_CH1 and SPI1_NSS/I2S1_WS. |+| 64 | PC7 | bidirectional | 5 V tolerant FT I/O; alternate functions TIM3_CH2 and SPI1_SCK/I2S1_CK. |+| 65 | PC8 | bidirectional | 5 V tolerant FT I/O; alternate functions SPI1_MISO/I2S1_MCK and TIM3_CH3. |+| 66 | PC9 | bidirectional | 5 V tolerant FT I/O; alternate functions SPI1_MOSI/I2S1_SD and TIM3_CH4. |+| 67 | PA8 | bidirectional | 5 V tolerant FT I/O; alternate functions include MCO, SPI2_SCK/I2S2_CK, I2C2_SMBA, USART1_CK, TIM4_ETR and TIM5_CH1_ETR. |+| 68 | PA9 | bidirectional | 5 V tolerant FTf I/O (FM+ capable); alternate functions include SPI2_MISO/I2S2_MCK, I2C2_SCL, USART1_TX, TIM2_CH3, TIM15_BKIN, TIM13_CH1 and TSC_G4_IO1. |+| 69 | PA10 | bidirectional | 5 V tolerant FTf I/O (FM+ capable); alternate functions include SPI2_MOSI/I2S2_SD, I2C2_SDA, USART1_RX, TIM2_CH4, TIM17_BKIN, TIM14_CH1 and TSC_G4_IO2. |+| 70 | PA11 | bidirectional | 5 V tolerant FT I/O; alternate functions include SPI2_NSS/I2S2_WS, SPI1_NSS/I2S1_WS, USART1_CTS, CAN_RX, TIM4_CH1, USB_DM, TIM5_CH2 and COMP1_OUT. |+| 71 | PA12 | bidirectional | 5 V tolerant FT I/O; alternate functions include SPI1_SCK/I2S1_CK, USART1_RTS, CAN_TX, USB_DP, TIM16_CH1, TIM4_CH2, TIM5_CH3 and COMP2_OUT. |+| 72 | PA13 | bidirectional | 5 V tolerant FT I/O; alternate functions include SWDIO-JTMS, SPI1_MISO/I2S1_MCK, USART3_CTS, IR_OUT, TIM16_CH1N, TIM4_CH3, TIM5_CH4 and TSC_G4_IO3. |+| 73 | PF6 | bidirectional | 5 V tolerant FTf I/O (FM+ capable); alternate functions include SPI1_MOSI/I2S1_SD, USART3_RTS, TIM4_CH4 and I2C2_SCL. |+| 74 | VSS_3 | power_in | Ground. |+| 75 | VDD_3 | power_in | Digital power supply. |+| 76 | PA14 | bidirectional | 5 V tolerant FTf I/O (FM+ capable); alternate functions include I2C1_SDA, TIM12_CH1, TSC_G4_IO4 and SWCLK-JTCK. |+| 77 | PA15 | bidirectional | 5 V tolerant FTf I/O (FM+ capable); alternate functions include SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, I2C1_SCL, TIM2_CH1_ETR, TIM12_CH2, TSC_SYNC and JTDI. |+| 78 | PC10 | bidirectional | 5 V tolerant FT I/O; alternate functions include SPI3_SCK/I2S3_CK, USART3_TX and TIM19_CH1. |+| 79 | PC11 | bidirectional | 5 V tolerant FT I/O; alternate functions include SPI3_MISO/I2S3_MCK, USART3_RX and TIM19_CH2. |+| 80 | PC12 | bidirectional | 5 V tolerant FT I/O; alternate functions include SPI3_MOSI/I2S3_SD, USART3_CK and TIM19_CH3. |+| 81 | PD0 | bidirectional | 5 V tolerant FT I/O; alternate functions include CAN_RX and TIM19_CH4. |+| 82 | PD1 | bidirectional | 5 V tolerant FT I/O; alternate functions include CAN_TX and TIM19_ETR. |+| 83 | PD2 | bidirectional | 5 V tolerant FT I/O; alternate function TIM3_ETR. |+| 84 | PD3 | bidirectional | 5 V tolerant FT I/O; alternate functions include SPI2_MISO/I2S2_MCK and USART2_CTS. |+| 85 | PD4 | bidirectional | 5 V tolerant FT I/O; alternate functions include SPI2_MOSI/I2S2_SD and USART2_RTS. |+| 86 | PD5 | bidirectional | 5 V tolerant FT I/O; alternate function USART2_TX. |+| 87 | PD6 | bidirectional | 5 V tolerant FT I/O; alternate functions include SPI2_NSS/I2S2_WS and USART2_RX. |+| 88 | PD7 | bidirectional | 5 V tolerant FT I/O; alternate functions include SPI2_SCK/I2S2_CK and USART2_CK. |+| 89 | PB3 | bidirectional | 5 V tolerant FT I/O; alternate functions include JTDO-TRACESWO, SPI1_SCK/I2S1_CK, SPI3_SCK/I2S3_CK, USART2_TX, TIM2_CH2, TIM3_ETR, TIM4_ETR, TIM13_CH1 and TSC_G5_IO1. |+| 90 | PB4 | bidirectional | 5 V tolerant FT I/O; alternate functions include NJTRST, SPI1_MISO/I2S1_MCK, SPI3_MISO/I2S3_MCK, USART2_RX, TIM16_CH1, TIM3_CH1, TIM17_BKIN, TIM15_CH1N and TSC_G5_IO2. |+| 91 | PB5 | bidirectional | 5 V tolerant FT I/O; alternate functions include SPI1_MOSI/I2S1_SD, SPI3_MOSI/I2S3_SD, I2C1_SMBAl (as printed), USART2_CK, TIM16_BKIN, TIM3_CH2, TIM17_CH1 and TIM19_ETR. |+| 92 | PB6 | bidirectional | 5 V tolerant FTf I/O (FM+ capable); alternate functions include I2C1_SCL, USART1_TX, TIM16_CH1N, TIM3_CH3, TIM4_CH1, TIM19_CH1, TIM15_CH1 and TSC_G5_IO3. |+| 93 | PB7 | bidirectional | 5 V tolerant FTf I/O (FM+ capable); alternate functions include I2C1_SDA, USART1_RX, TIM17_CH1N, TIM3_CH4, TIM4_CH2, TIM19_CH2, TIM15_CH2 and TSC_G5_IO4. |+| 94 | BOOT0 | input | Dedicated boot memory selection pin (BOOT0). |+| 95 | PB8 | bidirectional | 5 V tolerant FTf I/O (FM+ capable); alternate functions include SPI2_SCK/I2S2_CK, I2C1_SCL, USART3_TX, CAN_RX, CEC, TIM16_CH1, TIM4_CH3, TIM19_CH3, COMP1_OUT and TSC_SYNC. |+| 96 | PB9 | bidirectional | 5 V tolerant FTf I/O (FM+ capable); alternate functions include SPI2_NSS/I2S2_WS, I2C1_SDA, USART3_RX, CAN_TX, IR_OUT, TIM17_CH1, TIM4_CH4, TIM19_CH4 and COMP2_OUT. |+| 97 | PE0 | bidirectional | 5 V tolerant FT I/O; alternate functions include USART1_TX and TIM4_ETR. |+| 98 | PE1 | bidirectional | 5 V tolerant FT I/O; alternate function USART1_RX. |+| 99 | VSS_1 | power_in | Ground. |+| 100 | VDD_1 | power_in | Digital power supply. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-100(14x14) |+| Category | Embedded Processors & Controllers |+| Pins | 100 |++## CAD (KiCad official)++- Symbol: `STM32F373VBT7`+- Footprint: `Package_QFP:LQFP-100_14x14mm_P0.5mm`+- 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)+- 3D model files: `stm32f373vbt7-etched.step` / `stm32f373vbt7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f373vbt7.step` / `stm32f373vbt7.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588893260206493696) (137 pp, sha256 `fd00ebf096b21764`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32f373vbt7-datasheet.pdf)
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alternate functions TSC_G7_IO1 and TRACECLK."+ },+ {+ "number": "2",+ "name": "PE3",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions TSC_G7_IO2 and TRACED0."+ },+ {+ "number": "3",+ "name": "PE4",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions TSC_G7_IO3 and TRACED1."+ },+ {+ "number": "4",+ "name": "PE5",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions TSC_G7_IO4 and TRACED2."+ },+ {+ "number": "5",+ "name": "PE6",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate function TRACED3, additional functions WKUP3 and RTC_TAMPER3."+ },+ {+ "number": "6",+ "name": "VBAT",+ "type": "power_in",+ "description": "Backup power supply for the RTC and backup registers."+ },+ {+ "number": "7",+ "name": "PC13",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O supplied through the power switch, which sinks only 3 mA, so output use is limited to 2 MHz with 30 pF maximum load and it must not drive current sources such as LEDs."+ },+ {+ "number": "8",+ "name": "PC14 (OSC32_IN)",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O supplied through the power switch (3 mA limit), with OSC32_IN low-speed oscillator function; output use is limited to 2 MHz with 30 pF and must not source current."+ },+ {+ "number": "9",+ "name": "PC15 (OSC32_OUT)",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O supplied through the power switch (3 mA limit), with OSC32_OUT low-speed oscillator function; output use is limited to 2 MHz with 30 pF and must not source current."+ },+ {+ "number": "10",+ "name": "PF9",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions TIM14_CH1."+ },+ {+ "number": "11",+ "name": "PF10",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O with no alternate function listed for this pin."+ },+ {+ "number": "12",+ "name": "PF0 (OSC_IN)",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (FM+ capable); alternate function I2C2_SDA, additional function OSC_IN."+ },+ {+ "number": "13",+ "name": "PF1 (OSC_OUT)",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (FM+ capable); alternate function I2C2_SCL, additional function OSC_OUT."+ },+ {+ "number": "14",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Device reset input / internal reset output, active low, with embedded weak pull-up."+ },+ {+ "number": "15",+ "name": "PC0",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate function TIM5_CH1_ETR, additional function ADC_IN10."+ },+ {+ "number": "16",+ "name": "PC1",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate function TIM5_CH2, additional function ADCIN11 (as printed in source)."+ },+ {+ "number": "17",+ "name": "PC2",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions SPI2_MISO/I2S2_MCK and TIM5_CH3, additional function ADC_IN12."+ },+ {+ "number": "18",+ "name": "PC3",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions SPI2_MOSI/I2S2_SD and TIM5_CH4, additional function ADC_IN13."+ },+ {+ "number": "19",+ "name": "PF2",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate function I2C2_SMBA."+ },+ {+ "number": "20",+ "name": "VSSA/VREF-",+ "type": "power_in",+ "description": "Analog ground (VSSA/VREF-) for the ADC, COMP and DAC."+ },+ {+ "number": "21",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog power supply."+ },+ {+ "number": "22",+ "name": "VREF+",+ "type": "power_in",+ "description": "Reference voltage for ADC, COMP and DAC."+ },+ {+ "number": "23",+ "name": "PA0",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include USART2_CTS, TIM2_CH1_ETR, TIM5_CH1_ETR, TIM19_CH1, TSC_G1_IO1 and COMP1_OUT; additional functions RTC_TAMPER2, WKUP1, ADC_IN0 and COMP1_INM."+ },+ {+ "number": "24",+ "name": "PA1",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include SPI3_SCK/I2S3_CK, USART2_RTS, TIM2_CH2, TIM15_CH1N, TIM5_CH2, TIM19_CH2 and TSC_G1_IO2; additional functions RTC_REFIN, ADC_IN1 and COMP1_INP."+ },+ {+ "number": "25",+ "name": "PA2",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include COMP2_OUT, SPI3_MISO/I2S3_MCK, USART2_TX, TIM2_CH3, TIM15_CH1 and TSC_G1_IO3; additional functions ADC_IN2 and COMP2_INM."+ },+ {+ "number": "26",+ "name": "PA3",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include SPI3_MOSI/I2S3_SD, USART2_RX, TIM2_CH4, TIM15_CH2 and TSC_G1_IO4; additional functions ADC_IN3 and COMP2_INP."+ },+ {+ "number": "27",+ "name": "PF4",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O with no alternate function listed for this pin."+ },+ {+ "number": "28",+ "name": "VDD_2",+ "type": "power_in",+ "description": "Digital power supply."+ },+ {+ "number": "29",+ "name": "PA4",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK, TIM3_CH2, TIM12_CH1 and TSC_G2_IO1; additional functions ADC_IN4 and DAC1_OUT1."+ },+ {+ "number": "30",+ "name": "PA5",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include SPI1_SCK/I2S1_CK, CEC, TIM2_CH1_ETR, TIM14_CH1, TIM12_CH2 and TSC_G2_IO2; additional functions ADC_IN5 and DAC1_OUT2."+ },+ {+ "number": "31",+ "name": "PA6",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include SPI1_MISO/I2S1_MCK, COMP1_OUT, TIM3_CH1, TIM13_CH1, TIM16_CH1 and TSC_G2_IO3; additional functions ADC_IN6 and DAC2_OUT1."+ },+ {+ "number": "32",+ "name": "PA7",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TSC_G2_IO4, TIM14_CH1, SPI1_MOSI/I2S1_SD, TIM17_CH1, TIM3_CH2 and COMP2_OUT; additional function ADC_IN7."+ },+ {+ "number": "33",+ "name": "PC4",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM13_CH1, TSC_G3_IO1 and USART1_TX; additional function ADC_IN14."+ },+ {+ "number": "34",+ "name": "PC5",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TSC_G3_IO2 and USART1_RX; additional function ADC_IN15."+ },+ {+ "number": "35",+ "name": "PB0",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include SPI1_MOSI/I2S1_SD, TIM3_CH3, TSC_G3_IO3 and TIM3_CH2; additional functions ADC_IN8 and SDADC1_AIN6P."+ },+ {+ "number": "36",+ "name": "PB1",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM3_CH4 and TSC_G3_IO4; additional functions ADC_IN9, SDADC1_AIN5P and SDADC1_AIN6M."+ },+ {+ "number": "37",+ "name": "PB2",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD12 with additional functions SDADC1_AIN4P and SDADC2_AIN6P."+ },+ {+ "number": "38",+ "name": "PE7",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD12; additional functions SDADC1_AIN3P, SDADC1_AIN4M, SDADC2_AIN5P and SDADC2_AIN6M."+ },+ {+ "number": "39",+ "name": "PE8",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD12; additional functions SDADC1_AIN8P and SDADC2_AIN8P."+ },+ {+ "number": "40",+ "name": "PE9",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD12; additional functions SDADC1_AIN7P, SDADC1_AIN8M, SDADC2_AIN7P and SDADC2_AIN8M."+ },+ {+ "number": "41",+ "name": "PE10",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD12; additional function SDADC1_AIN2P."+ },+ {+ "number": "42",+ "name": "PE11",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD12; additional functions SDADC1_AIN1P, SDADC1_AIN2M and SDADC2_AIN4P."+ },+ {+ "number": "43",+ "name": "PE12",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD12; additional functions SDADC1_AIN0P, SDADC2_AIN3P and SDADC2_AIN4M."+ },+ {+ "number": "44",+ "name": "PE13",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD12; additional functions SDADC1_AIN0M and SDADC2_AIN2P."+ },+ {+ "number": "45",+ "name": "PE14",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD12; additional functions SDADC2_AIN1P and SDADC2_AIN2M."+ },+ {+ "number": "46",+ "name": "PE15",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD12; alternate function USART3_RX and additional function SDADC2_AIN0P."+ },+ {+ "number": "47",+ "name": "PB10",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD12; alternate functions include SPI2_SCK/I2S2_CK, USART3_TX, CEC, TSC_SYNC and TIM2_CH3; additional function SDADC2_AIN0M."+ },+ {+ "number": "48",+ "name": "VREFSD-",+ "type": "power_in",+ "description": "External reference voltage for SDADC1, SDADC2 and SDADC3 (negative input), also the negative SDADC analog input in single-ended mode."+ },+ {+ "number": "49",+ "name": "VSSSD",+ "type": "power_in",+ "description": "Ground for SDADC1, SDADC2 and SDADC3."+ },+ {+ "number": "50",+ "name": "VDDSD12",+ "type": "power_in",+ "description": "Power supply for SDADC1 and SDADC2."+ },+ {+ "number": "51",+ "name": "VDDSD3",+ "type": "power_in",+ "description": "Power supply for SDADC3."+ },+ {+ "number": "52",+ "name": "VREFSD+",+ "type": "power_in",+ "description": "External reference voltage for SDADC1, SDADC2 and SDADC3 (positive input)."+ },+ {+ "number": "53",+ "name": "PB14",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD3; alternate functions include SPI2_MISO/I2S2_MCK, USART3_RTS, TIM15_CH1, TIM12_CH1 and TSC_G6_IO1; additional function SDADC3_AIN8P."+ },+ {+ "number": "54",+ "name": "PB15",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD3; alternate functions include SPI2_MOSI/I2S2_SD, TIM15_CH1N, TIM15_CH2, TIM12_CH2, TSC_G6_IO2 and RTC_REFIN; additional functions SDADC3_AIN7P and SDADC3_AIN8M."+ },+ {+ "number": "55",+ "name": "PD8",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD3; alternate functions include SPI2_SCK/I2S2_CK, USART3_TX and TSC_G6_IO3; additional function SDADC3_AIN6P."+ },+ {+ "number": "56",+ "name": "PD9",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD3; alternate functions include USART3_RX and TSC_G6_IO4; additional functions SDADC3_AIN5P and SDADC3_AIN6M."+ },+ {+ "number": "57",+ "name": "PD10",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD3; alternate function USART3_CK; additional function SDADC3_AIN4P."+ },+ {+ "number": "58",+ "name": "PD11",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD3; alternate function USART3_CTS; additional functions SDADC3_AIN3P and SDADC3_AIN4M."+ },+ {+ "number": "59",+ "name": "PD12",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD3; alternate functions USART3_RTS, TIM4_CH1 and TSC_G8_IO1; additional function SDADC3_AIN2P."+ },+ {+ "number": "60",+ "name": "PD13",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD3; alternate functions TIM4_CH2 and TSC_G8_IO2; additional functions SDADC3_AIN1P and SDADC3_AIN2M."+ },+ {+ "number": "61",+ "name": "PD14",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD3; alternate functions TIM4_CH3 and TSC_G8_IO3; additional function SDADC3_AIN0P."+ },+ {+ "number": "62",+ "name": "PD15",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O powered from VDDSD3; alternate functions TIM4_CH4 and TSC_G8_IO4; additional function SDADC3_AIN0M."+ },+ {+ "number": "63",+ "name": "PC6",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions TIM3_CH1 and SPI1_NSS/I2S1_WS."+ },+ {+ "number": "64",+ "name": "PC7",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions TIM3_CH2 and SPI1_SCK/I2S1_CK."+ },+ {+ "number": "65",+ "name": "PC8",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions SPI1_MISO/I2S1_MCK and TIM3_CH3."+ },+ {+ "number": "66",+ "name": "PC9",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions SPI1_MOSI/I2S1_SD and TIM3_CH4."+ },+ {+ "number": "67",+ "name": "PA8",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions include MCO, SPI2_SCK/I2S2_CK, I2C2_SMBA, USART1_CK, TIM4_ETR and TIM5_CH1_ETR."+ },+ {+ "number": "68",+ "name": "PA9",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (FM+ capable); alternate functions include SPI2_MISO/I2S2_MCK, I2C2_SCL, USART1_TX, TIM2_CH3, TIM15_BKIN, TIM13_CH1 and TSC_G4_IO1."+ },+ {+ "number": "69",+ "name": "PA10",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (FM+ capable); alternate functions include SPI2_MOSI/I2S2_SD, I2C2_SDA, USART1_RX, TIM2_CH4, TIM17_BKIN, TIM14_CH1 and TSC_G4_IO2."+ },+ {+ "number": "70",+ "name": "PA11",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions include SPI2_NSS/I2S2_WS, SPI1_NSS/I2S1_WS, USART1_CTS, CAN_RX, TIM4_CH1, USB_DM, TIM5_CH2 and COMP1_OUT."+ },+ {+ "number": "71",+ "name": "PA12",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions include SPI1_SCK/I2S1_CK, USART1_RTS, CAN_TX, USB_DP, TIM16_CH1, TIM4_CH2, TIM5_CH3 and COMP2_OUT."+ },+ {+ "number": "72",+ "name": "PA13",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions include SWDIO-JTMS, SPI1_MISO/I2S1_MCK, USART3_CTS, IR_OUT, TIM16_CH1N, TIM4_CH3, TIM5_CH4 and TSC_G4_IO3."+ },+ {+ "number": "73",+ "name": "PF6",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (FM+ capable); alternate functions include SPI1_MOSI/I2S1_SD, USART3_RTS, TIM4_CH4 and I2C2_SCL."+ },+ {+ "number": "74",+ "name": "VSS_3",+ "type": "power_in",+ "description": "Ground."+ },+ {+ "number": "75",+ "name": "VDD_3",+ "type": "power_in",+ "description": "Digital power supply."+ },+ {+ "number": "76",+ "name": "PA14",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (FM+ capable); alternate functions include I2C1_SDA, TIM12_CH1, TSC_G4_IO4 and SWCLK-JTCK."+ },+ {+ "number": "77",+ "name": "PA15",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (FM+ capable); alternate functions include SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, I2C1_SCL, TIM2_CH1_ETR, TIM12_CH2, TSC_SYNC and JTDI."+ },+ {+ "number": "78",+ "name": "PC10",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions include SPI3_SCK/I2S3_CK, USART3_TX and TIM19_CH1."+ },+ {+ "number": "79",+ "name": "PC11",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions include SPI3_MISO/I2S3_MCK, USART3_RX and TIM19_CH2."+ },+ {+ "number": "80",+ "name": "PC12",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions include SPI3_MOSI/I2S3_SD, USART3_CK and TIM19_CH3."+ },+ {+ "number": "81",+ "name": "PD0",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions include CAN_RX and TIM19_CH4."+ },+ {+ "number": "82",+ "name": "PD1",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions include CAN_TX and TIM19_ETR."+ },+ {+ "number": "83",+ "name": "PD2",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate function TIM3_ETR."+ },+ {+ "number": "84",+ "name": "PD3",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions include SPI2_MISO/I2S2_MCK and USART2_CTS."+ },+ {+ "number": "85",+ "name": "PD4",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions include SPI2_MOSI/I2S2_SD and USART2_RTS."+ },+ {+ "number": "86",+ "name": "PD5",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate function USART2_TX."+ },+ {+ "number": "87",+ "name": "PD6",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions include SPI2_NSS/I2S2_WS and USART2_RX."+ },+ {+ "number": "88",+ "name": "PD7",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions include SPI2_SCK/I2S2_CK and USART2_CK."+ },+ {+ "number": "89",+ "name": "PB3",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions include JTDO-TRACESWO, SPI1_SCK/I2S1_CK, SPI3_SCK/I2S3_CK, USART2_TX, TIM2_CH2, TIM3_ETR, TIM4_ETR, TIM13_CH1 and TSC_G5_IO1."+ },+ {+ "number": "90",+ "name": "PB4",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions include NJTRST, SPI1_MISO/I2S1_MCK, SPI3_MISO/I2S3_MCK, USART2_RX, TIM16_CH1, TIM3_CH1, TIM17_BKIN, TIM15_CH1N and TSC_G5_IO2."+ },+ {+ "number": "91",+ "name": "PB5",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions include SPI1_MOSI/I2S1_SD, SPI3_MOSI/I2S3_SD, I2C1_SMBAl (as printed), USART2_CK, TIM16_BKIN, TIM3_CH2, TIM17_CH1 and TIM19_ETR."+ },+ {+ "number": "92",+ "name": "PB6",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (FM+ capable); alternate functions include I2C1_SCL, USART1_TX, TIM16_CH1N, TIM3_CH3, TIM4_CH1, TIM19_CH1, TIM15_CH1 and TSC_G5_IO3."+ },+ {+ "number": "93",+ "name": "PB7",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (FM+ capable); alternate functions include I2C1_SDA, USART1_RX, TIM17_CH1N, TIM3_CH4, TIM4_CH2, TIM19_CH2, TIM15_CH2 and TSC_G5_IO4."+ },+ {+ "number": "94",+ "name": "BOOT0",+ "type": "input",+ "description": "Dedicated boot memory selection pin (BOOT0)."+ },+ {+ "number": "95",+ "name": "PB8",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (FM+ capable); alternate functions include SPI2_SCK/I2S2_CK, I2C1_SCL, USART3_TX, CAN_RX, CEC, TIM16_CH1, TIM4_CH3, TIM19_CH3, COMP1_OUT and TSC_SYNC."+ },+ {+ "number": "96",+ "name": "PB9",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (FM+ capable); alternate functions include SPI2_NSS/I2S2_WS, I2C1_SDA, USART3_RX, CAN_TX, IR_OUT, TIM17_CH1, TIM4_CH4, TIM19_CH4 and COMP2_OUT."+ },+ {+ "number": "97",+ "name": "PE0",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions include USART1_TX and TIM4_ETR."+ },+ {+ "number": "98",+ "name": "PE1",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate function USART1_RX."+ },+ {+ "number": "99",+ "name": "VSS_1",+ "type": "power_in",+ "description": "Ground."+ },+ {+ "number": "100",+ "name": "VDD_1",+ "type": "power_in",+ "description": "Digital power supply."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Table 11 gives pin types and I/O structures but no electrical limits per pin; pin descriptions are b; Pin type for NRST (source: RST, bidirectional reset with weak pull-up) mapped to bidirectional; BOOT; Source typos kept as printed: pin 16 'ADCIN11' (likely ADC_IN11) and pin 91 'I2C1_SMBAl' (likely I2C"+ ],+ "pages_sent": 57,+ "cost_usd": 0.3146,+ "at": "2026-10-08T20:41:47"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588893260206493696",+ "pages": 137,+ "sha256": "fd00ebf096b21764",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 100,+ "described": 100,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm32f373vbt7.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 16,+ 16,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "51720097260ffba41c3062f85f67623721102fa535901c47cb555a1f444feeb3",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm32f373vbt7-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 16,+ 16,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b8e1d4315e9eeee911727cbf096f5a5020d4c2e0662723c0763608f679b5fe24",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}