component
STM32F334K8T6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+68@@ -0,0 +1,68 @@+# STM32F334K8T6TR++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)++STM32F334K8T6TR from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD | power_in | Digital power supply pin; the VDD and VDDA operating range is 2.0 to 3.6 V. |+| 2 | PF0 / OSC_IN | bidirectional | 5 V-tolerant (FT) I/O that also serves as the external crystal oscillator input OSC_IN; alternate function TIM1_CH3N. |+| 3 | PF1 / OSC_OUT | bidirectional | 5 V-tolerant (FT) I/O that also serves as the external crystal oscillator output OSC_OUT. |+| 4 | NRST | bidirectional | Bi-directional active-low device reset input and internal reset output, with an embedded weak pull-up resistor. |+| 5 | VDDA/VREF+ | power_in | Analog power supply and positive reference voltage pin for the analog peripherals (ADC, DAC, comparators, OPAMP). |+| 6 | PA0 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM2_CH1/TIM2_ETR, TSC_G1_IO1, USART2_CTS and EVENTOUT, additional functions ADC1_IN1 and RTC_TAMP2/WKUP1. |+| 7 | PA1 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM2_CH2, TSC_G1_IO2, USART2_RTS_DE and TIM15_CH1N, additional functions ADC1_IN2 and RTC_REFIN. |+| 8 | PA2 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM2_CH3, TSC_G1_IO3, USART2_TX, COMP2_OUT and TIM15_CH1, additional functions ADC1_IN3 and COMP2_INM. |+| 9 | PA3 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM2_CH4, TSC_G1_IO4, USART2_RX and TIM15_CH2, additional function ADC1_IN4. |+| 10 | PA4 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC with reduced touch sensing sensitivity, so use as sampling capacitor I/O is recommended; alternate functions include TIM3_CH2, TSC_G2_IO1, SPI1_NSS and USART2_CK, additional functions ADC2_IN1, DAC1_OUT1 and COMP2/4/6_INM. |+| 11 | PA5 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC with reduced touch sensing sensitivity; alternate functions include TIM2_CH1/TIM2_ETR, TSC_G2_IO2 and SPI1_SCK, additional functions ADC2_IN2, DAC1_OUT2 and OPAMP2_VINM. |+| 12 | PA6 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM16_CH1, TIM3_CH1, TSC_G2_IO3, SPI1_MISO and TIM1_BKIN, additional functions ADC2_IN3, DAC2_OUT1, OPAMP2_DIG and OPAMP2_VOUT. |+| 13 | PA7 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM17_CH1, TIM3_CH2, TSC_G2_IO4, SPI1_MOSI and TIM1_CH1N, additional functions ADC2_IN4, COMP2_INP and OPAMP2_VINP. |+| 14 | PB0 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM3_CH3, TSC_G3_IO2 and TIM1_CH2N, additional functions ADC1_IN11, COMP4_INP and OPAMP2_VINP. |+| 15 | PB1 | bidirectional | 3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM3_CH4, TSC_G3_IO3, TIM1_CH3N, COMP4_OUT and HRTIM1_SCOUT, additional function ADC1_IN12. |+| 16 | VSS | power_in | Digital ground pin. |+| 17 | VDD | power_in | Digital power supply pin; the VDD and VDDA operating range is 2.0 to 3.6 V. |+| 18 | PA8 | bidirectional | 5 V-tolerant (FT) I/O; alternate functions include MCO, TIM1_CH1, USART1_CK and HRTIM1_CHA1. |+| 19 | PA9 | bidirectional | 5 V-tolerant (FT) I/O; alternate functions include TSC_G4_IO1, TIM1_CH2, USART1_TX, TIM15_BKIN, TIM2_CH3 and HRTIM1_CHA2. |+| 20 | PA10 | bidirectional | 5 V-tolerant (FT) I/O; alternate functions include TIM17_BKIN, TSC_G4_IO2, TIM1_CH3, USART1_RX, COMP6_OUT, TIM2_CH4 and HRTIM1_CHB1. |+| 21 | PA11 | bidirectional | 5 V-tolerant (FT) I/O; alternate functions include TIM1_CH1N, USART1_CTS, CAN_RX, TIM1_CH4, TIM1_BKIN2 and HRTIM1_CHB2. |+| 22 | PA12 | bidirectional | 5 V-tolerant (FT) I/O; alternate functions include TIM16_CH1, TIM1_CH2N, USART1_RTS_DE, COMP2_OUT, CAN_TX, TIM1_ETR and HRTIM1_FLT1. |+| 23 | PA13 | bidirectional | 5 V-tolerant (FT) I/O; the pin function after reset is JTMS/SWDAT, with alternate functions TIM16_CH1N, TSC_G4_IO3, IR_OUT and USART3_CTS. |+| 24 | PA14 | bidirectional | 5 V-tolerant, Fm+ capable (FTf) I/O; the pin function after reset is JTCK/SWCLK, with alternate functions TSC_G4_IO4, I2C1_SDA, TIM1_BKIN and USART2_TX. |+| 25 | PA15 | bidirectional | 5 V-tolerant, Fm+ capable (FTf) I/O; the pin function after reset is JTDI, with alternate functions TIM2_CH1/TIM2_ETR, TSC_SYNC, I2C1_SCL, SPI1_NSS, USART2_RX, TIM1_BKIN and HRTIM1_FLT2. |+| 26 | PB3 | bidirectional | 5 V-tolerant (FT) I/O; the pin function after reset is JTDO/TRACESWO, with alternate functions TIM2_CH2, TSC_G5_IO1, SPI1_SCK, USART2_TX, TIM3_ETR and HRTIM1_EEV9. |+| 27 | PB4 | bidirectional | 5 V-tolerant (FT) I/O; the pin function after reset is NJTRST, with alternate functions TIM16_CH1, TIM3_CH1, TSC_G5_IO2, SPI1_MISO, USART2_RX and TIM17_BKIN. |+| 28 | PB5 | bidirectional | 5 V-tolerant (FT) I/O; alternate functions include TIM16_BKIN, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, USART2_CK, TIM17_CH1 and HRTIM1_EEV6. |+| 29 | PB6 | bidirectional | 5 V-tolerant, Fm+ capable (FTf) I/O; alternate functions include TIM16_CH1N, TSC_G5_IO3, I2C1_SCL, USART1_TX, HRTIM1_SCIN and HRTIM1_EEV4. |+| 30 | PB7 | bidirectional | 5 V-tolerant, Fm+ capable (FTf) I/O; alternate functions include TIM17_CH1N, TSC_G5_IO4, I2C1_SDA, USART1_RX, TIM3_CH4 and HRTIM1_EEV3. |+| 31 | BOOT0 | input | Dedicated BOOT0 pin used for boot mode selection. |+| 32 | VSS | power_in | Digital ground pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-32(7x7) |+| Category | Embedded Processors & Controllers |+| Pins | 32 |++## CAD (KiCad official)++- Symbol: `STM32F334K8T6TR`+- Footprint: `Package_QFP:LQFP-32_7x7mm_P0.8mm`+- 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)+- 3D model files: `stm32f334k8t6tr-etched.step` / `stm32f334k8t6tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f334k8t6tr.step` / `stm32f334k8t6tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590379975020359680) (125 pp, sha256 `4727fd8b6c87c9e0`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32f334k8t6tr-datasheet.pdf)
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Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32f334k8t6tr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32f334k8t6tr.kicad_sym",+ "stm32f334k8t6tr.kicad_mod",+ "stm32f334k8t6tr.glb",+ "stm32f334k8t6tr.step",+ "stm32f334k8t6tr.lbr",+ "docs/hero.png",+ "docs/stm32f334k8t6tr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm32f334k8t6tr-hero.glb",+ "stm32f334k8t6tr-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM32F334K8T6TR",+ "manufacturer": "STMicroelectronics",+ "package": "LQFP-32(7x7)",+ "pin_count": 32,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590379975020359680",+ "parts": {+ "symbol": "stm32f334k8t6tr.kicad_sym",+ "footprint": "stm32f334k8t6tr.kicad_mod",+ "model_3d": "stm32f334k8t6tr-hero.glb",+ "model_3d_plain": "stm32f334k8t6tr.glb",+ "model_3d_step": "stm32f334k8t6tr-etched.step",+ "model_3d_step_plain": "stm32f334k8t6tr.step",+ "lbr": "stm32f334k8t6tr.lbr"+ },+ "distributor_links": {+ "lcsc": "C3220759",+ "digikey": "497-STM32F334K8T6TR-ND",+ "mouser": "511-STM32F334K8T6TR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T18:08:44Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-STM32F334K8T6TR-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32F334K8T6TR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital power supply pin; the VDD and VDDA operating range is 2.0 to 3.6 V."+ },+ {+ "number": "2",+ "name": "PF0 / OSC_IN",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O that also serves as the external crystal oscillator input OSC_IN; alternate function TIM1_CH3N."+ },+ {+ "number": "3",+ "name": "PF1 / OSC_OUT",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O that also serves as the external crystal oscillator output OSC_OUT."+ },+ {+ "number": "4",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Bi-directional active-low device reset input and internal reset output, with an embedded weak pull-up resistor."+ },+ {+ "number": "5",+ "name": "VDDA/VREF+",+ "type": "power_in",+ "description": "Analog power supply and positive reference voltage pin for the analog peripherals (ADC, DAC, comparators, OPAMP)."+ },+ {+ "number": "6",+ "name": "PA0",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM2_CH1/TIM2_ETR, TSC_G1_IO1, USART2_CTS and EVENTOUT, additional functions ADC1_IN1 and RTC_TAMP2/WKUP1."+ },+ {+ "number": "7",+ "name": "PA1",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM2_CH2, TSC_G1_IO2, USART2_RTS_DE and TIM15_CH1N, additional functions ADC1_IN2 and RTC_REFIN."+ },+ {+ "number": "8",+ "name": "PA2",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM2_CH3, TSC_G1_IO3, USART2_TX, COMP2_OUT and TIM15_CH1, additional functions ADC1_IN3 and COMP2_INM."+ },+ {+ "number": "9",+ "name": "PA3",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM2_CH4, TSC_G1_IO4, USART2_RX and TIM15_CH2, additional function ADC1_IN4."+ },+ {+ "number": "10",+ "name": "PA4",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC with reduced touch sensing sensitivity, so use as sampling capacitor I/O is recommended; alternate functions include TIM3_CH2, TSC_G2_IO1, SPI1_NSS and USART2_CK, additional functions ADC2_IN1, DAC1_OUT1 and COMP2/4/6_INM."+ },+ {+ "number": "11",+ "name": "PA5",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC with reduced touch sensing sensitivity; alternate functions include TIM2_CH1/TIM2_ETR, TSC_G2_IO2 and SPI1_SCK, additional functions ADC2_IN2, DAC1_OUT2 and OPAMP2_VINM."+ },+ {+ "number": "12",+ "name": "PA6",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM16_CH1, TIM3_CH1, TSC_G2_IO3, SPI1_MISO and TIM1_BKIN, additional functions ADC2_IN3, DAC2_OUT1, OPAMP2_DIG and OPAMP2_VOUT."+ },+ {+ "number": "13",+ "name": "PA7",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM17_CH1, TIM3_CH2, TSC_G2_IO4, SPI1_MOSI and TIM1_CH1N, additional functions ADC2_IN4, COMP2_INP and OPAMP2_VINP."+ },+ {+ "number": "14",+ "name": "PB0",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM3_CH3, TSC_G3_IO2 and TIM1_CH2N, additional functions ADC1_IN11, COMP4_INP and OPAMP2_VINP."+ },+ {+ "number": "15",+ "name": "PB1",+ "type": "bidirectional",+ "description": "3.3 V tolerant TTa I/O connected directly to the ADC; alternate functions include TIM3_CH4, TSC_G3_IO3, TIM1_CH3N, COMP4_OUT and HRTIM1_SCOUT, additional function ADC1_IN12."+ },+ {+ "number": "16",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground pin."+ },+ {+ "number": "17",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital power supply pin; the VDD and VDDA operating range is 2.0 to 3.6 V."+ },+ {+ "number": "18",+ "name": "PA8",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O; alternate functions include MCO, TIM1_CH1, USART1_CK and HRTIM1_CHA1."+ },+ {+ "number": "19",+ "name": "PA9",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O; alternate functions include TSC_G4_IO1, TIM1_CH2, USART1_TX, TIM15_BKIN, TIM2_CH3 and HRTIM1_CHA2."+ },+ {+ "number": "20",+ "name": "PA10",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O; alternate functions include TIM17_BKIN, TSC_G4_IO2, TIM1_CH3, USART1_RX, COMP6_OUT, TIM2_CH4 and HRTIM1_CHB1."+ },+ {+ "number": "21",+ "name": "PA11",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O; alternate functions include TIM1_CH1N, USART1_CTS, CAN_RX, TIM1_CH4, TIM1_BKIN2 and HRTIM1_CHB2."+ },+ {+ "number": "22",+ "name": "PA12",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O; alternate functions include TIM16_CH1, TIM1_CH2N, USART1_RTS_DE, COMP2_OUT, CAN_TX, TIM1_ETR and HRTIM1_FLT1."+ },+ {+ "number": "23",+ "name": "PA13",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O; the pin function after reset is JTMS/SWDAT, with alternate functions TIM16_CH1N, TSC_G4_IO3, IR_OUT and USART3_CTS."+ },+ {+ "number": "24",+ "name": "PA14",+ "type": "bidirectional",+ "description": "5 V-tolerant, Fm+ capable (FTf) I/O; the pin function after reset is JTCK/SWCLK, with alternate functions TSC_G4_IO4, I2C1_SDA, TIM1_BKIN and USART2_TX."+ },+ {+ "number": "25",+ "name": "PA15",+ "type": "bidirectional",+ "description": "5 V-tolerant, Fm+ capable (FTf) I/O; the pin function after reset is JTDI, with alternate functions TIM2_CH1/TIM2_ETR, TSC_SYNC, I2C1_SCL, SPI1_NSS, USART2_RX, TIM1_BKIN and HRTIM1_FLT2."+ },+ {+ "number": "26",+ "name": "PB3",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O; the pin function after reset is JTDO/TRACESWO, with alternate functions TIM2_CH2, TSC_G5_IO1, SPI1_SCK, USART2_TX, TIM3_ETR and HRTIM1_EEV9."+ },+ {+ "number": "27",+ "name": "PB4",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O; the pin function after reset is NJTRST, with alternate functions TIM16_CH1, TIM3_CH1, TSC_G5_IO2, SPI1_MISO, USART2_RX and TIM17_BKIN."+ },+ {+ "number": "28",+ "name": "PB5",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O; alternate functions include TIM16_BKIN, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, USART2_CK, TIM17_CH1 and HRTIM1_EEV6."+ },+ {+ "number": "29",+ "name": "PB6",+ "type": "bidirectional",+ "description": "5 V-tolerant, Fm+ capable (FTf) I/O; alternate functions include TIM16_CH1N, TSC_G5_IO3, I2C1_SCL, USART1_TX, HRTIM1_SCIN and HRTIM1_EEV4."+ },+ {+ "number": "30",+ "name": "PB7",+ "type": "bidirectional",+ "description": "5 V-tolerant, Fm+ capable (FTf) I/O; alternate functions include TIM17_CH1N, TSC_G5_IO4, I2C1_SDA, USART1_RX, TIM3_CH4 and HRTIM1_EEV3."+ },+ {+ "number": "31",+ "name": "BOOT0",+ "type": "input",+ "description": "Dedicated BOOT0 pin used for boot mode selection."+ },+ {+ "number": "32",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground pin."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Table 13 lists VSSA/VREF- as UFQFPN32 pin 6 and shows no LQFP32 pin (LQFP32 column is '-'), so it is; Table 13 lists the SWD/JTAG/NJTRST names as the pin function after reset; the primary I/O names are ; These pins are not bonded out on the LQFP32 package per Table 13 (LQFP32 column is '-') and are excl"+ ],+ "pages_sent": 48,+ "cost_usd": 0.2335,+ "at": "2026-10-08T18:08:23"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590379975020359680",+ "pages": 125,+ "sha256": "4727fd8b6c87c9e0",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 32,+ "described": 32,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm32f334k8t6tr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "be0e412f1c66fee70039b0e109e0cc7c823161dda97593718afa97569bc61ce3",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm32f334k8t6tr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f497e6c310f30e44a418a4592e46e2e0de44124ca075465d14c448fe4afc79ca",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}