STM32F334C8T6

@@ -0,0 +1,96 @@+# STM32F334C8T6++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)++STM32F334C8T6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VBAT | power_in | Backup power supply for RTC and backup registers. Typically tied to VDD or a coin-cell battery (1.65-3.6 V). |+| 2 | PC13 | bidirectional | GPIO PC13 (TC 3.3 V I/O). Supplied through the backup power switch (max 3 mA sink); additional functions RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2 and TIM1_CH1N alt. |+| 3 | PC14/OSC32_IN | bidirectional | GPIO PC14 or LSE 32.768 kHz crystal input (OSC32_IN). Reset default is GPIO; enabled as OSC32_IN via RCC/RTC config. |+| 4 | PC15/OSC32_OUT | bidirectional | GPIO PC15 or LSE 32.768 kHz crystal output (OSC32_OUT). Reset default GPIO; enabled as OSC32_OUT via RCC/RTC config. |+| 5 | PF0/OSC_IN | bidirectional | GPIO PF0 or HSE crystal/clock input (OSC_IN). Alt function TIM1_CH3N. |+| 6 | PF1/OSC_OUT | bidirectional | GPIO PF1 or HSE crystal output (OSC_OUT). |+| 7 | NRST | bidirectional | Bidirectional device reset input / internal reset output, active low. Includes weak internal pull-up (~40 kΩ). |+| 8 | VSSA/VREF- | power_in | Analog ground and negative ADC/DAC reference (LQFP48 combines VSSA and VREF-). |+| 9 | VDDA/VREF+ | power_in | Analog power supply and positive ADC/DAC reference (2.0-3.6 V; 2.4-3.6 V for DAC/op-amp). LQFP48 combines VDDA and VREF+. |+| 10 | PA0 | bidirectional | PA0 GPIO, TTa 3.3 V ADC-connected I/O. Alt: TIM2_CH1/TIM2_ETR, TSC_G1_IO1, USART2_CTS, EVENTOUT. Additional: ADC1_IN1 (fast), RTC_TAMP2/WKUP1. |+| 11 | PA1 | bidirectional | PA1 GPIO, TTa. Alt: TIM2_CH2, TSC_G1_IO2, USART2_RTS_DE, TIM15_CH1N, EVENTOUT. Additional: ADC1_IN2 (fast), RTC_REFIN. |+| 12 | PA2 | bidirectional | PA2 GPIO, TTa. Alt: TIM2_CH3, TSC_G1_IO3, USART2_TX, COMP2_OUT, TIM15_CH1, EVENTOUT. Additional: ADC1_IN3 (fast), COMP2_INM. |+| 13 | PA3 | bidirectional | PA3 GPIO, TTa. Alt: TIM2_CH4, TSC_G1_IO4, USART2_RX, TIM15_CH2, EVENTOUT. Additional: ADC1_IN4 (fast). |+| 14 | PA4 | bidirectional | PA4 GPIO, TTa. Alt: TIM3_CH2, TSC_G2_IO1, SPI1_NSS, USART2_CK, EVENTOUT. Additional: ADC2_IN1 (fast), DAC1_OUT1, COMP2/4/6_INM. |+| 15 | PA5 | bidirectional | PA5 GPIO, TTa. Alt: TIM2_CH1/ETR, TSC_G2_IO2, SPI1_SCK, EVENTOUT. Additional: ADC2_IN2 (fast), DAC1_OUT2, OPAMP2_VINM. |+| 16 | PA6 | bidirectional | PA6 GPIO, TTa. Alt: TIM16_CH1, TIM3_CH1, TSC_G2_IO3, SPI1_MISO, TIM1_BKIN, OPAMP2_DIG, EVENTOUT. Additional: ADC2_IN3 (fast), DAC2_OUT1, OPAMP2_VOUT. |+| 17 | PA7 | bidirectional | PA7 GPIO, TTa. Alt: TIM17_CH1, TIM3_CH2, TSC_G2_IO4, SPI1_MOSI, TIM1_CH1N, EVENTOUT. Additional: ADC2_IN4 (fast), COMP2_INP, OPAMP2_VINP. |+| 18 | PB0 | bidirectional | PB0 GPIO, TTa. Alt: TIM3_CH3, TSC_G3_IO2, TIM1_CH2N, EVENTOUT. Additional: ADC1_IN11, COMP4_INP, OPAMP2_VINP. |+| 19 | PB1 | bidirectional | PB1 GPIO, TTa. Alt: TIM3_CH4, TSC_G3_IO3, TIM1_CH3N, COMP4_OUT, HRTIM1_SCOUT, EVENTOUT. Additional: ADC1_IN12. |+| 20 | PB2 | bidirectional | PB2 GPIO, TTa. Alt: TSC_G3_IO4, HRTIM_SCIN, EVENTOUT. Additional: ADC2_IN12, COMP4_INM. |+| 21 | PB10 | bidirectional | PB10 GPIO, TT 3.3 V I/O. Alt: TIM2_CH3, TSC_SYNC, USART3_TX, HRTIM1_FLT3, EVENTOUT. |+| 22 | PB11 | bidirectional | PB11 GPIO, TTa. Alt: TIM2_CH4, TSC_G6_IO1, USART3_RX, HRTIM1_FLT4, EVENTOUT. Additional: COMP6_INP. |+| 23 | VSS | power_in | Digital ground. |+| 24 | VDD | power_in | Digital power supply, 2.0-3.6 V. |+| 25 | PB12 | bidirectional | PB12 GPIO, TTa. Alt: TSC_G6_IO2, TIM1_BKIN, USART3_CK, HRTIM1_CHC1, EVENTOUT. Additional: ADC2_IN13. |+| 26 | PB13 | bidirectional | PB13 GPIO, TTa. Alt: TSC_G6_IO3, TIM1_CH1N, USART3_CTS, HRTIM1_CHC2, EVENTOUT. Additional: ADC1_IN13. |+| 27 | PB14 | bidirectional | PB14 GPIO, TTa. Alt: TIM15_CH1, TSC_G6_IO4, TIM1_CH2N, USART3_RTS_DE, HRTIM1_CHD1, EVENTOUT. Additional: ADC2_IN14, OPAMP2_VINP. |+| 28 | PB15 | bidirectional | PB15 GPIO, TTa. Alt: TIM15_CH2/CH1N, TIM1_CH3N, HRTIM1_CHD2, EVENTOUT. Additional: ADC2_IN15, COMP6_INM, RTC_REFIN. |+| 29 | PA8 | bidirectional | PA8 GPIO, FT 5 V-tolerant. Alt: MCO, TIM1_CH1, USART1_CK, HRTIM1_CHA1, EVENTOUT. |+| 30 | PA9 | bidirectional | PA9 GPIO, FT 5 V-tolerant. Alt: TSC_G4_IO1, TIM1_CH2, USART1_TX, TIM15_BKIN, TIM2_CH3, HRTIM1_CHA2, EVENTOUT. |+| 31 | PA10 | bidirectional | PA10 GPIO, FT 5 V-tolerant. Alt: TIM17_BKIN, TSC_G4_IO2, TIM1_CH3, USART1_RX, COMP6_OUT, TIM2_CH4, HRTIM1_CHB1, EVENTOUT. |+| 32 | PA11 | bidirectional | PA11 GPIO, FT 5 V-tolerant. Alt: TIM1_CH1N, USART1_CTS, CAN_RX, TIM1_CH4, TIM1_BKIN2, HRTIM1_CHB2, EVENTOUT. |+| 33 | PA12 | bidirectional | PA12 GPIO, FT 5 V-tolerant. Alt: TIM16_CH1, TIM1_CH2N, USART1_RTS_DE, COMP2_OUT, CAN_TX, TIM1_ETR, HRTIM1_FLT1, EVENTOUT. |+| 34 | PA13 | bidirectional | PA13 GPIO / SWDIO. FT 5 V-tolerant. Reset default JTMS/SWDAT. Alt: TIM16_CH1N, TSC_G4_IO3, IR_OUT, USART3_CTS, EVENTOUT. |+| 35 | VSS | power_in | Digital ground. |+| 36 | VDD | power_in | Digital power supply, 2.0-3.6 V. |+| 37 | PA14 | bidirectional | PA14 GPIO / SWCLK. FTf 5 V-tolerant with I2C Fast-mode+ capability. Reset default JTCK/SWCLK. Alt: TSC_G4_IO4, I2C1_SDA, TIM1_BKIN, USART2_TX, EVENTOUT. |+| 38 | PA15 | bidirectional | PA15 GPIO, FTf 5 V-tolerant FM+ capable. Reset default JTDI. Alt: TIM2_CH1/ETR, TSC_SYNC, I2C1_SCL, SPI1_NSS, USART2_RX, TIM1_BKIN, HRTIM1_FLT2, EVENTOUT. |+| 39 | PB3 | bidirectional | PB3 GPIO, FT 5 V-tolerant. Reset default JTDO/TRACESWO. Alt: TIM2_CH2, TSC_G5_IO1, SPI1_SCK, USART2_TX, TIM3_ETR, HRTIM1_SCOUT, HRTIM1_EEV9, EVENTOUT. |+| 40 | PB4 | bidirectional | PB4 GPIO, FT 5 V-tolerant. Reset default NJTRST. Alt: TIM16_CH1, TIM3_CH1, TSC_G5_IO2, SPI1_MISO, USART2_RX, TIM17_BKIN, HRTIM1_EEV7, EVENTOUT. |+| 41 | PB5 | bidirectional | PB5 GPIO, FT 5 V-tolerant. Alt: TIM16_BKIN, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, USART2_CK, TIM17_CH1, HRTIM1_EEV6, EVENTOUT. |+| 42 | PB6 | bidirectional | PB6 GPIO, FTf 5 V-tolerant FM+ capable. Alt: TIM16_CH1N, TSC_G5_IO3, I2C1_SCL, USART1_TX, HRTIM1_SCIN, HRTIM1_EEV4, EVENTOUT. |+| 43 | PB7 | bidirectional | PB7 GPIO, FTf 5 V-tolerant FM+ capable. Alt: TIM17_CH1N, TSC_G5_IO4, I2C1_SDA, USART1_RX, TIM3_CH4, HRTIM1_EEV3, EVENTOUT. |+| 44 | BOOT0 | input | Dedicated BOOT0 pin. Selects boot memory at reset: 0 = main Flash, 1 = system memory or embedded SRAM (per BOOT1 bit). |+| 45 | PB8 | bidirectional | PB8 GPIO, FTf 5 V-tolerant FM+ capable. Alt: TIM16_CH1, TSC_SYNC, I2C1_SCL, USART3_RX, CAN_RX, TIM1_BKIN, HRTIM1_EEV8, EVENTOUT. |+| 46 | PB9 | bidirectional | PB9 GPIO, FTf 5 V-tolerant FM+ capable. Alt: TIM17_CH1, I2C1_SDA, IR_OUT, USART3_TX, COMP2_OUT, CAN_TX, HRTIM1_EEV5, EVENTOUT. |+| 47 | VSS | power_in | Digital ground. |+| 48 | VDD | power_in | Digital power supply, 2.0-3.6 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-48(7x7) |+| Category | MCU |+| Pins | 48 |++## Ordering variants++- `STM32F334C8T6K4T6`+- `STM32F334C8T6K6T6`+- `STM32F334C8T6K8T6`+- `STM32F334C8T6C4T6`+- `STM32F334C8T6C6T6`+- `STM32F334C8T6C8T6`+- `STM32F334C8T6R6T6`+- `STM32F334C8T6R8T6`+- `STM32F334C8T6C6Y6TR`+- `STM32F334C8T6C8Y6TR`++## CAD (KiCad official)++- Symbol: `STM32F334C8T6`+- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`+- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/stm32f334c8t6.pdf) (121 pp, sha256 `9718bda0be93fc93`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32f334c8t6-datasheet.pdf)