component
STM32F207VGT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
← Commit history
Publish 0.1.1
5 files changed
+331−236
README.md+28−16@@ -15,27 +15,27 @@ STM32F207VGT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | 5 | PE6 | bidirectional | Port E pin 6; 5V-tolerant general-purpose I/O with configurable input, output, or alternate functions (TRACED3, FSMC_A22, TIM9_CH2, DCMI_D7). | | 6 | VBAT | power_in | Backup power supply (1.8-3.6V) for real-time clock (RTC), backup SRAM, and 20 backup registers; remains powered during STOP and STANDBY modes. | | 7 | PC13 | bidirectional | Port C pin 13; 5V-tolerant general-purpose I/O through power switch; maximum output speed 2 MHz with 30 pF load; do not use as current source. |-| 8 | PC14 | bidirectional | Port C pin 14; 5V-tolerant in digital mode, configurable as 32 kHz oscillator input (OSC32_IN); maximum output speed 2 MHz with 30 pF load through power switch. |-| 9 | PC15 | bidirectional | Port C pin 15; 5V-tolerant in digital mode, configurable as 32 kHz oscillator output (OSC32_OUT); maximum output speed 2 MHz with 30 pF load through power switch. |+| 8 | PC14-OSC32_IN | bidirectional | Port C pin 14; 5V-tolerant in digital mode, configurable as 32 kHz oscillator input (OSC32_IN); maximum output speed 2 MHz with 30 pF load through power switch. |+| 9 | PC15-OSC32_OUT | bidirectional | Port C pin 15; 5V-tolerant in digital mode, configurable as 32 kHz oscillator output (OSC32_OUT); maximum output speed 2 MHz with 30 pF load through power switch. | | 10 | VSS | power_in | Ground (0V) reference for digital circuits. |-| 11 | VDD | power_out | Main power supply (1.8-3.6V) for digital core and I/O ports. |-| 12 | PH0 | bidirectional | Port H pin 0; 5V-tolerant in digital mode, configurable as main HSE oscillator input (4-26 MHz); 5V tolerance not applicable in oscillator mode. |-| 13 | PH1 | bidirectional | Port H pin 1; 5V-tolerant in digital mode, configurable as main HSE oscillator output; 5V tolerance not applicable in oscillator mode. |-| 14 | NRST | bidirectional | Active-low reset input with embedded weak pull-up resistor; bidirectional with asynchronous reset capability. |+| 11 | VDD | power_in | Main power supply (1.8-3.6V) for digital core and I/O ports. |+| 12 | PH0-OSC_IN | bidirectional | Port H pin 0; 5V-tolerant in digital mode, configurable as main HSE oscillator input (4-26 MHz); 5V tolerance not applicable in oscillator mode. |+| 13 | PH1-OSC_OUT | bidirectional | Port H pin 1; 5V-tolerant in digital mode, configurable as main HSE oscillator output; 5V tolerance not applicable in oscillator mode. |+| 14 | NRST | input | Active-low reset input with embedded weak pull-up resistor; bidirectional with asynchronous reset capability. | | 15 | PC0 | bidirectional | Port C pin 0; 5V-tolerant general-purpose I/O with alternate functions (OTG_HS_ULPI_STP) and ADC input (ADC123_IN10). | | 16 | PC1 | bidirectional | Port C pin 1; 5V-tolerant general-purpose I/O with alternate functions (ETH_MDC) and ADC input (ADC123_IN11). | | 17 | PC2 | bidirectional | Port C pin 2; 5V-tolerant general-purpose I/O with SPI and Ethernet functions; ADC input (ADC123_IN12). | | 18 | PC3 | bidirectional | Port C pin 3; 5V-tolerant general-purpose I/O with SPI, I2S, and Ethernet functions; ADC input (ADC123_IN13). |-| 19 | VDD | power_out | Main power supply (1.8-3.6V) for digital core and I/O ports. |+| 19 | VDD | power_in | Main power supply (1.8-3.6V) for digital core and I/O ports. | | 20 | VSSA | power_in | Analog ground (0V) reference for ADC, DAC, and comparators. | | 21 | VREF+ | power_in | Analog voltage reference input for ADC; typical 3.3V; requires 100nF decoupling capacitor. |-| 22 | VDDA | power_out | Analog power supply (1.8-3.6V) for ADC, DAC, comparators, and PLL; independent from VDD. |-| 23 | PA0 | bidirectional | Port A pin 0; 5V-tolerant general-purpose I/O, wakeup input from STOP/STANDBY modes, and ADC input (ADC123_IN0). |+| 22 | VDDA | power_in | Analog power supply (1.8-3.6V) for ADC, DAC, comparators, and PLL; independent from VDD. |+| 23 | PA0-WKUP | bidirectional | Port A pin 0; 5V-tolerant general-purpose I/O, wakeup input from STOP/STANDBY modes, and ADC input (ADC123_IN0). | | 24 | PA1 | bidirectional | Port A pin 1; 5V-tolerant general-purpose I/O with USART, timer, and Ethernet alternate functions; ADC input (ADC123_IN1). | | 25 | PA2 | bidirectional | Port A pin 2; 5V-tolerant general-purpose I/O with USART, timer, and Ethernet alternate functions; ADC input (ADC123_IN2). | | 26 | PA3 | bidirectional | Port A pin 3; 5V-tolerant general-purpose I/O with USART, timer, and Ethernet alternate functions; ADC input (ADC123_IN3). | | 27 | VSS | power_in | Ground (0V) reference for digital circuits. |-| 28 | VDD | power_out | Main power supply (1.8-3.6V) for digital core and I/O ports. |+| 28 | VDD | power_in | Main power supply (1.8-3.6V) for digital core and I/O ports. | | 29 | PA4 | bidirectional | Port A pin 4; 3.3V-tolerant general-purpose I/O with SPI and timer functions; DAC output 1 and ADC input (ADC12_IN4). | | 30 | PA5 | bidirectional | Port A pin 5; 3.3V-tolerant general-purpose I/O with SPI and timer functions; DAC output 2 and ADC input (ADC12_IN5). | | 31 | PA6 | bidirectional | Port A pin 6; 5V-tolerant general-purpose I/O with SPI, timer, and DCMI functions; ADC input (ADC12_IN6). |@@ -56,8 +56,20 @@ STM32F207VGT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | 46 | PE15 | bidirectional | Port E pin 15; 5V-tolerant general-purpose I/O with FSMC and timer alternate functions (FSMC_D12, TIM1_BKIN). | | 47 | PB10 | bidirectional | Port B pin 10; 5V-tolerant general-purpose I/O with I2C, SPI, timer, USART, and Ethernet alternate functions. | | 48 | PB11 | bidirectional | Port B pin 11; 5V-tolerant general-purpose I/O with I2C, timer, USART, USB, and Ethernet alternate functions. |-| 49 | VCAP_1 | passive | External capacitor connection for internal voltage regulator (main capacitor pin); use 2.2 μF ceramic or electrolytic capacitor. |-| 50 | VDD | power_out | Main power supply (1.8-3.6V) for digital core and I/O ports. |+| 49 | VCAP_1 | power_in | External capacitor connection for internal voltage regulator (main capacitor pin); use 2.2 μF ceramic or electrolytic capacitor. |+| 50 | VDD | power_in | Main power supply (1.8-3.6V) for digital core and I/O ports. |+| 51 | PB12 | bidirectional | |+| 52 | PB13 | bidirectional | |+| 53 | PB14 | bidirectional | |+| 54 | PB15 | bidirectional | |+| 55 | PD8 | bidirectional | |+| 56 | PD9 | bidirectional | |+| 57 | PD10 | bidirectional | |+| 58 | PD11 | bidirectional | |+| 59 | PD12 | bidirectional | |+| 60 | PD13 | bidirectional | |+| 61 | PD14 | bidirectional | |+| 62 | PD15 | bidirectional | | | 63 | PC6 | bidirectional | Port C pin 6; 5V-tolerant general-purpose I/O with I2S, timer, SDIO, USART, and DCMI alternate functions. | | 64 | PC7 | bidirectional | Port C pin 7; 5V-tolerant general-purpose I/O with I2S, timer, SDIO, USART, and DCMI alternate functions. | | 65 | PC8 | bidirectional | Port C pin 8; 5V-tolerant general-purpose I/O with timer, SDIO, USART, and DCMI alternate functions. |@@ -68,9 +80,9 @@ STM32F207VGT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | 70 | PA11 | bidirectional | Port A pin 11; 5V-tolerant general-purpose I/O with USART, CAN, timer, and USB OTG FS DM alternate functions. | | 71 | PA12 | bidirectional | Port A pin 12; 5V-tolerant general-purpose I/O with USART, CAN, timer, and USB OTG FS DP alternate functions. | | 72 | PA13 | bidirectional | Port A pin 13; 5V-tolerant JTAG Test Mode Select (TMS) / SWD Data I/O (SWDIO) for debugging interface. |-| 73 | VCAP_2 | passive | External capacitor connection for internal voltage regulator (secondary capacitor pin); use 2.2 μF ceramic or electrolytic capacitor. |+| 73 | VCAP_2 | power_in | External capacitor connection for internal voltage regulator (secondary capacitor pin); use 2.2 μF ceramic or electrolytic capacitor. | | 74 | VSS | power_in | Ground (0V) reference for digital circuits. |-| 75 | VDD | power_out | Main power supply (1.8-3.6V) for digital core and I/O ports. |+| 75 | VDD | power_in | Main power supply (1.8-3.6V) for digital core and I/O ports. | | 76 | PA14 | bidirectional | Port A pin 14; 5V-tolerant JTAG Test Clock (TCK) / SWD Clock (SWCLK) for debugging interface. | | 77 | PA15 | bidirectional | Port A pin 15; 5V-tolerant JTAG Test Data In (JTDI) / general-purpose I/O with timer and SPI alternate functions. | | 78 | PC10 | bidirectional | Port C pin 10; 5V-tolerant general-purpose I/O with SPI, I2S, USART, UART, SDIO, and DCMI alternate functions. |@@ -94,8 +106,8 @@ STM32F207VGT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | 96 | PB9 | bidirectional | Port B pin 9; 5V-tolerant general-purpose I/O with I2C, SPI, timer, SDIO, CAN, and DCMI alternate functions. | | 97 | PE0 | bidirectional | Port E pin 0; 5V-tolerant general-purpose I/O with timer, FSMC, and DCMI alternate functions (FSMC_NBL0, DCMI_D2). | | 98 | PE1 | bidirectional | Port E pin 1; 5V-tolerant general-purpose I/O with FSMC and DCMI alternate functions (FSMC_NBL1, DCMI_D3). |-| 99 | RFU | unconnected | Reserved for future use; can be tied to VDD, VSS, or left unconnected; do not use in current designs. |-| 100 | VDD | power_out | Main power supply (1.8-3.6V) for digital core and I/O ports. |+| 99 | RFU | power_in | Reserved for future use; can be tied to VDD, VSS, or left unconnected; do not use in current designs. |+| 100 | VDD | power_in | Main power supply (1.8-3.6V) for digital core and I/O ports. | ## Key specifications
package.json+2−2@@ -1,6 +1,6 @@ { "slug": "stm32f207vgt6",- "version": "0.1.0",+ "version": "0.1.1", "type": "component", "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.", "tags": [@@ -613,4 +613,4 @@ "footprint": "viewers/footprint.html" } }-}+}
page.json+4−4@@ -4,7 +4,7 @@ "slug": "stm32f207vgt6", "title": "STM32F207VGT6", "brief": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.1.1", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -640,7 +640,7 @@ "viewers/symbol.html", "viewers/footprint.html" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "org": "adom" }
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direction="io" rot="R180"/>- <pin name="VDD@6" x="17.78" y="-43.18" length="middle" direction="out" rot="R180"/>- <pin name="VCAP_1" x="17.78" y="-45.72" length="middle" direction="pas" rot="R180"/>- <pin name="PB11" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>- <pin name="PB10" x="17.78" y="-50.8" length="middle" direction="io" rot="R180"/>- <pin name="PE15" x="17.78" y="-53.34" length="middle" direction="io" rot="R180"/>- <pin name="PE14" x="17.78" y="-55.88" length="middle" direction="io" rot="R180"/>+ <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data</description>+ <wire x1="-12.7" y1="63.5" x2="12.7" y2="63.5" width="0.254" layer="94"/>+ <wire x1="12.7" y1="63.5" x2="12.7" y2="-66.04" width="0.254" layer="94"/>+ <wire x1="12.7" y1="-66.04" x2="-12.7" y2="-66.04" width="0.254" layer="94"/>+ <wire x1="-12.7" y1="-66.04" x2="-12.7" y2="63.5" width="0.254" layer="94"/>+ <text x="0.0000" y="66.0400" size="1.27" layer="95" align="center">>NAME</text>+ <text x="0.0000" y="-68.5800" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="PE2" x="-17.78" y="60.96" length="middle" direction="io"/>+ <pin name="PE3" x="-17.78" y="58.42" length="middle" direction="io"/>+ <pin name="PE4" x="-17.78" y="55.88" length="middle" direction="io"/>+ <pin name="PE5" x="-17.78" y="53.34" length="middle" direction="io"/>+ <pin name="PE6" x="-17.78" y="50.8" length="middle" direction="io"/>+ <pin name="VBAT" x="-17.78" y="48.26" length="middle" direction="pwr"/>+ <pin name="PC13" x="-17.78" y="45.72" length="middle" direction="io"/>+ <pin name="PC14-OSC32_IN" x="-17.78" y="43.18" length="middle" direction="io"/>+ <pin name="PC15-OSC32_OUT" x="-17.78" y="40.64" length="middle" direction="io"/>+ <pin name="VSS" x="-17.78" y="38.1" length="middle" direction="pwr"/>+ <pin name="VDD" x="-17.78" y="35.56" length="middle" direction="pwr"/>+ <pin name="PH0-OSC_IN" x="-17.78" y="33.02" length="middle" direction="io"/>+ <pin name="PH1-OSC_OUT" x="-17.78" y="30.48" length="middle" direction="io"/>+ <pin name="NRST" x="-17.78" y="27.94" length="middle" direction="in"/>+ <pin name="PC0" x="-17.78" y="25.4" length="middle" direction="io"/>+ <pin name="PC1" x="-17.78" y="22.86" length="middle" direction="io"/>+ <pin name="PC2" x="-17.78" y="20.32" length="middle" direction="io"/>+ <pin name="PC3" x="-17.78" y="17.78" length="middle" direction="io"/>+ <pin name="VDD@2" x="-17.78" y="15.24" length="middle" direction="pwr"/>+ <pin name="VSSA" x="-17.78" y="12.7" length="middle" direction="pwr"/>+ <pin name="VREF+" x="-17.78" y="10.16" length="middle" direction="pwr"/>+ <pin name="VDDA" x="-17.78" y="7.62" length="middle" direction="pwr"/>+ <pin name="PA0-WKUP" x="-17.78" y="5.08" length="middle" direction="io"/>+ <pin name="PA1" x="-17.78" y="2.54" length="middle" direction="io"/>+ <pin name="PA2" x="-17.78" y="0" length="middle" direction="io"/>+ <pin name="PA3" x="-17.78" y="-2.54" length="middle" direction="io"/>+ <pin name="VSS@2" x="-17.78" y="-5.08" length="middle" direction="pwr"/>+ <pin name="VDD@3" x="-17.78" y="-7.62" length="middle" direction="pwr"/>+ <pin name="PA4" x="-17.78" y="-10.16" length="middle" direction="io"/>+ <pin name="PA5" x="-17.78" y="-12.7" length="middle" direction="io"/>+ <pin name="PA6" x="-17.78" y="-15.24" length="middle" direction="io"/>+ <pin name="PA7" x="-17.78" y="-17.78" length="middle" direction="io"/>+ <pin name="PC4" x="-17.78" y="-20.32" length="middle" direction="io"/>+ <pin name="PC5" x="-17.78" y="-22.86" length="middle" direction="io"/>+ <pin name="PB0" x="-17.78" y="-25.4" length="middle" direction="io"/>+ <pin name="PB1" x="-17.78" y="-27.94" length="middle" direction="io"/>+ <pin name="PB2" x="-17.78" y="-30.48" length="middle" direction="io"/>+ <pin name="PE7" x="-17.78" y="-33.02" length="middle" direction="io"/>+ <pin name="PE8" x="-17.78" y="-35.56" length="middle" direction="io"/>+ <pin name="PE9" x="-17.78" y="-38.1" length="middle" direction="io"/>+ <pin name="PE10" x="-17.78" y="-40.64" length="middle" direction="io"/>+ <pin name="PE11" x="-17.78" y="-43.18" length="middle" direction="io"/>+ <pin name="PE12" x="-17.78" y="-45.72" length="middle" direction="io"/>+ <pin name="PE13" x="-17.78" y="-48.26" length="middle" direction="io"/>+ <pin name="PE14" x="-17.78" y="-50.8" length="middle" direction="io"/>+ <pin name="PE15" x="-17.78" y="-53.34" length="middle" direction="io"/>+ <pin name="PB10" x="-17.78" y="-55.88" length="middle" direction="io"/>+ <pin name="PB11" x="-17.78" y="-58.42" length="middle" direction="io"/>+ <pin name="VCAP_1" x="-17.78" y="-60.96" length="middle" direction="pwr"/>+ <pin name="VDD@4" x="-17.78" y="-63.5" length="middle" direction="pwr"/>+ <pin name="VDD@5" x="17.78" y="60.96" length="middle" direction="pwr" rot="R180"/>+ <pin name="RFU" x="17.78" y="58.42" length="middle" direction="pwr" rot="R180"/>+ <pin name="PE1" x="17.78" y="55.88" length="middle" direction="io" rot="R180"/>+ <pin name="PE0" x="17.78" y="53.34" length="middle" direction="io" rot="R180"/>+ <pin name="PB9" x="17.78" y="50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PB8" x="17.78" y="48.26" length="middle" direction="io" rot="R180"/>+ <pin name="BOOT0" x="17.78" y="45.72" length="middle" direction="in" rot="R180"/>+ <pin name="PB7" x="17.78" y="43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PB6" x="17.78" y="40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PB5" x="17.78" y="38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PB4" x="17.78" y="35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PB3" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PD7" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PD6" x="17.78" y="27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PD5" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PD4" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PD3" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PD2" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PD1" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PD0" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>+ <pin name="PA15" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+ <pin name="PA14" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@6" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@3" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+ <pin name="VCAP_2" x="17.78" y="-7.62" length="middle" direction="pwr" rot="R180"/>+ <pin name="PA13" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PA12" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PA11" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PA10" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PA9" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PA8" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PC9" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PC8" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PC7" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PC6" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PD15" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PD14" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PD13" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PD12" x="17.78" y="-43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PD11" x="17.78" y="-45.72" length="middle" direction="io" rot="R180"/>+ <pin name="PD10" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>+ <pin name="PD9" x="17.78" y="-50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PD8" x="17.78" y="-53.34" length="middle" direction="io" rot="R180"/>+ <pin name="PB15" x="17.78" y="-55.88" length="middle" direction="io" rot="R180"/>+ <pin name="PB14" x="17.78" y="-58.42" length="middle" direction="io" rot="R180"/>+ <pin name="PB13" x="17.78" y="-60.96" length="middle" direction="io" rot="R180"/>+ <pin name="PB12" x="17.78" y="-63.5" length="middle" direction="io" rot="R180"/> </symbol> </symbols> <devicesets> <deviceset name="STM32F207VGT6" prefix="U">- <description></description>+ <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data</description> <gates> <gate name="G$1" symbol="STM32F207VGT6" x="0" y="0"/> </gates>@@ -292,12 +305,12 @@ <connect gate="G$1" pin="PE6" pad="5"/> <connect gate="G$1" pin="VBAT" pad="6"/> <connect gate="G$1" pin="PC13" pad="7"/>- <connect gate="G$1" pin="PC14" pad="8"/>- <connect gate="G$1" pin="PC15" pad="9"/>+ <connect gate="G$1" pin="PC14-OSC32_IN" pad="8"/>+ <connect gate="G$1" pin="PC15-OSC32_OUT" pad="9"/> <connect gate="G$1" pin="VSS" pad="10"/> <connect gate="G$1" pin="VDD" pad="11"/>- <connect gate="G$1" pin="PH0" pad="12"/>- <connect gate="G$1" pin="PH1" pad="13"/>+ <connect gate="G$1" pin="PH0-OSC_IN" pad="12"/>+ <connect gate="G$1" pin="PH1-OSC_OUT" pad="13"/> <connect gate="G$1" pin="NRST" pad="14"/> <connect gate="G$1" pin="PC0" pad="15"/> <connect gate="G$1" pin="PC1" pad="16"/>@@ -307,7 +320,7 @@ <connect gate="G$1" pin="VSSA" pad="20"/> <connect gate="G$1" pin="VREF+" pad="21"/> <connect gate="G$1" pin="VDDA" pad="22"/>- <connect gate="G$1" pin="PA0" pad="23"/>+ <connect gate="G$1" pin="PA0-WKUP" pad="23"/> <connect gate="G$1" pin="PA1" pad="24"/> <connect gate="G$1" pin="PA2" pad="25"/> <connect gate="G$1" pin="PA3" pad="26"/>@@ -329,7 +342,13 @@ <connect gate="G$1" pin="PE11" pad="42"/> <connect gate="G$1" pin="PE12" pad="43"/> <connect gate="G$1" pin="PE13" pad="44"/>- <connect gate="G$1" pin="VDD@4" pad="100"/>+ <connect gate="G$1" pin="PE14" pad="45"/>+ <connect gate="G$1" pin="PE15" pad="46"/>+ <connect gate="G$1" pin="PB10" pad="47"/>+ <connect gate="G$1" pin="PB11" pad="48"/>+ <connect gate="G$1" pin="VCAP_1" pad="49"/>+ <connect gate="G$1" pin="VDD@4" pad="50"/>+ <connect gate="G$1" pin="VDD@5" pad="100"/> <connect gate="G$1" pin="RFU" pad="99"/> <connect gate="G$1" pin="PE1" pad="98"/> <connect gate="G$1" pin="PE0" pad="97"/>@@ -354,7 +373,7 @@ <connect gate="G$1" pin="PC10" pad="78"/> <connect gate="G$1" pin="PA15" pad="77"/> <connect gate="G$1" pin="PA14" pad="76"/>- <connect gate="G$1" pin="VDD@5" pad="75"/>+ <connect gate="G$1" pin="VDD@6" pad="75"/> <connect gate="G$1" pin="VSS@3" pad="74"/> <connect gate="G$1" pin="VCAP_2" pad="73"/> <connect gate="G$1" pin="PA13" pad="72"/>@@ -367,14 +386,30 @@ <connect gate="G$1" pin="PC8" pad="65"/> <connect gate="G$1" pin="PC7" pad="64"/> <connect gate="G$1" pin="PC6" pad="63"/>- <connect gate="G$1" pin="VDD@6" pad="50"/>- <connect gate="G$1" pin="VCAP_1" pad="49"/>- <connect gate="G$1" pin="PB11" pad="48"/>- <connect gate="G$1" pin="PB10" pad="47"/>- <connect gate="G$1" pin="PE15" pad="46"/>- <connect gate="G$1" pin="PE14" pad="45"/>+ <connect gate="G$1" pin="PD15" pad="62"/>+ <connect gate="G$1" pin="PD14" pad="61"/>+ <connect gate="G$1" pin="PD13" pad="60"/>+ <connect gate="G$1" pin="PD12" pad="59"/>+ <connect gate="G$1" pin="PD11" pad="58"/>+ <connect gate="G$1" pin="PD10" pad="57"/>+ <connect gate="G$1" pin="PD9" pad="56"/>+ <connect gate="G$1" pin="PD8" pad="55"/>+ <connect gate="G$1" pin="PB15" pad="54"/>+ <connect gate="G$1" pin="PB14" pad="53"/>+ <connect gate="G$1" pin="PB13" pad="52"/>+ <connect gate="G$1" pin="PB12" pad="51"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="STM32F207VGT6" constant="no"/>+ <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+ <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586182040648110080" constant="no"/>+ <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/stm32f207vgt6" constant="no"/>+ <attribute name="MOUSER_PN" value="511-STM32F207VGT6" constant="no"/>+ <attribute name="DIGIKEY_PN" value="497-11173-ND" constant="no"/>+ <attribute name="LCSC_PN" value="C12089" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>