component
STM32F205ZET6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
← Commit history
Publish 0.1.1
5 files changed
+533−522
README.md+121−121@@ -8,15 +8,15 @@ STM32F205ZET6 from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin desc | Pin | Name | Type | Function | |---|---|---|---|-| 1 | PE2 | output | Port E pin 2, 5V-tolerant I/O with alternate functions TRACECLK, FSMC_A23, ETH_MII_TXD3. |-| 2 | PE3 | output | Port E pin 3, 5V-tolerant I/O with alternate functions TRACED0, FSMC_A19. |-| 3 | PE4 | output | Port E pin 4, 5V-tolerant I/O with alternate functions TRACED1, FSMC_A20, DCMI_D4. |-| 4 | PE5 | output | Port E pin 5, 5V-tolerant I/O with alternate functions TRACED2, FSMC_A21, TIM9_CH1, DCMI_D6. |-| 5 | PE6 | output | Port E pin 6, 5V-tolerant I/O with alternate functions TRACED3, FSMC_A22, TIM9_CH2, DCMI_D7. |+| 1 | PE2 | bidirectional | Port E pin 2, 5V-tolerant I/O with alternate functions TRACECLK, FSMC_A23, ETH_MII_TXD3. |+| 2 | PE3 | bidirectional | Port E pin 3, 5V-tolerant I/O with alternate functions TRACED0, FSMC_A19. |+| 3 | PE4 | bidirectional | Port E pin 4, 5V-tolerant I/O with alternate functions TRACED1, FSMC_A20, DCMI_D4. |+| 4 | PE5 | bidirectional | Port E pin 5, 5V-tolerant I/O with alternate functions TRACED2, FSMC_A21, TIM9_CH1, DCMI_D6. |+| 5 | PE6 | bidirectional | Port E pin 6, 5V-tolerant I/O with alternate functions TRACED3, FSMC_A22, TIM9_CH2, DCMI_D7. | | 6 | VBAT | power_in | Battery backup supply for RTC, 1.8 to 3.6 V. | | 7 | PC13 | bidirectional | Port C pin 13, 5V-tolerant I/O through power switch (max 2 MHz, 30 pF load), with RTC_AF1 function. |-| 8 | PC14/OSC32_IN | bidirectional | Port C pin 14 or 32 kHz oscillator input, 5V-tolerant I/O through power switch, OSC32_IN mode when used as oscillator. |-| 9 | PC15/OSC32_OUT | bidirectional | Port C pin 15 or 32 kHz oscillator output, 5V-tolerant I/O through power switch, OSC32_OUT mode when used as oscillator. |+| 8 | PC14-OSC32_IN | bidirectional | Port C pin 14 or 32 kHz oscillator input, 5V-tolerant I/O through power switch, OSC32_IN mode when used as oscillator. |+| 9 | PC15-OSC32_OUT | bidirectional | Port C pin 15 or 32 kHz oscillator output, 5V-tolerant I/O through power switch, OSC32_OUT mode when used as oscillator. | | 10 | PF0 | bidirectional | Port F pin 0, 5V-tolerant I/O with alternate functions FSMC_A0, I2C2_SDA. | | 11 | PF1 | bidirectional | Port F pin 1, 5V-tolerant I/O with alternate functions FSMC_A1, I2C2_SCL. | | 12 | PF2 | bidirectional | Port F pin 2, 5V-tolerant I/O with alternate functions FSMC_A2, I2C2_SMBA. |@@ -30,128 +30,128 @@ STM32F205ZET6 from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin desc | 20 | PF8 | bidirectional | Port F pin 8, 5V-tolerant I/O with alternate functions TIM13_CH1, FSMC_NIOWR and additional function ADC3_IN6. | | 21 | PF9 | bidirectional | Port F pin 9, 5V-tolerant I/O with alternate functions TIM14_CH1, FSMC_CD and additional function ADC3_IN7. | | 22 | PF10 | bidirectional | Port F pin 10, 5V-tolerant I/O with alternate function FSMC_INTR and additional function ADC3_IN8. |-| 23 | PH0/OSC_IN | bidirectional | Port H pin 0 or 4-26 MHz oscillator input, 5V-tolerant I/O with OSC_IN function when used as crystal oscillator. |-| 24 | PH1/OSC_OUT | bidirectional | Port H pin 1 or 4-26 MHz oscillator output, 5V-tolerant I/O with OSC_OUT function when used as crystal oscillator. |-| 25 | NRST | bidirectional | Active-low reset pin with embedded weak pull-up resistor, asynchronous reset input. |+| 23 | PH0-OSC_IN | bidirectional | Port H pin 0 or 4-26 MHz oscillator input, 5V-tolerant I/O with OSC_IN function when used as crystal oscillator. |+| 24 | PH1-OSC_OUT | bidirectional | Port H pin 1 or 4-26 MHz oscillator output, 5V-tolerant I/O with OSC_OUT function when used as crystal oscillator. |+| 25 | NRST | input | Active-low reset pin with embedded weak pull-up resistor, asynchronous reset input. | | 26 | PC0 | bidirectional | Port C pin 0, 5V-tolerant I/O with alternate function OTG_HS_ULPI_STP and additional function ADC123_IN10. | | 27 | PC1 | bidirectional | Port C pin 1, 5V-tolerant I/O with alternate function ETH_MDC and additional function ADC123_IN11. | | 28 | PC2 | bidirectional | Port C pin 2, 5V-tolerant I/O with alternate functions SPI2_MISO, OTG_HS_ULPI_DIR, ETH_MII_TXD2 and additional function ADC123_IN12. | | 29 | PC3 | bidirectional | Port C pin 3, 5V-tolerant I/O with alternate functions SPI2_MOSI, I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK and additional function ADC123_IN13. | | 30 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. | | 31 | VSSA | power_in | Analog ground (0 V reference for ADC/DAC). |-| 32 | VREF- | power_in | ADC negative reference supply, typically connected to VSSA. |-| 33 | VREF+ | power_in | ADC positive reference supply, 1.8 to 3.6 V, must have 100 nF decoupling capacitor. |-| 34 | VDDA | power_in | Analog supply for ADC/DAC, 1.8 to 3.6 V, must have 100 nF decoupling capacitor. |-| 35 | PA0/WKUP | bidirectional | Port A pin 0, wakeup pin, 5V-tolerant I/O with alternate functions USART2_CTS, TIM2_CH1_ETR, TIM5_CH1, TIM8_ETR and additional functions ADC123_IN0, WKUP. |-| 36 | PA1 | bidirectional | Port A pin 1, 5V-tolerant I/O with alternate functions USART2_RTS, ETH_RMII_REF_CLK, ETH_MII_RX_CLK, TIM5_CH2, TIM2_CH2 and additional function ADC123_IN1. |-| 37 | PA2 | bidirectional | Port A pin 2, 5V-tolerant I/O with alternate functions USART2_TX, TIM5_CH3, TIM9_CH1, TIM2_CH3, ETH_MDIO and additional function ADC123_IN2. |-| 38 | PH2 | bidirectional | Port H pin 2, 5V-tolerant I/O with alternate functions ETH_MII_CRS. |-| 39 | PH3 | bidirectional | Port H pin 3, 5V-tolerant I/O with alternate functions ETH_MII_COL. |-| 40 | PH4 | bidirectional | Port H pin 4, 5V-tolerant I/O with alternate functions I2C2_SCL, OTG_HS_ULPI_NXT. |-| 41 | PH5 | bidirectional | Port H pin 5, 5V-tolerant I/O with alternate function I2C2_SDA. |-| 42 | PA3 | bidirectional | Port A pin 3, 5V-tolerant I/O with alternate functions USART2_RX, TIM5_CH4, TIM9_CH2, TIM2_CH4, OTG_HS_ULPI_D0, ETH_MII_COL and additional function ADC123_IN3. |-| 43 | VSS | power_in | Ground supply (0 V reference). |-| 44 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. |-| 45 | PA4 | bidirectional | Port A pin 4, 3.3V-tolerant I/O with alternate functions SPI1_NSS, SPI3_NSS, USART2_CK, DCMI_HSYNC, OTG_HS_SOF, I2S3_WS and additional functions ADC12_IN4, DAC_OUT1. |-| 46 | PA5 | bidirectional | Port A pin 5, 3.3V-tolerant I/O with alternate functions SPI1_SCK, OTG_HS_ULPI_CK, TIM2_CH1_ETR, TIM8_CH1N and additional functions ADC12_IN5, DAC_OUT2. |-| 47 | PA6 | bidirectional | Port A pin 6, 5V-tolerant I/O with alternate functions SPI1_MISO, TIM8_BKIN, TIM13_CH1, DCMI_PIXCLK, TIM3_CH1, TIM1_BKIN and additional function ADC12_IN6. |-| 48 | PA7 | bidirectional | Port A pin 7, 5V-tolerant I/O with alternate functions SPI1_MOSI, TIM8_CH1N, TIM14_CH1, TIM3_CH2, ETH_MII_RX_DV, TIM1_CH1N, ETH_RMII_CRS_DV and additional function ADC12_IN7. |-| 49 | PC4 | bidirectional | Port C pin 4, 5V-tolerant I/O with alternate functions ETH_RMII_RXD0, ETH_MII_RXD0 and additional function ADC12_IN14. |-| 50 | PC5 | bidirectional | Port C pin 5, 5V-tolerant I/O with alternate functions ETH_RMII_RXD1, ETH_MII_RXD1 and additional function ADC12_IN15. |-| 51 | PB0 | bidirectional | Port B pin 0, 5V-tolerant I/O with alternate functions TIM3_CH3, TIM8_CH2N, OTG_HS_ULPI_D1, ETH_MII_RXD2, TIM1_CH2N and additional function ADC12_IN8. |-| 52 | PB1 | bidirectional | Port B pin 1, 5V-tolerant I/O with alternate functions TIM3_CH4, TIM8_CH3N, OTG_HS_ULPI_D2, ETH_MII_RXD3, TIM1_CH3N and additional function ADC12_IN9. |-| 53 | PB2/BOOT1 | bidirectional | Port B pin 2 or boot select pin, 5V-tolerant I/O, BOOT1 mode when used for boot configuration. |-| 54 | PF11 | bidirectional | Port F pin 11, 5V-tolerant I/O with alternate function DCMI_D12. |-| 55 | PF12 | bidirectional | Port F pin 12, 5V-tolerant I/O with alternate function FSMC_A6. |-| 56 | VSS | power_in | Ground supply (0 V reference). |-| 57 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. |-| 58 | PF13 | bidirectional | Port F pin 13, 5V-tolerant I/O with alternate function FSMC_A7. |-| 59 | PF14 | bidirectional | Port F pin 14, 5V-tolerant I/O with alternate function FSMC_A8. |-| 60 | PF15 | bidirectional | Port F pin 15, 5V-tolerant I/O with alternate function FSMC_A9. |-| 61 | PG0 | bidirectional | Port G pin 0, 5V-tolerant I/O with alternate function FSMC_A10. |-| 62 | PG1 | bidirectional | Port G pin 1, 5V-tolerant I/O with alternate function FSMC_A11. |-| 63 | PE7 | bidirectional | Port E pin 7, 5V-tolerant I/O with alternate functions FSMC_D4, TIM1_ETR. |-| 64 | PE8 | bidirectional | Port E pin 8, 5V-tolerant I/O with alternate functions FSMC_D5, TIM1_CH1N. |-| 65 | PE9 | bidirectional | Port E pin 9, 5V-tolerant I/O with alternate functions FSMC_D6, TIM1_CH1. |-| 66 | VSS | power_in | Ground supply (0 V reference). |-| 67 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. |-| 68 | PE10 | bidirectional | Port E pin 10, 5V-tolerant I/O with alternate functions FSMC_D7, TIM1_CH2N. |-| 69 | PE11 | bidirectional | Port E pin 11, 5V-tolerant I/O with alternate functions FSMC_D8, TIM1_CH2. |-| 70 | PE12 | bidirectional | Port E pin 12, 5V-tolerant I/O with alternate functions FSMC_D9, TIM1_CH3N. |-| 71 | PE13 | bidirectional | Port E pin 13, 5V-tolerant I/O with alternate functions FSMC_D10, TIM1_CH3. |-| 72 | PE14 | bidirectional | Port E pin 14, 5V-tolerant I/O with alternate functions FSMC_D11, TIM1_CH4. |-| 73 | PE15 | bidirectional | Port E pin 15, 5V-tolerant I/O with alternate functions FSMC_D12, TIM1_BKIN. |-| 74 | PB10 | bidirectional | Port B pin 10, 5V-tolerant I/O with alternate functions SPI2_SCK, I2S2_SCK, I2C2_SCL, USART3_TX, OTG_HS_ULPI_D3, ETH_MII_RX_ER, TIM2_CH3. |-| 75 | PB11 | bidirectional | Port B pin 11, 5V-tolerant I/O with alternate functions I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_RMII_TX_EN, ETH_MII_TX_EN, TIM2_CH4. |-| 76 | VCAP_1 | power_in | Internal voltage regulator capacitor pin, connect 2.2 µF ceramic capacitor to ground. |-| 77 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. |-| 78 | PH6 | bidirectional | Port H pin 6, 5V-tolerant I/O with alternate functions I2C2_SMBA, TIM12_CH1, ETH_MII_RXD2. |-| 79 | PH7 | bidirectional | Port H pin 7, 5V-tolerant I/O with alternate functions I2C3_SCL, ETH_MII_RXD3. |-| 80 | PH8 | bidirectional | Port H pin 8, 5V-tolerant I/O with alternate functions I2C3_SDA, DCMI_HSYNC. |-| 81 | PH9 | bidirectional | Port H pin 9, 5V-tolerant I/O with alternate functions I2C3_SMBA, TIM12_CH2, DCMI_D0. |-| 82 | PH10 | bidirectional | Port H pin 10, 5V-tolerant I/O with alternate functions TIM5_CH1, DCMI_D1. |-| 83 | PH11 | bidirectional | Port H pin 11, 5V-tolerant I/O with alternate functions TIM5_CH2, DCMI_D2. |-| 84 | PH12 | bidirectional | Port H pin 12, 5V-tolerant I/O with alternate functions TIM5_CH3, DCMI_D3. |-| 85 | VSS | power_in | Ground supply (0 V reference). |-| 86 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. |-| 87 | PB12 | bidirectional | Port B pin 12, 5V-tolerant I/O with alternate functions SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN, CAN2_RX, OTG_HS_ULPI_D5, ETH_RMII_TXD0, ETH_MII_TXD0, OTG_HS_ID. |-| 88 | PB13 | bidirectional | Port B pin 13, 5V-tolerant I/O with alternate functions SPI2_SCK, I2S2_SCK, USART3_CTS, TIM1_CH1N, CAN2_TX, OTG_HS_ULPI_D6, ETH_RMII_TXD1, ETH_MII_TXD1 with additional function OTG_HS_VBUS. |-| 89 | PB14 | bidirectional | Port B pin 14, 5V-tolerant I/O with alternate functions SPI2_MISO, TIM1_CH2N, TIM12_CH1, OTG_HS_DM, USART3_RTS, TIM8_CH2N. |-| 90 | PB15 | bidirectional | Port B pin 15, 5V-tolerant I/O with alternate functions SPI2_MOSI, I2S2_SD, TIM1_CH3N, TIM8_CH3N, TIM12_CH2, OTG_HS_DP, RTC_50Hz. |-| 91 | PD8 | bidirectional | Port D pin 8, 5V-tolerant I/O with alternate functions FSMC_D13, USART3_TX. |-| 92 | PD9 | bidirectional | Port D pin 9, 5V-tolerant I/O with alternate functions FSMC_D14, USART3_RX. |-| 93 | PD10 | bidirectional | Port D pin 10, 5V-tolerant I/O with alternate functions FSMC_D15, USART3_CK. |-| 94 | PD11 | bidirectional | Port D pin 11, 5V-tolerant I/O with alternate functions FSMC_A16, USART3_CTS. |-| 95 | PD12 | bidirectional | Port D pin 12, 5V-tolerant I/O with alternate functions FSMC_A17, TIM4_CH1, USART3_RTS. |-| 96 | PD13 | bidirectional | Port D pin 13, 5V-tolerant I/O with alternate functions FSMC_A18, TIM4_CH2. |-| 97 | VSS | power_in | Ground supply (0 V reference). |-| 98 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. |-| 99 | PD14 | bidirectional | Port D pin 14, 5V-tolerant I/O with alternate functions FSMC_D0, TIM4_CH3. |-| 100 | PD15 | bidirectional | Port D pin 15, 5V-tolerant I/O with alternate functions FSMC_D1, TIM4_CH4. |-| 101 | PG2 | bidirectional | Port G pin 2, 5V-tolerant I/O with alternate function FSMC_A12. |-| 102 | PG3 | bidirectional | Port G pin 3, 5V-tolerant I/O with alternate function FSMC_A13. |-| 103 | PG4 | bidirectional | Port G pin 4, 5V-tolerant I/O with alternate function FSMC_A14. |-| 104 | PG5 | bidirectional | Port G pin 5, 5V-tolerant I/O with alternate function FSMC_A15. |-| 105 | PG6 | bidirectional | Port G pin 6, 5V-tolerant I/O with alternate function FSMC_INT2. |-| 106 | PG7 | bidirectional | Port G pin 7, 5V-tolerant I/O with alternate functions FSMC_INT3, USART6_CK. |-| 107 | PG8 | bidirectional | Port G pin 8, 5V-tolerant I/O with alternate functions USART6_RTS, ETH_PPS_OUT. |-| 108 | VSS | power_in | Ground supply (0 V reference). |-| 109 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. |-| 110 | PC6 | bidirectional | Port C pin 6, 5V-tolerant I/O with alternate functions I2S2_MCK, TIM8_CH1, SDIO_D6, USART6_TX, DCMI_D0, TIM3_CH1. |-| 111 | PC7 | bidirectional | Port C pin 7, 5V-tolerant I/O with alternate functions I2S3_MCK, TIM8_CH2, SDIO_D7, USART6_RX, DCMI_D1, TIM3_CH2. |-| 112 | PC8 | bidirectional | Port C pin 8, 5V-tolerant I/O with alternate functions TIM8_CH3, SDIO_D0, TIM3_CH3, USART6_CK, DCMI_D2. |-| 113 | PC9 | bidirectional | Port C pin 9, 5V-tolerant I/O with alternate functions I2S2_CKIN, I2S3_CKIN, MCO2, TIM8_CH4, SDIO_D1, I2C3_SDA, DCMI_D3, TIM3_CH4. |-| 114 | PA8 | bidirectional | Port A pin 8, 5V-tolerant I/O with alternate functions MCO1, USART1_CK, TIM1_CH1, I2C3_SCL, OTG_FS_SOF. |-| 115 | PA9 | bidirectional | Port A pin 9, 5V-tolerant I/O with alternate functions USART1_TX, TIM1_CH2, I2C3_SMBA, DCMI_D0 with additional function OTG_FS_VBUS. |-| 116 | PA10 | bidirectional | Port A pin 10, 5V-tolerant I/O with alternate functions USART1_RX, TIM1_CH3, OTG_FS_ID, DCMI_D1. |-| 117 | PA11 | bidirectional | Port A pin 11, 5V-tolerant I/O with alternate functions USART1_CTS, CAN1_RX, TIM1_CH4, OTG_FS_DM. |-| 118 | PA12 | bidirectional | Port A pin 12, 5V-tolerant I/O with alternate functions USART1_RTS, CAN1_TX, TIM1_ETR, OTG_FS_DP. |-| 119 | PA13/JTMS-SWDIO | bidirectional | Port A pin 13, JTAG TMS or serial wire debug I/O pin, 5V-tolerant I/O with JTMS-SWDIO function. |-| 120 | VCAP_2 | power_in | Internal voltage regulator capacitor pin, connect 2.2 µF ceramic capacitor to ground. |-| 121 | VSS | power_in | Ground supply (0 V reference). |-| 122 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. |-| 123 | PH13 | bidirectional | Port H pin 13, 5V-tolerant I/O with alternate functions TIM8_CH1N, CAN1_TX. |-| 124 | PH14 | bidirectional | Port H pin 14, 5V-tolerant I/O with alternate functions TIM8_CH2N, DCMI_D4. |-| 125 | PH15 | bidirectional | Port H pin 15, 5V-tolerant I/O with alternate functions TIM8_CH3N, DCMI_D11. |-| 126 | PI0 | bidirectional | Port I pin 0, 5V-tolerant I/O with alternate functions TIM5_CH4, SPI2_NSS, I2S2_WS, DCMI_D13. |-| 127 | PI1 | bidirectional | Port I pin 1, 5V-tolerant I/O with alternate functions SPI2_SCK, I2S2_SCK, DCMI_D8. |-| 128 | PI2 | bidirectional | Port I pin 2, 5V-tolerant I/O with alternate functions TIM8_CH4, SPI2_MISO, DCMI_D9. |-| 129 | PI3 | bidirectional | Port I pin 3, 5V-tolerant I/O with alternate functions TIM8_ETR, SPI2_MOSI, I2S2_SD, DCMI_D10. |+| 32 | VREF+ | power_in | ADC positive reference supply, 1.8 to 3.6 V, must have 100 nF decoupling capacitor. |+| 33 | VDDA | power_in | Analog supply for ADC/DAC, 1.8 to 3.6 V, must have 100 nF decoupling capacitor. |+| 34 | PA0-WKUP | bidirectional | Port A pin 0, wakeup pin, 5V-tolerant I/O with alternate functions USART2_CTS, TIM2_CH1_ETR, TIM5_CH1, TIM8_ETR and additional functions ADC123_IN0, WKUP. |+| 35 | PA1 | bidirectional | Port A pin 1, 5V-tolerant I/O with alternate functions USART2_RTS, ETH_RMII_REF_CLK, ETH_MII_RX_CLK, TIM5_CH2, TIM2_CH2 and additional function ADC123_IN1. |+| 36 | PA2 | bidirectional | Port A pin 2, 5V-tolerant I/O with alternate functions USART2_TX, TIM5_CH3, TIM9_CH1, TIM2_CH3, ETH_MDIO and additional function ADC123_IN2. |+| 37 | PA3 | bidirectional | Port A pin 3, 5V-tolerant I/O with alternate functions USART2_RX, TIM5_CH4, TIM9_CH2, TIM2_CH4, OTG_HS_ULPI_D0, ETH_MII_COL and additional function ADC123_IN3. |+| 38 | VSS | power_in | Ground supply (0 V reference). |+| 39 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. |+| 40 | PA4 | bidirectional | Port A pin 4, 3.3V-tolerant I/O with alternate functions SPI1_NSS, SPI3_NSS, USART2_CK, DCMI_HSYNC, OTG_HS_SOF, I2S3_WS and additional functions ADC12_IN4, DAC_OUT1. |+| 41 | PA5 | bidirectional | Port A pin 5, 3.3V-tolerant I/O with alternate functions SPI1_SCK, OTG_HS_ULPI_CK, TIM2_CH1_ETR, TIM8_CH1N and additional functions ADC12_IN5, DAC_OUT2. |+| 42 | PA6 | bidirectional | Port A pin 6, 5V-tolerant I/O with alternate functions SPI1_MISO, TIM8_BKIN, TIM13_CH1, DCMI_PIXCLK, TIM3_CH1, TIM1_BKIN and additional function ADC12_IN6. |+| 43 | PA7 | bidirectional | Port A pin 7, 5V-tolerant I/O with alternate functions SPI1_MOSI, TIM8_CH1N, TIM14_CH1, TIM3_CH2, ETH_MII_RX_DV, TIM1_CH1N, ETH_RMII_CRS_DV and additional function ADC12_IN7. |+| 44 | PC4 | bidirectional | Port C pin 4, 5V-tolerant I/O with alternate functions ETH_RMII_RXD0, ETH_MII_RXD0 and additional function ADC12_IN14. |+| 45 | PC5 | bidirectional | Port C pin 5, 5V-tolerant I/O with alternate functions ETH_RMII_RXD1, ETH_MII_RXD1 and additional function ADC12_IN15. |+| 46 | PB0 | bidirectional | Port B pin 0, 5V-tolerant I/O with alternate functions TIM3_CH3, TIM8_CH2N, OTG_HS_ULPI_D1, ETH_MII_RXD2, TIM1_CH2N and additional function ADC12_IN8. |+| 47 | PB1 | bidirectional | Port B pin 1, 5V-tolerant I/O with alternate functions TIM3_CH4, TIM8_CH3N, OTG_HS_ULPI_D2, ETH_MII_RXD3, TIM1_CH3N and additional function ADC12_IN9. |+| 48 | PB2 | bidirectional | |+| 49 | PF11 | bidirectional | Port F pin 11, 5V-tolerant I/O with alternate function DCMI_D12. |+| 50 | PF12 | bidirectional | Port F pin 12, 5V-tolerant I/O with alternate function FSMC_A6. |+| 51 | VSS | power_in | Ground supply (0 V reference). |+| 52 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. |+| 53 | PF13 | bidirectional | Port F pin 13, 5V-tolerant I/O with alternate function FSMC_A7. |+| 54 | PF14 | bidirectional | Port F pin 14, 5V-tolerant I/O with alternate function FSMC_A8. |+| 55 | PF15 | bidirectional | Port F pin 15, 5V-tolerant I/O with alternate function FSMC_A9. |+| 56 | PG0 | bidirectional | Port G pin 0, 5V-tolerant I/O with alternate function FSMC_A10. |+| 57 | PG1 | bidirectional | Port G pin 1, 5V-tolerant I/O with alternate function FSMC_A11. |+| 58 | PE7 | bidirectional | Port E pin 7, 5V-tolerant I/O with alternate functions FSMC_D4, TIM1_ETR. |+| 59 | PE8 | bidirectional | Port E pin 8, 5V-tolerant I/O with alternate functions FSMC_D5, TIM1_CH1N. |+| 60 | PE9 | bidirectional | Port E pin 9, 5V-tolerant I/O with alternate functions FSMC_D6, TIM1_CH1. |+| 61 | VSS | power_in | Ground supply (0 V reference). |+| 62 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. |+| 63 | PE10 | bidirectional | Port E pin 10, 5V-tolerant I/O with alternate functions FSMC_D7, TIM1_CH2N. |+| 64 | PE11 | bidirectional | Port E pin 11, 5V-tolerant I/O with alternate functions FSMC_D8, TIM1_CH2. |+| 65 | PE12 | bidirectional | Port E pin 12, 5V-tolerant I/O with alternate functions FSMC_D9, TIM1_CH3N. |+| 66 | PE13 | bidirectional | Port E pin 13, 5V-tolerant I/O with alternate functions FSMC_D10, TIM1_CH3. |+| 67 | PE14 | bidirectional | Port E pin 14, 5V-tolerant I/O with alternate functions FSMC_D11, TIM1_CH4. |+| 68 | PE15 | bidirectional | Port E pin 15, 5V-tolerant I/O with alternate functions FSMC_D12, TIM1_BKIN. |+| 69 | PB10 | bidirectional | Port B pin 10, 5V-tolerant I/O with alternate functions SPI2_SCK, I2S2_SCK, I2C2_SCL, USART3_TX, OTG_HS_ULPI_D3, ETH_MII_RX_ER, TIM2_CH3. |+| 70 | PB11 | bidirectional | Port B pin 11, 5V-tolerant I/O with alternate functions I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_RMII_TX_EN, ETH_MII_TX_EN, TIM2_CH4. |+| 71 | VCAP_1 | power_in | Internal voltage regulator capacitor pin, connect 2.2 µF ceramic capacitor to ground. |+| 72 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. |+| 73 | PB12 | bidirectional | Port B pin 12, 5V-tolerant I/O with alternate functions SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN, CAN2_RX, OTG_HS_ULPI_D5, ETH_RMII_TXD0, ETH_MII_TXD0, OTG_HS_ID. |+| 74 | PB13 | bidirectional | Port B pin 13, 5V-tolerant I/O with alternate functions SPI2_SCK, I2S2_SCK, USART3_CTS, TIM1_CH1N, CAN2_TX, OTG_HS_ULPI_D6, ETH_RMII_TXD1, ETH_MII_TXD1 with additional function OTG_HS_VBUS. |+| 75 | PB14 | bidirectional | Port B pin 14, 5V-tolerant I/O with alternate functions SPI2_MISO, TIM1_CH2N, TIM12_CH1, OTG_HS_DM, USART3_RTS, TIM8_CH2N. |+| 76 | PB15 | bidirectional | Port B pin 15, 5V-tolerant I/O with alternate functions SPI2_MOSI, I2S2_SD, TIM1_CH3N, TIM8_CH3N, TIM12_CH2, OTG_HS_DP, RTC_50Hz. |+| 77 | PD8 | bidirectional | Port D pin 8, 5V-tolerant I/O with alternate functions FSMC_D13, USART3_TX. |+| 78 | PD9 | bidirectional | Port D pin 9, 5V-tolerant I/O with alternate functions FSMC_D14, USART3_RX. |+| 79 | PD10 | bidirectional | Port D pin 10, 5V-tolerant I/O with alternate functions FSMC_D15, USART3_CK. |+| 80 | PD11 | bidirectional | Port D pin 11, 5V-tolerant I/O with alternate functions FSMC_A16, USART3_CTS. |+| 81 | PD12 | bidirectional | Port D pin 12, 5V-tolerant I/O with alternate functions FSMC_A17, TIM4_CH1, USART3_RTS. |+| 82 | PD13 | bidirectional | Port D pin 13, 5V-tolerant I/O with alternate functions FSMC_A18, TIM4_CH2. |+| 83 | VSS | power_in | Ground supply (0 V reference). |+| 84 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. |+| 85 | PD14 | bidirectional | Port D pin 14, 5V-tolerant I/O with alternate functions FSMC_D0, TIM4_CH3. |+| 86 | PD15 | bidirectional | Port D pin 15, 5V-tolerant I/O with alternate functions FSMC_D1, TIM4_CH4. |+| 87 | PG2 | bidirectional | Port G pin 2, 5V-tolerant I/O with alternate function FSMC_A12. |+| 88 | PG3 | bidirectional | Port G pin 3, 5V-tolerant I/O with alternate function FSMC_A13. |+| 89 | PG4 | bidirectional | Port G pin 4, 5V-tolerant I/O with alternate function FSMC_A14. |+| 90 | PG5 | bidirectional | Port G pin 5, 5V-tolerant I/O with alternate function FSMC_A15. |+| 91 | PG6 | bidirectional | Port G pin 6, 5V-tolerant I/O with alternate function FSMC_INT2. |+| 92 | PG7 | bidirectional | Port G pin 7, 5V-tolerant I/O with alternate functions FSMC_INT3, USART6_CK. |+| 93 | PG8 | bidirectional | Port G pin 8, 5V-tolerant I/O with alternate functions USART6_RTS, ETH_PPS_OUT. |+| 94 | VSS | power_in | Ground supply (0 V reference). |+| 95 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. |+| 96 | PC6 | bidirectional | Port C pin 6, 5V-tolerant I/O with alternate functions I2S2_MCK, TIM8_CH1, SDIO_D6, USART6_TX, DCMI_D0, TIM3_CH1. |+| 97 | PC7 | bidirectional | Port C pin 7, 5V-tolerant I/O with alternate functions I2S3_MCK, TIM8_CH2, SDIO_D7, USART6_RX, DCMI_D1, TIM3_CH2. |+| 98 | PC8 | bidirectional | Port C pin 8, 5V-tolerant I/O with alternate functions TIM8_CH3, SDIO_D0, TIM3_CH3, USART6_CK, DCMI_D2. |+| 99 | PC9 | bidirectional | Port C pin 9, 5V-tolerant I/O with alternate functions I2S2_CKIN, I2S3_CKIN, MCO2, TIM8_CH4, SDIO_D1, I2C3_SDA, DCMI_D3, TIM3_CH4. |+| 100 | PA8 | bidirectional | Port A pin 8, 5V-tolerant I/O with alternate functions MCO1, USART1_CK, TIM1_CH1, I2C3_SCL, OTG_FS_SOF. |+| 101 | PA9 | bidirectional | Port A pin 9, 5V-tolerant I/O with alternate functions USART1_TX, TIM1_CH2, I2C3_SMBA, DCMI_D0 with additional function OTG_FS_VBUS. |+| 102 | PA10 | bidirectional | Port A pin 10, 5V-tolerant I/O with alternate functions USART1_RX, TIM1_CH3, OTG_FS_ID, DCMI_D1. |+| 103 | PA11 | bidirectional | Port A pin 11, 5V-tolerant I/O with alternate functions USART1_CTS, CAN1_RX, TIM1_CH4, OTG_FS_DM. |+| 104 | PA12 | bidirectional | Port A pin 12, 5V-tolerant I/O with alternate functions USART1_RTS, CAN1_TX, TIM1_ETR, OTG_FS_DP. |+| 105 | PA13 | bidirectional | |+| 106 | VCAP_2 | power_in | Internal voltage regulator capacitor pin, connect 2.2 µF ceramic capacitor to ground. |+| 107 | VSS | power_in | Ground supply (0 V reference). |+| 108 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. |+| 109 | PA14 | bidirectional | |+| 110 | PA15 | bidirectional | |+| 111 | PC10 | bidirectional | Port C pin 10, 5V-tolerant I/O with alternate functions SPI3_SCK, I2S3_SCK, UART4_TX, SDIO_D2, DCMI_D8, USART3_TX. |+| 112 | PC11 | bidirectional | Port C pin 11, 5V-tolerant I/O with alternate functions UART4_RX, SPI3_MISO, SDIO_D3, DCMI_D4, USART3_RX. |+| 113 | PC12 | bidirectional | Port C pin 12, 5V-tolerant I/O with alternate functions UART5_TX, SDIO_CK, DCMI_D9, SPI3_MOSI, I2S3_SD, USART3_CK. |+| 114 | PD0 | bidirectional | Port D pin 0, 5V-tolerant I/O with alternate functions FSMC_D2, CAN1_RX. |+| 115 | PD1 | bidirectional | Port D pin 1, 5V-tolerant I/O with alternate functions FSMC_D3, CAN1_TX. |+| 116 | PD2 | bidirectional | Port D pin 2, 5V-tolerant I/O with alternate functions TIM3_ETR, UART5_RX, SDIO_CMD, DCMI_D11. |+| 117 | PD3 | bidirectional | Port D pin 3, 5V-tolerant I/O with alternate functions FSMC_CLK, USART2_CTS. |+| 118 | PD4 | bidirectional | Port D pin 4, 5V-tolerant I/O with alternate functions FSMC_NOE, USART2_RTS. |+| 119 | PD5 | bidirectional | Port D pin 5, 5V-tolerant I/O with alternate functions FSMC_NWE, USART2_TX. |+| 120 | VSS | power_in | Ground supply (0 V reference). |+| 121 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. |+| 122 | PD6 | bidirectional | Port D pin 6, 5V-tolerant I/O with alternate functions FSMC_NWAIT, USART2_RX. |+| 123 | PD7 | bidirectional | |+| 124 | PG9 | bidirectional | |+| 125 | PG10 | bidirectional | |+| 126 | PG11 | bidirectional | |+| 127 | PG12 | bidirectional | |+| 128 | PG13 | bidirectional | |+| 129 | PG14 | bidirectional | | | 130 | VSS | power_in | Ground supply (0 V reference). | | 131 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. |-| 132 | PA14/JTCK-SWCLK | bidirectional | Port A pin 14, JTAG TCK or serial wire debug clock pin, 5V-tolerant I/O with JTCK-SWCLK function. |-| 133 | PA15/JTDI | bidirectional | Port A pin 15, JTAG TDI or GPIO pin, 5V-tolerant I/O with alternate functions JTDI, SPI3_NSS, I2S3_WS, TIM2_CH1_ETR, SPI1_NSS. |-| 134 | PC10 | bidirectional | Port C pin 10, 5V-tolerant I/O with alternate functions SPI3_SCK, I2S3_SCK, UART4_TX, SDIO_D2, DCMI_D8, USART3_TX. |-| 135 | PC11 | bidirectional | Port C pin 11, 5V-tolerant I/O with alternate functions UART4_RX, SPI3_MISO, SDIO_D3, DCMI_D4, USART3_RX. |-| 136 | PC12 | bidirectional | Port C pin 12, 5V-tolerant I/O with alternate functions UART5_TX, SDIO_CK, DCMI_D9, SPI3_MOSI, I2S3_SD, USART3_CK. |-| 137 | PD0 | bidirectional | Port D pin 0, 5V-tolerant I/O with alternate functions FSMC_D2, CAN1_RX. |-| 138 | PD1 | bidirectional | Port D pin 1, 5V-tolerant I/O with alternate functions FSMC_D3, CAN1_TX. |-| 139 | PD2 | bidirectional | Port D pin 2, 5V-tolerant I/O with alternate functions TIM3_ETR, UART5_RX, SDIO_CMD, DCMI_D11. |-| 140 | PD3 | bidirectional | Port D pin 3, 5V-tolerant I/O with alternate functions FSMC_CLK, USART2_CTS. |-| 141 | PD4 | bidirectional | Port D pin 4, 5V-tolerant I/O with alternate functions FSMC_NOE, USART2_RTS. |-| 142 | PD5 | bidirectional | Port D pin 5, 5V-tolerant I/O with alternate functions FSMC_NWE, USART2_TX. |-| 143 | VSS | power_in | Ground supply (0 V reference). |-| 144 | PD6 | bidirectional | Port D pin 6, 5V-tolerant I/O with alternate functions FSMC_NWAIT, USART2_RX. |+| 132 | PG15 | bidirectional | |+| 133 | PB3 | bidirectional | |+| 134 | PB4 | bidirectional | |+| 135 | PB5 | bidirectional | |+| 136 | PB6 | bidirectional | |+| 137 | PB7 | bidirectional | |+| 138 | BOOT0 | input | |+| 139 | PB8 | bidirectional | |+| 140 | PB9 | bidirectional | |+| 141 | PE0 | bidirectional | |+| 142 | PE1 | bidirectional | |+| 143 | RFU | power_in | |+| 144 | VDD | power_in | Main digital supply, 1.8 to 3.6 V. | ## Key specifications
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name="PG15" x="17.78" y="58.42" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@8" x="17.78" y="55.88" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@5" x="17.78" y="53.34" length="middle" direction="pwr" rot="R180"/>+ <pin name="PG14" x="17.78" y="50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PG13" x="17.78" y="48.26" length="middle" direction="io" rot="R180"/>+ <pin name="PG12" x="17.78" y="45.72" length="middle" direction="io" rot="R180"/>+ <pin name="PG11" x="17.78" y="43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PG10" x="17.78" y="40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PG9" x="17.78" y="38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PD7" x="17.78" y="35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PD6" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@9" x="17.78" y="30.48" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@6" x="17.78" y="27.94" length="middle" direction="pwr" rot="R180"/>+ <pin name="PD5" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PD4" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PD3" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PD2" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PD1" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PD0" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>+ <pin name="PA15" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+ <pin name="PA14" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@10" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@7" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+ <pin name="VCAP_2" x="17.78" y="-7.62" length="middle" direction="pwr" rot="R180"/>+ <pin name="PA13" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PA12" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PA11" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PA10" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PA9" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PA8" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PC9" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PC8" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PC7" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PC6" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@11" x="17.78" y="-35.56" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@8" x="17.78" y="-38.1" length="middle" direction="pwr" rot="R180"/>+ <pin name="PG8" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PG7" x="17.78" y="-43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PG6" x="17.78" y="-45.72" length="middle" direction="io" rot="R180"/>+ <pin name="PG5" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>+ <pin name="PG4" x="17.78" y="-50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PG3" x="17.78" y="-53.34" length="middle" direction="io" rot="R180"/>+ <pin name="PG2" x="17.78" y="-55.88" length="middle" direction="io" rot="R180"/>+ <pin name="PD15" x="17.78" y="-58.42" length="middle" direction="io" rot="R180"/>+ <pin name="PD14" x="17.78" y="-60.96" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@12" x="17.78" y="-63.5" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@9" x="17.78" y="-66.04" length="middle" direction="pwr" rot="R180"/>+ <pin name="PD13" x="17.78" y="-68.58" length="middle" direction="io" rot="R180"/>+ <pin name="PD12" x="17.78" y="-71.12" length="middle" direction="io" rot="R180"/>+ <pin name="PD11" x="17.78" y="-73.66" length="middle" direction="io" rot="R180"/>+ <pin name="PD10" x="17.78" y="-76.2" length="middle" direction="io" rot="R180"/>+ <pin name="PD9" x="17.78" y="-78.74" length="middle" direction="io" rot="R180"/>+ <pin name="PD8" x="17.78" y="-81.28" length="middle" direction="io" rot="R180"/>+ <pin name="PB15" x="17.78" y="-83.82" length="middle" direction="io" rot="R180"/>+ <pin name="PB14" x="17.78" y="-86.36" length="middle" direction="io" rot="R180"/>+ <pin name="PB13" x="17.78" y="-88.9" length="middle" direction="io" rot="R180"/>+ <pin name="PB12" x="17.78" y="-91.44" length="middle" direction="io" rot="R180"/> </symbol> </symbols> <devicesets> <deviceset name="STM32F205ZET6" prefix="U">- <description></description>+ <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data</description> <gates> <gate name="G$1" symbol="STM32F205ZET6" x="0" y="0"/> </gates>@@ -392,8 +393,8 @@ <connect gate="G$1" pin="PE6" pad="5"/> <connect gate="G$1" pin="VBAT" pad="6"/> <connect gate="G$1" pin="PC13" pad="7"/>- <connect gate="G$1" pin="PC14/OSC32_IN" pad="8"/>- <connect gate="G$1" pin="PC15/OSC32_OUT" pad="9"/>+ <connect gate="G$1" pin="PC14-OSC32_IN" pad="8"/>+ <connect gate="G$1" pin="PC15-OSC32_OUT" pad="9"/> <connect gate="G$1" pin="PF0" pad="10"/> <connect gate="G$1" pin="PF1" pad="11"/> <connect gate="G$1" pin="PF2" pad="12"/>@@ -407,8 +408,8 @@ <connect gate="G$1" pin="PF8" pad="20"/> <connect gate="G$1" pin="PF9" pad="21"/> <connect gate="G$1" pin="PF10" pad="22"/>- <connect gate="G$1" pin="PH0/OSC_IN" pad="23"/>- <connect gate="G$1" pin="PH1/OSC_OUT" pad="24"/>+ <connect gate="G$1" pin="PH0-OSC_IN" pad="23"/>+ <connect gate="G$1" pin="PH1-OSC_OUT" pad="24"/> <connect gate="G$1" pin="NRST" pad="25"/> <connect gate="G$1" pin="PC0" pad="26"/> <connect gate="G$1" pin="PC1" pad="27"/>@@ -416,121 +417,131 @@ <connect gate="G$1" pin="PC3" pad="29"/> <connect gate="G$1" pin="VDD@2" pad="30"/> <connect gate="G$1" pin="VSSA" pad="31"/>- <connect gate="G$1" pin="VREF-" pad="32"/>- <connect gate="G$1" pin="VREF+" pad="33"/>- <connect gate="G$1" pin="VDDA" pad="34"/>- <connect gate="G$1" pin="PA0/WKUP" pad="35"/>- <connect gate="G$1" pin="PA1" pad="36"/>- <connect gate="G$1" pin="PA2" pad="37"/>- <connect gate="G$1" pin="PH2" pad="38"/>- <connect gate="G$1" pin="PH3" pad="39"/>- <connect gate="G$1" pin="PH4" pad="40"/>- <connect gate="G$1" pin="PH5" pad="41"/>- <connect gate="G$1" pin="PA3" pad="42"/>- <connect gate="G$1" pin="VSS@2" pad="43"/>- <connect gate="G$1" pin="VDD@3" pad="44"/>- <connect gate="G$1" pin="PA4" pad="45"/>- <connect gate="G$1" pin="PA5" pad="46"/>- <connect gate="G$1" pin="PA6" pad="47"/>- <connect gate="G$1" pin="PA7" pad="48"/>- <connect gate="G$1" pin="PC4" pad="49"/>- <connect gate="G$1" pin="PC5" pad="50"/>- <connect gate="G$1" pin="PB0" pad="51"/>- <connect gate="G$1" pin="PB1" pad="52"/>- <connect gate="G$1" pin="PB2/BOOT1" pad="53"/>- <connect gate="G$1" pin="PF11" pad="54"/>- <connect gate="G$1" pin="PF12" pad="55"/>- <connect gate="G$1" pin="VSS@3" pad="56"/>- <connect gate="G$1" pin="VDD@4" pad="57"/>- <connect gate="G$1" pin="PF13" pad="58"/>- <connect gate="G$1" pin="PF14" pad="59"/>- <connect gate="G$1" pin="PF15" pad="60"/>- <connect gate="G$1" pin="PG0" pad="61"/>- <connect gate="G$1" pin="PG1" pad="62"/>- <connect gate="G$1" pin="PE7" pad="63"/>- <connect gate="G$1" pin="PE8" pad="64"/>- <connect gate="G$1" pin="PE9" pad="65"/>- <connect gate="G$1" pin="VSS@4" pad="66"/>- <connect gate="G$1" pin="VDD@5" pad="67"/>- <connect gate="G$1" pin="PE10" pad="68"/>- <connect gate="G$1" pin="PE11" pad="69"/>- <connect gate="G$1" pin="PE12" pad="70"/>- <connect gate="G$1" pin="PE13" pad="71"/>- <connect gate="G$1" pin="PE14" pad="72"/>- <connect gate="G$1" pin="PD6" pad="144"/>- <connect gate="G$1" pin="VSS@5" pad="143"/>- <connect gate="G$1" pin="PD5" pad="142"/>- <connect gate="G$1" pin="PD4" pad="141"/>- <connect gate="G$1" pin="PD3" pad="140"/>- <connect gate="G$1" pin="PD2" pad="139"/>- <connect gate="G$1" pin="PD1" pad="138"/>- <connect gate="G$1" pin="PD0" pad="137"/>- <connect gate="G$1" pin="PC12" pad="136"/>- <connect gate="G$1" pin="PC11" pad="135"/>- <connect gate="G$1" pin="PC10" pad="134"/>- <connect gate="G$1" pin="PA15/JTDI" pad="133"/>- <connect gate="G$1" pin="PA14/JTCK-SWCLK" pad="132"/>- <connect gate="G$1" pin="VDD@6" pad="131"/>- <connect gate="G$1" pin="VSS@6" pad="130"/>- <connect gate="G$1" pin="PI3" pad="129"/>- <connect gate="G$1" pin="PI2" pad="128"/>- <connect gate="G$1" pin="PI1" pad="127"/>- <connect gate="G$1" pin="PI0" pad="126"/>- <connect gate="G$1" pin="PH15" pad="125"/>- <connect gate="G$1" pin="PH14" pad="124"/>- <connect gate="G$1" pin="PH13" pad="123"/>- <connect gate="G$1" pin="VDD@7" pad="122"/>- <connect gate="G$1" pin="VSS@7" pad="121"/>- <connect gate="G$1" pin="VCAP_2" pad="120"/>- <connect gate="G$1" pin="PA13/JTMS-SWDIO" pad="119"/>- <connect gate="G$1" pin="PA12" pad="118"/>- <connect gate="G$1" pin="PA11" pad="117"/>- <connect gate="G$1" pin="PA10" pad="116"/>- <connect gate="G$1" pin="PA9" pad="115"/>- <connect gate="G$1" pin="PA8" pad="114"/>- <connect gate="G$1" pin="PC9" pad="113"/>- <connect gate="G$1" pin="PC8" pad="112"/>- <connect gate="G$1" pin="PC7" pad="111"/>- <connect gate="G$1" pin="PC6" pad="110"/>- <connect gate="G$1" pin="VDD@8" pad="109"/>- <connect gate="G$1" pin="VSS@8" pad="108"/>- <connect gate="G$1" pin="PG8" pad="107"/>- <connect gate="G$1" pin="PG7" pad="106"/>- <connect gate="G$1" pin="PG6" pad="105"/>- <connect gate="G$1" pin="PG5" pad="104"/>- <connect gate="G$1" pin="PG4" pad="103"/>- <connect gate="G$1" pin="PG3" pad="102"/>- <connect gate="G$1" pin="PG2" pad="101"/>- <connect gate="G$1" pin="PD15" pad="100"/>- <connect gate="G$1" pin="PD14" pad="99"/>- <connect gate="G$1" pin="VDD@9" pad="98"/>- <connect gate="G$1" pin="VSS@9" pad="97"/>- <connect gate="G$1" pin="PD13" pad="96"/>- <connect gate="G$1" pin="PD12" pad="95"/>- <connect gate="G$1" pin="PD11" pad="94"/>- <connect gate="G$1" pin="PD10" pad="93"/>- <connect gate="G$1" pin="PD9" pad="92"/>- <connect gate="G$1" pin="PD8" pad="91"/>- <connect gate="G$1" pin="PB15" pad="90"/>- <connect gate="G$1" pin="PB14" pad="89"/>- <connect gate="G$1" pin="PB13" pad="88"/>- <connect gate="G$1" pin="PB12" pad="87"/>- <connect gate="G$1" pin="VDD@10" pad="86"/>- <connect gate="G$1" pin="VSS@10" pad="85"/>- <connect gate="G$1" pin="PH12" pad="84"/>- <connect gate="G$1" pin="PH11" pad="83"/>- <connect gate="G$1" pin="PH10" pad="82"/>- <connect gate="G$1" pin="PH9" pad="81"/>- <connect gate="G$1" pin="PH8" pad="80"/>- <connect gate="G$1" pin="PH7" pad="79"/>- <connect gate="G$1" pin="PH6" pad="78"/>- <connect gate="G$1" pin="VDD@11" pad="77"/>- <connect gate="G$1" pin="VCAP_1" pad="76"/>- <connect gate="G$1" pin="PB11" pad="75"/>- <connect gate="G$1" pin="PB10" pad="74"/>- <connect gate="G$1" pin="PE15" pad="73"/>+ <connect gate="G$1" pin="VREF+" pad="32"/>+ <connect gate="G$1" pin="VDDA" pad="33"/>+ <connect gate="G$1" pin="PA0-WKUP" pad="34"/>+ <connect gate="G$1" pin="PA1" pad="35"/>+ <connect gate="G$1" pin="PA2" pad="36"/>+ <connect gate="G$1" pin="PA3" pad="37"/>+ <connect gate="G$1" pin="VSS@2" pad="38"/>+ <connect gate="G$1" pin="VDD@3" pad="39"/>+ <connect gate="G$1" pin="PA4" pad="40"/>+ <connect gate="G$1" pin="PA5" pad="41"/>+ <connect gate="G$1" pin="PA6" pad="42"/>+ <connect gate="G$1" pin="PA7" pad="43"/>+ <connect gate="G$1" pin="PC4" pad="44"/>+ <connect gate="G$1" pin="PC5" pad="45"/>+ <connect gate="G$1" pin="PB0" pad="46"/>+ <connect gate="G$1" pin="PB1" pad="47"/>+ <connect gate="G$1" pin="PB2" pad="48"/>+ <connect gate="G$1" pin="PF11" pad="49"/>+ <connect gate="G$1" pin="PF12" pad="50"/>+ <connect gate="G$1" pin="VSS@3" pad="51"/>+ <connect gate="G$1" pin="VDD@4" pad="52"/>+ <connect gate="G$1" pin="PF13" pad="53"/>+ <connect gate="G$1" pin="PF14" pad="54"/>+ <connect gate="G$1" pin="PF15" pad="55"/>+ <connect gate="G$1" pin="PG0" pad="56"/>+ <connect gate="G$1" pin="PG1" pad="57"/>+ <connect gate="G$1" pin="PE7" pad="58"/>+ <connect gate="G$1" pin="PE8" pad="59"/>+ <connect gate="G$1" pin="PE9" pad="60"/>+ <connect gate="G$1" pin="VSS@4" pad="61"/>+ <connect gate="G$1" pin="VDD@5" pad="62"/>+ <connect gate="G$1" pin="PE10" pad="63"/>+ <connect gate="G$1" pin="PE11" pad="64"/>+ <connect gate="G$1" pin="PE12" pad="65"/>+ <connect gate="G$1" pin="PE13" pad="66"/>+ <connect gate="G$1" pin="PE14" pad="67"/>+ <connect gate="G$1" pin="PE15" pad="68"/>+ <connect gate="G$1" pin="PB10" pad="69"/>+ <connect gate="G$1" pin="PB11" pad="70"/>+ <connect gate="G$1" pin="VCAP_1" pad="71"/>+ <connect gate="G$1" pin="VDD@6" pad="72"/>+ <connect gate="G$1" pin="VDD@7" pad="144"/>+ <connect gate="G$1" pin="RFU" pad="143"/>+ <connect gate="G$1" pin="PE1" pad="142"/>+ <connect gate="G$1" pin="PE0" pad="141"/>+ <connect gate="G$1" pin="PB9" pad="140"/>+ <connect gate="G$1" pin="PB8" pad="139"/>+ <connect gate="G$1" pin="BOOT0" pad="138"/>+ <connect gate="G$1" pin="PB7" pad="137"/>+ <connect gate="G$1" pin="PB6" pad="136"/>+ <connect gate="G$1" pin="PB5" pad="135"/>+ <connect gate="G$1" pin="PB4" pad="134"/>+ <connect gate="G$1" pin="PB3" pad="133"/>+ <connect gate="G$1" pin="PG15" pad="132"/>+ <connect gate="G$1" pin="VDD@8" pad="131"/>+ <connect gate="G$1" pin="VSS@5" pad="130"/>+ <connect gate="G$1" pin="PG14" pad="129"/>+ <connect gate="G$1" pin="PG13" pad="128"/>+ <connect gate="G$1" pin="PG12" pad="127"/>+ <connect gate="G$1" pin="PG11" pad="126"/>+ <connect gate="G$1" pin="PG10" pad="125"/>+ <connect gate="G$1" pin="PG9" pad="124"/>+ <connect gate="G$1" pin="PD7" pad="123"/>+ <connect gate="G$1" pin="PD6" pad="122"/>+ <connect gate="G$1" pin="VDD@9" pad="121"/>+ <connect gate="G$1" pin="VSS@6" pad="120"/>+ <connect gate="G$1" pin="PD5" pad="119"/>+ <connect gate="G$1" pin="PD4" pad="118"/>+ <connect gate="G$1" pin="PD3" pad="117"/>+ <connect gate="G$1" pin="PD2" pad="116"/>+ <connect gate="G$1" pin="PD1" pad="115"/>+ <connect gate="G$1" pin="PD0" pad="114"/>+ <connect gate="G$1" pin="PC12" pad="113"/>+ <connect gate="G$1" pin="PC11" pad="112"/>+ <connect gate="G$1" pin="PC10" pad="111"/>+ <connect gate="G$1" pin="PA15" pad="110"/>+ <connect gate="G$1" pin="PA14" pad="109"/>+ <connect gate="G$1" pin="VDD@10" pad="108"/>+ <connect gate="G$1" pin="VSS@7" pad="107"/>+ <connect gate="G$1" pin="VCAP_2" pad="106"/>+ <connect gate="G$1" pin="PA13" pad="105"/>+ <connect gate="G$1" pin="PA12" pad="104"/>+ <connect gate="G$1" pin="PA11" pad="103"/>+ <connect gate="G$1" pin="PA10" pad="102"/>+ <connect gate="G$1" pin="PA9" pad="101"/>+ <connect gate="G$1" pin="PA8" pad="100"/>+ <connect gate="G$1" pin="PC9" pad="99"/>+ <connect gate="G$1" pin="PC8" pad="98"/>+ <connect gate="G$1" pin="PC7" pad="97"/>+ <connect gate="G$1" pin="PC6" pad="96"/>+ <connect gate="G$1" pin="VDD@11" pad="95"/>+ <connect gate="G$1" pin="VSS@8" pad="94"/>+ <connect gate="G$1" pin="PG8" pad="93"/>+ <connect gate="G$1" pin="PG7" pad="92"/>+ <connect gate="G$1" pin="PG6" pad="91"/>+ <connect gate="G$1" pin="PG5" pad="90"/>+ <connect gate="G$1" pin="PG4" pad="89"/>+ <connect gate="G$1" pin="PG3" pad="88"/>+ <connect gate="G$1" pin="PG2" pad="87"/>+ <connect gate="G$1" pin="PD15" pad="86"/>+ <connect gate="G$1" pin="PD14" pad="85"/>+ <connect gate="G$1" pin="VDD@12" pad="84"/>+ <connect gate="G$1" pin="VSS@9" pad="83"/>+ <connect gate="G$1" pin="PD13" pad="82"/>+ <connect gate="G$1" pin="PD12" pad="81"/>+ <connect gate="G$1" pin="PD11" pad="80"/>+ <connect gate="G$1" pin="PD10" pad="79"/>+ <connect gate="G$1" pin="PD9" pad="78"/>+ <connect gate="G$1" pin="PD8" pad="77"/>+ <connect gate="G$1" pin="PB15" pad="76"/>+ <connect gate="G$1" pin="PB14" pad="75"/>+ <connect gate="G$1" pin="PB13" pad="74"/>+ <connect gate="G$1" pin="PB12" pad="73"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="STM32F205ZET6" constant="no"/>+ <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+ <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586181773314809856" constant="no"/>+ <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/stm32f205zet6" constant="no"/>+ <attribute name="MOUSER_PN" value="511-STM32F205ZET6" constant="no"/>+ <attribute name="DIGIKEY_PN" value="497-11164-ND" constant="no"/>+ <attribute name="LCSC_PN" value="C46197" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>