component
STM32F103VET6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
← Commit history
Publish 0.1.1
5 files changed
+527−474
README.md+98−92@@ -8,100 +8,106 @@ STM32F103VET6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin desc | Pin | Name | Type | Function | |---|---|---|---|-| 1 | PE2 | output | Port E pin 2; TRACECK/FSMC_A23 alternate function available |-| 2 | PE3 | output | Port E pin 3; TRACED0/FSMC_A19 alternate function available |-| 3 | PE4 | output | Port E pin 4; TRACED1/FSMC_A20 alternate function available |-| 4 | PE5 | output | Port E pin 5; TRACED2/FSMC_A21 alternate function available |-| 5 | PE6 | output | Port E pin 6; TRACED3/FSMC_A22 alternate function available |+| 1 | PE2 | bidirectional | Port E pin 2; TRACECK/FSMC_A23 alternate function available |+| 2 | PE3 | bidirectional | Port E pin 3; TRACED0/FSMC_A19 alternate function available |+| 3 | PE4 | bidirectional | Port E pin 4; TRACED1/FSMC_A20 alternate function available |+| 4 | PE5 | bidirectional | Port E pin 5; TRACED2/FSMC_A21 alternate function available |+| 5 | PE6 | bidirectional | Port E pin 6; TRACED3/FSMC_A22 alternate function available | | 6 | VBAT | power_in | Backup battery power supply for RTC and backup registers (1.8-3.6 V) | | 7 | PC13-TAMPER-RTC | bidirectional | Port C pin 13; TAMPER/RTC alternate function; supplied through power switch with 3 mA limit |-| 8 | PC14-OSC32_IN | input | Port C pin 14; external 32 kHz oscillator input; supplied through power switch |-| 9 | PC15-OSC32_OUT | output | Port C pin 15; external 32 kHz oscillator output; supplied through power switch |-| 10 | VSS_5 | power_in | Ground (VSS) connection |-| 11 | VDD_5 | power_in | VDD power supply (2.0-3.6 V) |-| 12 | PF6 | output | Port F pin 6; ADC3_IN4/FSMC_NIORD alternate functions |-| 13 | PF7 | output | Port F pin 7; ADC3_IN5/FSMC_NREG alternate functions |-| 14 | PF8 | output | Port F pin 8; ADC3_IN6/FSMC_NIOWR alternate functions |-| 15 | PF9 | output | Port F pin 9; ADC3_IN7/FSMC_CD alternate functions |-| 16 | PF10 | output | Port F pin 10; ADC3_IN8/FSMC_INTR alternate functions |-| 23 | OSC_IN | input | External oscillator input for 4-16 MHz crystal (HSE clock input) |-| 24 | OSC_OUT | output | External oscillator output for 4-16 MHz crystal |-| 25 | NRST | input | System reset pin with integrated pull-up and Schmitt trigger; external filter recommended |-| 26 | PC0 | bidirectional | Port C pin 0; ADC123_IN10 alternate function available |-| 27 | PC1 | bidirectional | Port C pin 1; ADC123_IN11 alternate function available |-| 28 | PC2 | bidirectional | Port C pin 2; ADC123_IN12 alternate function available |-| 29 | PC3 | bidirectional | Port C pin 3; ADC123_IN13 alternate function available |-| 30 | VSSA | power_in | Analog ground (VSSA) for ADC, DAC, reset blocks, internal RC oscillators and PLL |-| 31 | VREF- | passive | Negative reference voltage input for ADC (0 V nominal, tied to VSSA) |-| 32 | VREF+ | power_in | Positive reference voltage input for ADC (2.4-3.6 V, can be tied to VDDA) |-| 33 | VDDA | power_in | Analog power supply (2.4-3.6 V); must not differ from VDD by more than 300 mV |-| 34 | PA0-WKUP | bidirectional | Port A pin 0; wakeup pin from low-power modes; can be used for USART2_CTS, ADC123_IN0, or TIM2_CH1_ETR alternate functions |-| 35 | PA1 | bidirectional | Port A pin 1; can be used for USART2_RTS, ADC123_IN1, or TIM2_CH2 alternate functions |-| 36 | PA2 | bidirectional | Port A pin 2; can be used for USART2_TX, ADC123_IN2, or TIM2_CH3 alternate functions |-| 37 | PA3 | bidirectional | Port A pin 3; can be used for USART2_RX, ADC123_IN3, or TIM2_CH4 alternate functions |-| 38 | VSS_4 | power_in | Ground (VSS) connection |-| 39 | VDD_4 | power_in | VDD power supply (2.0-3.6 V) |-| 40 | PA4 | bidirectional | Port A pin 4; can be used for SPI1_NSS, USART2_CK, DAC_OUT1, or ADC12_IN4 alternate functions |-| 41 | PA5 | bidirectional | Port A pin 5; can be used for SPI1_SCK, DAC_OUT2, or ADC12_IN5 alternate functions |-| 42 | PA6 | bidirectional | Port A pin 6; can be used for SPI1_MISO, TIM8_BKIN, ADC12_IN6, or TIM3_CH1 alternate functions |-| 43 | PA7 | bidirectional | Port A pin 7; can be used for SPI1_MOSI, TIM8_CH1N, ADC12_IN7, or TIM3_CH2 alternate functions |-| 44 | PC4 | bidirectional | Port C pin 4; ADC12_IN14 alternate function available |-| 45 | PC5 | bidirectional | Port C pin 5; ADC12_IN15 alternate function available |-| 46 | PB0 | bidirectional | Port B pin 0; can be used for ADC12_IN8, TIM3_CH3, or TIM8_CH2N alternate functions |-| 47 | PB1 | bidirectional | Port B pin 1; can be used for ADC12_IN9, TIM3_CH4, or TIM8_CH3N alternate functions |-| 48 | PB2/BOOT1 | bidirectional | Port B pin 2; boot configuration pin; 5V-tolerant input |-| 49 | PE7 | output | Port E pin 7; FSMC_D4 or TIM1_ETR alternate functions; 5V-tolerant |-| 50 | PE8 | output | Port E pin 8; FSMC_D5 or TIM1_CH1N alternate functions; 5V-tolerant |-| 51 | PE9 | output | Port E pin 9; FSMC_D6 or TIM1_CH1 alternate functions; 5V-tolerant |-| 52 | PE10 | output | Port E pin 10; FSMC_D7 or TIM1_CH2N alternate functions; 5V-tolerant |-| 53 | PE11 | output | Port E pin 11; FSMC_D8 or TIM1_CH2 alternate functions; 5V-tolerant |-| 54 | PE12 | output | Port E pin 12; FSMC_D9 or TIM1_CH3N alternate functions; 5V-tolerant |-| 55 | PE13 | output | Port E pin 13; FSMC_D10 or TIM1_CH3 alternate functions; 5V-tolerant |-| 56 | PE14 | output | Port E pin 14; FSMC_D11 or TIM1_CH4 alternate functions; 5V-tolerant |-| 57 | PE15 | output | Port E pin 15; FSMC_D12 or TIM1_BKIN alternate functions; 5V-tolerant |-| 58 | PB10 | output | Port B pin 10; I2C2_SCL, USART3_TX, or TIM2_CH3 alternate functions; 5V-tolerant |-| 59 | PB11 | output | Port B pin 11; I2C2_SDA, USART3_RX, or TIM2_CH4 alternate functions; 5V-tolerant |-| 60 | VSS_1 | power_in | Ground (VSS) connection |-| 61 | VDD_1 | power_in | VDD power supply (2.0-3.6 V) |-| 62 | PB12 | output | Port B pin 12; SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, or TIM1_BKIN alternate functions; 5V-tolerant |-| 63 | PB13 | output | Port B pin 13; SPI2_SCK, I2S2_CK, USART3_CTS, or TIM1_CH1N alternate functions; 5V-tolerant |-| 64 | PB14 | output | Port B pin 14; SPI2_MISO, TIM1_CH2N, or USART3_RTS alternate functions; 5V-tolerant |-| 65 | PB15 | output | Port B pin 15; SPI2_MOSI, I2S2_SD, TIM1_CH3N alternate functions; 5V-tolerant |-| 66 | PD8 | output | Port D pin 8; FSMC_D13 or USART3_TX alternate functions; 5V-tolerant |-| 67 | PD9 | output | Port D pin 9; FSMC_D14 or USART3_RX alternate functions; 5V-tolerant |-| 68 | PD10 | output | Port D pin 10; FSMC_D15 or USART3_CK alternate functions; 5V-tolerant |-| 69 | PD11 | output | Port D pin 11; FSMC_A16 or USART3_CTS alternate functions; 5V-tolerant |-| 70 | PD12 | output | Port D pin 12; FSMC_A17, TIM4_CH1, or USART3_RTS alternate functions; 5V-tolerant |-| 71 | PD13 | output | Port D pin 13; FSMC_A18 or TIM4_CH2 alternate functions; 5V-tolerant |-| 72 | PD14 | output | Port D pin 14; FSMC_D0 or TIM4_CH3 alternate functions; 5V-tolerant |-| 73 | PD15 | output | Port D pin 15; FSMC_D1 or TIM4_CH4 alternate functions; 5V-tolerant |-| 74 | PC6 | output | Port C pin 6; I2S2_MCK, TIM8_CH1, SDIO_D6, or TIM3_CH1 alternate functions; 5V-tolerant |-| 75 | PC7 | output | Port C pin 7; I2S3_MCK, TIM8_CH2, SDIO_D7, or TIM3_CH2 alternate functions; 5V-tolerant |-| 76 | PC8 | output | Port C pin 8; TIM8_CH3, SDIO_D0, or TIM3_CH3 alternate functions; 5V-tolerant |-| 77 | PC9 | output | Port C pin 9; TIM8_CH4, SDIO_D1, or TIM3_CH4 alternate functions; 5V-tolerant |-| 78 | PA8 | output | Port A pin 8; USART1_CK, TIM1_CH1, or MCO alternate functions; 5V-tolerant |-| 79 | PA9 | output | Port A pin 9; USART1_TX or TIM1_CH2 alternate functions; 5V-tolerant |-| 80 | PA10 | output | Port A pin 10; USART1_RX or TIM1_CH3 alternate functions; 5V-tolerant |-| 81 | PA11 | output | Port A pin 11; USART1_CTS, USB_DM, CAN_RX, or TIM1_CH4 alternate functions; 5V-tolerant |-| 82 | PA12 | output | Port A pin 12; USART1_RTS, USB_DP, CAN_TX, or TIM1_ETR alternate functions; 5V-tolerant |-| 83 | PA13 | bidirectional | JTMS/SWDIO pin for JTAG debug and serial wire debug interfaces; 5V-tolerant |-| 84 | VSS_2 | power_in | Ground (VSS) connection |-| 85 | VDD_2 | power_in | VDD power supply (2.0-3.6 V) |-| 86 | PA14 | bidirectional | JTCK/SWCLK pin for JTAG debug and serial wire debug interfaces; 5V-tolerant |-| 87 | PA15 | bidirectional | JTDI pin; can be used for SPI3_NSS, I2S3_WS, or TIM2_CH1_ETR alternate functions; 5V-tolerant |-| 88 | PC10 | output | Port C pin 10; UART4_TX, SDIO_D2, or USART3_TX alternate functions; 5V-tolerant |-| 89 | PC11 | output | Port C pin 11; UART4_RX, SDIO_D3, or USART3_RX alternate functions; 5V-tolerant |-| 90 | PC12 | output | Port C pin 12; UART5_TX, SDIO_CK, or USART3_CK alternate functions; 5V-tolerant |-| 91 | PD0 | bidirectional | Port D pin 0; OSC_IN, FSMC_D2, or CAN_RX alternate functions; 5V-tolerant |-| 92 | PD1 | bidirectional | Port D pin 1; OSC_OUT, FSMC_D3, or CAN_TX alternate functions; 5V-tolerant |-| 93 | PD2 | output | Port D pin 2; TIM3_ETR, UART5_RX, or SDIO_CMD alternate functions; 5V-tolerant |-| 94 | PD3 | output | Port D pin 3; FSMC_CLK or USART2_CTS alternate functions; 5V-tolerant |-| 95 | PD4 | output | Port D pin 4; FSMC_NOE or USART2_RTS alternate functions; 5V-tolerant |-| 96 | PD5 | output | Port D pin 5; FSMC_NWE or USART2_TX alternate functions; 5V-tolerant |-| 97 | PD6 | output | Port D pin 6; FSMC_NWAIT or USART2_RX alternate functions; 5V-tolerant |-| 98 | PD7 | output | Port D pin 7; FSMC_NE1/FSMC_NCE2 or USART2_CK alternate functions; 5V-tolerant |-| 99 | VSS_3 | power_in | Ground (VSS) connection |-| 100 | VDD_3 | power_in | VDD power supply (2.0-3.6 V) |+| 8 | PC14-OSC32_IN | bidirectional | Port C pin 14; external 32 kHz oscillator input; supplied through power switch |+| 9 | PC15-OSC32_OUT | bidirectional | Port C pin 15; external 32 kHz oscillator output; supplied through power switch |+| 10 | VSS | power_in | |+| 11 | VDD | power_in | |+| 12 | OSC_IN | bidirectional | External oscillator input for 4-16 MHz crystal (HSE clock input) |+| 13 | OSC_OUT | bidirectional | External oscillator output for 4-16 MHz crystal |+| 14 | NRST | input | System reset pin with integrated pull-up and Schmitt trigger; external filter recommended |+| 15 | PC0 | bidirectional | Port C pin 0; ADC123_IN10 alternate function available |+| 16 | PC1 | bidirectional | Port C pin 1; ADC123_IN11 alternate function available |+| 17 | PC2 | bidirectional | Port C pin 2; ADC123_IN12 alternate function available |+| 18 | PC3 | bidirectional | Port C pin 3; ADC123_IN13 alternate function available |+| 19 | VSSA | power_in | Analog ground (VSSA) for ADC, DAC, reset blocks, internal RC oscillators and PLL |+| 20 | VREF- | power_in | Negative reference voltage input for ADC (0 V nominal, tied to VSSA) |+| 21 | VREF+ | power_in | Positive reference voltage input for ADC (2.4-3.6 V, can be tied to VDDA) |+| 22 | VDDA | power_in | Analog power supply (2.4-3.6 V); must not differ from VDD by more than 300 mV |+| 23 | PA0-WKUP | bidirectional | Port A pin 0; wakeup pin from low-power modes; can be used for USART2_CTS, ADC123_IN0, or TIM2_CH1_ETR alternate functions |+| 24 | PA1 | bidirectional | Port A pin 1; can be used for USART2_RTS, ADC123_IN1, or TIM2_CH2 alternate functions |+| 25 | PA2 | bidirectional | Port A pin 2; can be used for USART2_TX, ADC123_IN2, or TIM2_CH3 alternate functions |+| 26 | PA3 | bidirectional | Port A pin 3; can be used for USART2_RX, ADC123_IN3, or TIM2_CH4 alternate functions |+| 27 | VSS | power_in | |+| 28 | VDD | power_in | |+| 29 | PA4 | bidirectional | Port A pin 4; can be used for SPI1_NSS, USART2_CK, DAC_OUT1, or ADC12_IN4 alternate functions |+| 30 | PA5 | bidirectional | Port A pin 5; can be used for SPI1_SCK, DAC_OUT2, or ADC12_IN5 alternate functions |+| 31 | PA6 | bidirectional | Port A pin 6; can be used for SPI1_MISO, TIM8_BKIN, ADC12_IN6, or TIM3_CH1 alternate functions |+| 32 | PA7 | bidirectional | Port A pin 7; can be used for SPI1_MOSI, TIM8_CH1N, ADC12_IN7, or TIM3_CH2 alternate functions |+| 33 | PC4 | bidirectional | Port C pin 4; ADC12_IN14 alternate function available |+| 34 | PC5 | bidirectional | Port C pin 5; ADC12_IN15 alternate function available |+| 35 | PB0 | bidirectional | Port B pin 0; can be used for ADC12_IN8, TIM3_CH3, or TIM8_CH2N alternate functions |+| 36 | PB1 | bidirectional | Port B pin 1; can be used for ADC12_IN9, TIM3_CH4, or TIM8_CH3N alternate functions |+| 37 | PB2 | bidirectional | |+| 38 | PE7 | bidirectional | Port E pin 7; FSMC_D4 or TIM1_ETR alternate functions; 5V-tolerant |+| 39 | PE8 | bidirectional | Port E pin 8; FSMC_D5 or TIM1_CH1N alternate functions; 5V-tolerant |+| 40 | PE9 | bidirectional | Port E pin 9; FSMC_D6 or TIM1_CH1 alternate functions; 5V-tolerant |+| 41 | PE10 | bidirectional | Port E pin 10; FSMC_D7 or TIM1_CH2N alternate functions; 5V-tolerant |+| 42 | PE11 | bidirectional | Port E pin 11; FSMC_D8 or TIM1_CH2 alternate functions; 5V-tolerant |+| 43 | PE12 | bidirectional | Port E pin 12; FSMC_D9 or TIM1_CH3N alternate functions; 5V-tolerant |+| 44 | PE13 | bidirectional | Port E pin 13; FSMC_D10 or TIM1_CH3 alternate functions; 5V-tolerant |+| 45 | PE14 | bidirectional | Port E pin 14; FSMC_D11 or TIM1_CH4 alternate functions; 5V-tolerant |+| 46 | PE15 | bidirectional | Port E pin 15; FSMC_D12 or TIM1_BKIN alternate functions; 5V-tolerant |+| 47 | PB10 | bidirectional | Port B pin 10; I2C2_SCL, USART3_TX, or TIM2_CH3 alternate functions; 5V-tolerant |+| 48 | PB11 | bidirectional | Port B pin 11; I2C2_SDA, USART3_RX, or TIM2_CH4 alternate functions; 5V-tolerant |+| 49 | VSS | power_in | |+| 50 | VDD | power_in | |+| 51 | PB12 | bidirectional | Port B pin 12; SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, or TIM1_BKIN alternate functions; 5V-tolerant |+| 52 | PB13 | bidirectional | Port B pin 13; SPI2_SCK, I2S2_CK, USART3_CTS, or TIM1_CH1N alternate functions; 5V-tolerant |+| 53 | PB14 | bidirectional | Port B pin 14; SPI2_MISO, TIM1_CH2N, or USART3_RTS alternate functions; 5V-tolerant |+| 54 | PB15 | bidirectional | Port B pin 15; SPI2_MOSI, I2S2_SD, TIM1_CH3N alternate functions; 5V-tolerant |+| 55 | PD8 | bidirectional | Port D pin 8; FSMC_D13 or USART3_TX alternate functions; 5V-tolerant |+| 56 | PD9 | bidirectional | Port D pin 9; FSMC_D14 or USART3_RX alternate functions; 5V-tolerant |+| 57 | PD10 | bidirectional | Port D pin 10; FSMC_D15 or USART3_CK alternate functions; 5V-tolerant |+| 58 | PD11 | bidirectional | Port D pin 11; FSMC_A16 or USART3_CTS alternate functions; 5V-tolerant |+| 59 | PD12 | bidirectional | Port D pin 12; FSMC_A17, TIM4_CH1, or USART3_RTS alternate functions; 5V-tolerant |+| 60 | PD13 | bidirectional | Port D pin 13; FSMC_A18 or TIM4_CH2 alternate functions; 5V-tolerant |+| 61 | PD14 | bidirectional | Port D pin 14; FSMC_D0 or TIM4_CH3 alternate functions; 5V-tolerant |+| 62 | PD15 | bidirectional | Port D pin 15; FSMC_D1 or TIM4_CH4 alternate functions; 5V-tolerant |+| 63 | PC6 | bidirectional | Port C pin 6; I2S2_MCK, TIM8_CH1, SDIO_D6, or TIM3_CH1 alternate functions; 5V-tolerant |+| 64 | PC7 | bidirectional | Port C pin 7; I2S3_MCK, TIM8_CH2, SDIO_D7, or TIM3_CH2 alternate functions; 5V-tolerant |+| 65 | PC8 | bidirectional | Port C pin 8; TIM8_CH3, SDIO_D0, or TIM3_CH3 alternate functions; 5V-tolerant |+| 66 | PC9 | bidirectional | Port C pin 9; TIM8_CH4, SDIO_D1, or TIM3_CH4 alternate functions; 5V-tolerant |+| 67 | PA8 | bidirectional | Port A pin 8; USART1_CK, TIM1_CH1, or MCO alternate functions; 5V-tolerant |+| 68 | PA9 | bidirectional | Port A pin 9; USART1_TX or TIM1_CH2 alternate functions; 5V-tolerant |+| 69 | PA10 | bidirectional | Port A pin 10; USART1_RX or TIM1_CH3 alternate functions; 5V-tolerant |+| 70 | PA11 | bidirectional | Port A pin 11; USART1_CTS, USB_DM, CAN_RX, or TIM1_CH4 alternate functions; 5V-tolerant |+| 71 | PA12 | bidirectional | Port A pin 12; USART1_RTS, USB_DP, CAN_TX, or TIM1_ETR alternate functions; 5V-tolerant |+| 72 | PA13 | bidirectional | JTMS/SWDIO pin for JTAG debug and serial wire debug interfaces; 5V-tolerant |+| 73 | NC | unconnected | |+| 74 | VSS | power_in | |+| 75 | VDD | power_in | |+| 76 | PA14 | bidirectional | JTCK/SWCLK pin for JTAG debug and serial wire debug interfaces; 5V-tolerant |+| 77 | PA15 | bidirectional | JTDI pin; can be used for SPI3_NSS, I2S3_WS, or TIM2_CH1_ETR alternate functions; 5V-tolerant |+| 78 | PC10 | bidirectional | Port C pin 10; UART4_TX, SDIO_D2, or USART3_TX alternate functions; 5V-tolerant |+| 79 | PC11 | bidirectional | Port C pin 11; UART4_RX, SDIO_D3, or USART3_RX alternate functions; 5V-tolerant |+| 80 | PC12 | bidirectional | Port C pin 12; UART5_TX, SDIO_CK, or USART3_CK alternate functions; 5V-tolerant |+| 81 | PD0 | bidirectional | Port D pin 0; OSC_IN, FSMC_D2, or CAN_RX alternate functions; 5V-tolerant |+| 82 | PD1 | bidirectional | Port D pin 1; OSC_OUT, FSMC_D3, or CAN_TX alternate functions; 5V-tolerant |+| 83 | PD2 | bidirectional | Port D pin 2; TIM3_ETR, UART5_RX, or SDIO_CMD alternate functions; 5V-tolerant |+| 84 | PD3 | bidirectional | Port D pin 3; FSMC_CLK or USART2_CTS alternate functions; 5V-tolerant |+| 85 | PD4 | bidirectional | Port D pin 4; FSMC_NOE or USART2_RTS alternate functions; 5V-tolerant |+| 86 | PD5 | bidirectional | Port D pin 5; FSMC_NWE or USART2_TX alternate functions; 5V-tolerant |+| 87 | PD6 | bidirectional | Port D pin 6; FSMC_NWAIT or USART2_RX alternate functions; 5V-tolerant |+| 88 | PD7 | bidirectional | Port D pin 7; FSMC_NE1/FSMC_NCE2 or USART2_CK alternate functions; 5V-tolerant |+| 89 | PB3 | bidirectional | |+| 90 | PB4 | bidirectional | |+| 91 | PB5 | bidirectional | |+| 92 | PB6 | bidirectional | |+| 93 | PB7 | bidirectional | |+| 94 | BOOT0 | input | |+| 95 | PB8 | bidirectional | |+| 96 | PB9 | bidirectional | |+| 97 | PE0 | bidirectional | |+| 98 | PE1 | bidirectional | |+| 99 | VSS | power_in | |+| 100 | VDD | power_in | | ## Key specifications
package.json+2−2@@ -1,6 +1,6 @@ { "slug": "stm32f103vet6",- "version": "0.1.0",+ "version": "0.1.1", "type": "component", "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.", "tags": [@@ -649,4 +649,4 @@ "footprint": "viewers/footprint.html" } }-}+}
page.json+4−4@@ -4,7 +4,7 @@ "slug": "stm32f103vet6", "title": "STM32F103VET6", "brief": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.1.1", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -676,7 +676,7 @@ "viewers/symbol.html", "viewers/footprint.html" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "org": "adom" }
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length="middle" direction="io"/>+ <pin name="VSS@3" x="-17.78" y="-60.96" length="middle" direction="pwr"/>+ <pin name="VDD@3" x="-17.78" y="-63.5" length="middle" direction="pwr"/>+ <pin name="VDD@4" x="17.78" y="60.96" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@4" x="17.78" y="58.42" length="middle" direction="pwr" rot="R180"/>+ <pin name="PE1" x="17.78" y="55.88" length="middle" direction="io" rot="R180"/>+ <pin name="PE0" x="17.78" y="53.34" length="middle" direction="io" rot="R180"/>+ <pin name="PB9" x="17.78" y="50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PB8" x="17.78" y="48.26" length="middle" direction="io" rot="R180"/>+ <pin name="BOOT0" x="17.78" y="45.72" length="middle" direction="in" rot="R180"/>+ <pin name="PB7" x="17.78" y="43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PB6" x="17.78" y="40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PB5" x="17.78" y="38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PB4" x="17.78" y="35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PB3" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PD7" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PD6" x="17.78" y="27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PD5" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PD4" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PD3" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PD2" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PD1" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PD0" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>+ <pin name="PA15" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+ <pin name="PA14" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@5" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@5" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+ <pin name="NC" x="17.78" y="-7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PA13" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PA12" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PA11" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PA10" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PA9" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PA8" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PC9" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PC8" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PC7" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PC6" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PD15" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PD14" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PD13" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PD12" x="17.78" y="-43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PD11" x="17.78" y="-45.72" length="middle" direction="io" rot="R180"/>+ <pin name="PD10" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>+ <pin name="PD9" x="17.78" y="-50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PD8" x="17.78" y="-53.34" length="middle" direction="io" rot="R180"/>+ <pin name="PB15" x="17.78" y="-55.88" length="middle" direction="io" rot="R180"/>+ <pin name="PB14" x="17.78" y="-58.42" length="middle" direction="io" rot="R180"/>+ <pin name="PB13" x="17.78" y="-60.96" length="middle" direction="io" rot="R180"/>+ <pin name="PB12" x="17.78" y="-63.5" length="middle" direction="io" rot="R180"/> </symbol> </symbols> <devicesets> <deviceset name="STM32F103VET6" prefix="U">- <description></description>+ <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data</description> <gates> <gate name="G$1" symbol="STM32F103VET6" x="0" y="0"/> </gates>@@ -300,93 +307,109 @@ <connect gate="G$1" pin="PC13-TAMPER-RTC" pad="7"/> <connect gate="G$1" pin="PC14-OSC32_IN" pad="8"/> <connect gate="G$1" pin="PC15-OSC32_OUT" pad="9"/>- <connect gate="G$1" pin="VSS_5" pad="10"/>- <connect gate="G$1" pin="VDD_5" pad="11"/>- <connect gate="G$1" pin="PF6" pad="12"/>- <connect gate="G$1" pin="PF7" pad="13"/>- <connect gate="G$1" pin="PF8" pad="14"/>- <connect gate="G$1" pin="PF9" pad="15"/>- <connect gate="G$1" pin="PF10" pad="16"/>- <connect gate="G$1" pin="OSC_IN" pad="23"/>- <connect gate="G$1" pin="OSC_OUT" pad="24"/>- <connect gate="G$1" pin="NRST" pad="25"/>- <connect gate="G$1" pin="PC0" pad="26"/>- <connect gate="G$1" pin="PC1" pad="27"/>- <connect gate="G$1" pin="PC2" pad="28"/>- <connect gate="G$1" pin="PC3" pad="29"/>- <connect gate="G$1" pin="VSSA" pad="30"/>- <connect gate="G$1" pin="VREF-" pad="31"/>- <connect gate="G$1" pin="VREF+" pad="32"/>- <connect gate="G$1" pin="VDDA" pad="33"/>- <connect gate="G$1" pin="PA0-WKUP" pad="34"/>- <connect gate="G$1" pin="PA1" pad="35"/>- <connect gate="G$1" pin="PA2" pad="36"/>- <connect gate="G$1" pin="PA3" pad="37"/>- <connect gate="G$1" pin="VSS_4" pad="38"/>- <connect gate="G$1" pin="VDD_4" pad="39"/>- <connect gate="G$1" pin="PA4" pad="40"/>- <connect gate="G$1" pin="PA5" pad="41"/>- <connect gate="G$1" pin="PA6" pad="42"/>- <connect gate="G$1" pin="PA7" pad="43"/>- <connect gate="G$1" pin="PC4" pad="44"/>- <connect gate="G$1" pin="PC5" pad="45"/>- <connect gate="G$1" pin="PB0" pad="46"/>- <connect gate="G$1" pin="PB1" pad="47"/>- <connect gate="G$1" pin="PB2/BOOT1" pad="48"/>- <connect gate="G$1" pin="PE7" pad="49"/>- <connect gate="G$1" pin="PE8" pad="50"/>- <connect gate="G$1" pin="PE9" pad="51"/>- <connect gate="G$1" pin="PE10" pad="52"/>- <connect gate="G$1" pin="PE11" pad="53"/>- <connect gate="G$1" pin="VDD_3" pad="100"/>- <connect gate="G$1" pin="VSS_3" pad="99"/>- <connect gate="G$1" pin="PD7" pad="98"/>- <connect gate="G$1" pin="PD6" pad="97"/>- <connect gate="G$1" pin="PD5" pad="96"/>- <connect gate="G$1" pin="PD4" pad="95"/>- <connect gate="G$1" pin="PD3" pad="94"/>- <connect gate="G$1" pin="PD2" pad="93"/>- <connect gate="G$1" pin="PD1" pad="92"/>- <connect gate="G$1" pin="PD0" pad="91"/>- <connect gate="G$1" pin="PC12" pad="90"/>- <connect gate="G$1" pin="PC11" pad="89"/>- <connect gate="G$1" pin="PC10" pad="88"/>- <connect gate="G$1" pin="PA15" pad="87"/>- <connect gate="G$1" pin="PA14" pad="86"/>- <connect gate="G$1" pin="VDD_2" pad="85"/>- <connect gate="G$1" pin="VSS_2" pad="84"/>- <connect gate="G$1" pin="PA13" pad="83"/>- <connect gate="G$1" pin="PA12" pad="82"/>- <connect gate="G$1" pin="PA11" pad="81"/>- <connect gate="G$1" pin="PA10" pad="80"/>- <connect gate="G$1" pin="PA9" pad="79"/>- <connect gate="G$1" pin="PA8" pad="78"/>- <connect gate="G$1" pin="PC9" pad="77"/>- <connect gate="G$1" pin="PC8" pad="76"/>- <connect gate="G$1" pin="PC7" pad="75"/>- <connect gate="G$1" pin="PC6" pad="74"/>- <connect gate="G$1" pin="PD15" pad="73"/>- <connect gate="G$1" pin="PD14" pad="72"/>- <connect gate="G$1" pin="PD13" pad="71"/>- <connect gate="G$1" pin="PD12" pad="70"/>- <connect gate="G$1" pin="PD11" pad="69"/>- <connect gate="G$1" pin="PD10" pad="68"/>- <connect gate="G$1" pin="PD9" pad="67"/>- <connect gate="G$1" pin="PD8" pad="66"/>- <connect gate="G$1" pin="PB15" pad="65"/>- <connect gate="G$1" pin="PB14" pad="64"/>- <connect gate="G$1" pin="PB13" pad="63"/>- <connect gate="G$1" pin="PB12" pad="62"/>- <connect gate="G$1" pin="VDD_1" pad="61"/>- <connect gate="G$1" pin="VSS_1" pad="60"/>- <connect gate="G$1" pin="PB11" pad="59"/>- <connect gate="G$1" pin="PB10" pad="58"/>- <connect gate="G$1" pin="PE15" pad="57"/>- <connect gate="G$1" pin="PE14" pad="56"/>- <connect gate="G$1" pin="PE13" pad="55"/>- <connect gate="G$1" pin="PE12" pad="54"/>+ <connect gate="G$1" pin="VSS" pad="10"/>+ <connect gate="G$1" pin="VDD" pad="11"/>+ <connect gate="G$1" pin="OSC_IN" pad="12"/>+ <connect gate="G$1" pin="OSC_OUT" pad="13"/>+ <connect gate="G$1" pin="NRST" pad="14"/>+ <connect gate="G$1" pin="PC0" pad="15"/>+ <connect gate="G$1" pin="PC1" pad="16"/>+ <connect gate="G$1" pin="PC2" pad="17"/>+ <connect gate="G$1" pin="PC3" pad="18"/>+ <connect gate="G$1" pin="VSSA" pad="19"/>+ <connect gate="G$1" pin="VREF-" pad="20"/>+ <connect gate="G$1" pin="VREF+" pad="21"/>+ <connect gate="G$1" pin="VDDA" pad="22"/>+ <connect gate="G$1" pin="PA0-WKUP" pad="23"/>+ <connect gate="G$1" pin="PA1" pad="24"/>+ <connect gate="G$1" pin="PA2" pad="25"/>+ <connect gate="G$1" pin="PA3" pad="26"/>+ <connect gate="G$1" pin="VSS@2" pad="27"/>+ <connect gate="G$1" pin="VDD@2" pad="28"/>+ <connect gate="G$1" pin="PA4" pad="29"/>+ <connect gate="G$1" pin="PA5" pad="30"/>+ <connect gate="G$1" pin="PA6" pad="31"/>+ <connect gate="G$1" pin="PA7" pad="32"/>+ <connect gate="G$1" pin="PC4" pad="33"/>+ <connect gate="G$1" pin="PC5" pad="34"/>+ <connect gate="G$1" pin="PB0" pad="35"/>+ <connect gate="G$1" pin="PB1" pad="36"/>+ <connect gate="G$1" pin="PB2" pad="37"/>+ <connect gate="G$1" pin="PE7" pad="38"/>+ <connect gate="G$1" pin="PE8" pad="39"/>+ <connect gate="G$1" pin="PE9" pad="40"/>+ <connect gate="G$1" pin="PE10" pad="41"/>+ <connect gate="G$1" pin="PE11" pad="42"/>+ <connect gate="G$1" pin="PE12" pad="43"/>+ <connect gate="G$1" pin="PE13" pad="44"/>+ <connect gate="G$1" pin="PE14" pad="45"/>+ <connect gate="G$1" pin="PE15" pad="46"/>+ <connect gate="G$1" pin="PB10" pad="47"/>+ <connect gate="G$1" pin="PB11" pad="48"/>+ <connect gate="G$1" pin="VSS@3" pad="49"/>+ <connect gate="G$1" pin="VDD@3" pad="50"/>+ <connect gate="G$1" pin="VDD@4" pad="100"/>+ <connect gate="G$1" pin="VSS@4" pad="99"/>+ <connect gate="G$1" pin="PE1" pad="98"/>+ <connect gate="G$1" pin="PE0" pad="97"/>+ <connect gate="G$1" pin="PB9" pad="96"/>+ <connect gate="G$1" pin="PB8" pad="95"/>+ <connect gate="G$1" pin="BOOT0" pad="94"/>+ <connect gate="G$1" pin="PB7" pad="93"/>+ <connect gate="G$1" pin="PB6" pad="92"/>+ <connect gate="G$1" pin="PB5" pad="91"/>+ <connect gate="G$1" pin="PB4" pad="90"/>+ <connect gate="G$1" pin="PB3" pad="89"/>+ <connect gate="G$1" pin="PD7" pad="88"/>+ <connect gate="G$1" pin="PD6" pad="87"/>+ <connect gate="G$1" pin="PD5" pad="86"/>+ <connect gate="G$1" pin="PD4" pad="85"/>+ <connect gate="G$1" pin="PD3" pad="84"/>+ <connect gate="G$1" pin="PD2" pad="83"/>+ <connect gate="G$1" pin="PD1" pad="82"/>+ <connect gate="G$1" pin="PD0" pad="81"/>+ <connect gate="G$1" pin="PC12" pad="80"/>+ <connect gate="G$1" pin="PC11" pad="79"/>+ <connect gate="G$1" pin="PC10" pad="78"/>+ <connect gate="G$1" pin="PA15" pad="77"/>+ <connect gate="G$1" pin="PA14" pad="76"/>+ <connect gate="G$1" pin="VDD@5" pad="75"/>+ <connect gate="G$1" pin="VSS@5" pad="74"/>+ <connect gate="G$1" pin="NC" pad="73"/>+ <connect gate="G$1" pin="PA13" pad="72"/>+ <connect gate="G$1" pin="PA12" pad="71"/>+ <connect gate="G$1" pin="PA11" pad="70"/>+ <connect gate="G$1" pin="PA10" pad="69"/>+ <connect gate="G$1" pin="PA9" pad="68"/>+ <connect gate="G$1" pin="PA8" pad="67"/>+ <connect gate="G$1" pin="PC9" pad="66"/>+ <connect gate="G$1" pin="PC8" pad="65"/>+ <connect gate="G$1" pin="PC7" pad="64"/>+ <connect gate="G$1" pin="PC6" pad="63"/>+ <connect gate="G$1" pin="PD15" pad="62"/>+ <connect gate="G$1" pin="PD14" pad="61"/>+ <connect gate="G$1" pin="PD13" pad="60"/>+ <connect gate="G$1" pin="PD12" pad="59"/>+ <connect gate="G$1" pin="PD11" pad="58"/>+ <connect gate="G$1" pin="PD10" pad="57"/>+ <connect gate="G$1" pin="PD9" pad="56"/>+ <connect gate="G$1" pin="PD8" pad="55"/>+ <connect gate="G$1" pin="PB15" pad="54"/>+ <connect gate="G$1" pin="PB14" pad="53"/>+ <connect gate="G$1" pin="PB13" pad="52"/>+ <connect gate="G$1" pin="PB12" pad="51"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="STM32F103VET6" constant="no"/>+ <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+ <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588879065663352832" constant="no"/>+ <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/stm32f103vet6" constant="no"/>+ <attribute name="MOUSER_PN" value="511-STM32F103VET6" constant="no"/>+ <attribute name="DIGIKEY_PN" value="497-6443-ND" constant="no"/>+ <attribute name="LCSC_PN" value="C8308" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>