component
STM32F103RET6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
← Commit history
Publish 0.1.1
5 files changed
+192−146
README.md+16−11@@ -12,9 +12,9 @@ STM32F103RET6TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin des | 2 | PC13-TAMPER-RTC | bidirectional | GPIO port C bit 13 with limited current (3 mA max); 5 V tolerant; RTC tamper function. | | 3 | PC14-OSC32_IN | bidirectional | GPIO port C bit 14; 32 kHz external oscillator input for RTC; 5 V tolerant. | | 4 | PC15-OSC32_OUT | bidirectional | GPIO port C bit 15; 32 kHz external oscillator output; 5 V tolerant. |-| 5 | PD0 | input | GPIO port D bit 0; configured as OSC_IN (external oscillator input) after reset; remappable to CAN_RX. |-| 6 | PD1 | output | GPIO port D bit 1; configured as OSC_OUT (external oscillator output) after reset; remappable to CAN_TX. |-| 7 | NRST | bidirectional | System reset pin with internal pull-up (30-50 kΩ) and filtering; VIL max 0.8 V, VIH min 2.0 V. |+| 5 | PD0-OSC_IN | bidirectional | GPIO port D bit 0; configured as OSC_IN (external oscillator input) after reset; remappable to CAN_RX. |+| 6 | PD1-OSC_OUT | bidirectional | GPIO port D bit 1; configured as OSC_OUT (external oscillator output) after reset; remappable to CAN_TX. |+| 7 | NRST | input | System reset pin with internal pull-up (30-50 kΩ) and filtering; VIL max 0.8 V, VIH min 2.0 V. | | 8 | PC0 | bidirectional | GPIO port C bit 0; 5 V tolerant; ADC123 input channel 10 alternate function. | | 9 | PC1 | bidirectional | GPIO port C bit 1; 5 V tolerant; ADC123 input channel 11 alternate function. | | 10 | PC2 | bidirectional | GPIO port C bit 2; 5 V tolerant; ADC123 input channel 12 alternate function. |@@ -25,8 +25,8 @@ STM32F103RET6TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin des | 15 | PA1 | bidirectional | GPIO port A bit 1; 5 V tolerant; ADC123 channel 1; USART2_RTS alternate function. | | 16 | PA2 | bidirectional | GPIO port A bit 2; 5 V tolerant; ADC123 channel 2; USART2_TX alternate function. | | 17 | PA3 | bidirectional | GPIO port A bit 3; 5 V tolerant; ADC123 channel 3; USART2_RX alternate function. |-| 18 | VSS_4 | power_in | Ground supply pin for digital logic; must be connected to external ground. |-| 19 | VDD_4 | power_in | Power supply pin (2.0 V to 3.6 V) for digital logic; requires 100 nF bypass capacitor. |+| 18 | VSS | power_in | |+| 19 | VDD | power_in | | | 20 | PA4 | bidirectional | GPIO port A bit 4; 5 V tolerant; ADC12 channel 4; SPI1_NSS/DAC_OUT1 alternate functions. | | 21 | PA5 | bidirectional | GPIO port A bit 5; 5 V tolerant; ADC12 channel 5; SPI1_SCK/DAC_OUT2 alternate functions. | | 22 | PA6 | bidirectional | GPIO port A bit 6; 5 V tolerant; ADC12 channel 6; SPI1_MISO/TIM3_CH1 alternate functions. |@@ -38,25 +38,30 @@ STM32F103RET6TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin des | 28 | PB2 | bidirectional | GPIO port B bit 2; 5 V tolerant; boot pin BOOT1 function; can source/sink ±8 mA. | | 29 | PB10 | bidirectional | GPIO port B bit 10; 5 V tolerant; I2C2_SCL/USART3_TX/TIM2_CH3 alternate functions. | | 30 | PB11 | bidirectional | GPIO port B bit 11; 5 V tolerant; I2C2_SDA/USART3_RX/TIM2_CH4 alternate functions. |-| 31 | VSS_1 | power_in | Ground supply pin for digital logic; must be connected to external ground. |-| 32 | VDD_1 | power_in | Power supply pin (2.0 V to 3.6 V) for digital logic; requires 100 nF bypass capacitor. |+| 31 | VSS | power_in | |+| 32 | VDD | power_in | | | 33 | PB12 | bidirectional | GPIO port B bit 12; 5 V tolerant; SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK alternate functions. | | 34 | PB13 | bidirectional | GPIO port B bit 13; 5 V tolerant; SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N alternate functions. | | 35 | PB14 | bidirectional | GPIO port B bit 14; 5 V tolerant; SPI2_MISO/TIM1_CH2N/USART3_RTS alternate functions. | | 36 | PB15 | bidirectional | GPIO port B bit 15; 5 V tolerant; SPI2_MOSI/I2S2_SD/TIM1_CH3N alternate functions. |+| 37 | PC6 | bidirectional | |+| 38 | PC7 | bidirectional | |+| 39 | PC8 | bidirectional | |+| 40 | PC9 | bidirectional | | | 41 | PA8 | bidirectional | GPIO port A bit 8; 5 V tolerant; USART1_CK/TIM1_CH1/MCO (main clock output) alternate functions. | | 42 | PA9 | bidirectional | GPIO port A bit 9; 5 V tolerant; USART1_TX/TIM1_CH2 alternate functions. | | 43 | PA10 | bidirectional | GPIO port A bit 10; 5 V tolerant; USART1_RX/TIM1_CH3 alternate functions. | | 44 | PA11 | bidirectional | GPIO port A bit 11; 5 V tolerant; USART1_CTS/USB_DM/CAN_RX/TIM1_CH4 alternate functions. | | 45 | PA12 | bidirectional | GPIO port A bit 12; 5 V tolerant; USART1_RTS/USB_DP/CAN_TX/TIM1_ETR alternate functions. | | 46 | PA13 | bidirectional | GPIO port A bit 13; 5 V tolerant; JTMS-SWDIO debug interface pin; cannot be used as GPIO. |-| 47 | VSS_2 | power_in | Ground supply pin for digital logic; must be connected to external ground. |-| 48 | VDD_2 | power_in | Power supply pin (2.0 V to 3.6 V) for digital logic; requires 100 nF bypass capacitor. |+| 47 | VSS | power_in | |+| 48 | VDD | power_in | | | 49 | PA14 | bidirectional | GPIO port A bit 14; 5 V tolerant; JTCK-SWCLK debug interface pin; cannot be used as GPIO. | | 50 | PA15 | bidirectional | GPIO port A bit 15; 5 V tolerant; JTDI debug/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR alternate functions. | | 51 | PC10 | bidirectional | GPIO port C bit 10; 5 V tolerant; UART4_TX/SDIO_D2/USART3_TX alternate functions. | | 52 | PC11 | bidirectional | GPIO port C bit 11; 5 V tolerant; UART4_RX/SDIO_D3/USART3_RX alternate functions. | | 53 | PC12 | bidirectional | GPIO port C bit 12; 5 V tolerant; UART5_TX/SDIO_CK/USART3_CK alternate functions. |+| 54 | PD2 | bidirectional | | | 55 | PB3 | bidirectional | GPIO port B bit 3; 5 V tolerant; JTDO debug/SPI3_SCK/I2S3_CK/TRACESWO/TIM2_CH2/SPI1_SCK alternate functions. | | 56 | PB4 | bidirectional | GPIO port B bit 4; 5 V tolerant; NJTRST debug/SPI3_MISO/PB4/TIM3_CH1/SPI1_MISO alternate functions. | | 57 | PB5 | bidirectional | GPIO port B bit 5; 5 V tolerant (no FT specified); I2C1_SMBA/SPI3_MOSI/I2S3_SD/TIM3_CH2/SPI1_MOSI alternate functions. |@@ -65,8 +70,8 @@ STM32F103RET6TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin des | 60 | BOOT0 | input | Boot mode pin (active high); determines boot from flash, system memory, or SRAM on reset. | | 61 | PB8 | bidirectional | GPIO port B bit 8; 5 V tolerant; TIM4_CH3/SDIO_D4/I2C1_SCL/CAN_RX alternate functions. | | 62 | PB9 | bidirectional | GPIO port B bit 9; 5 V tolerant; TIM4_CH4/SDIO_D5/I2C1_SDA/CAN_TX alternate functions. |-| 63 | VSS_3 | power_in | Ground supply pin for digital logic; must be connected to external ground. |-| 64 | VDD_3 | power_in | Power supply pin (2.0 V to 3.6 V) for digital logic; requires 100 nF bypass capacitor. |+| 63 | VSS | power_in | |+| 64 | VDD | power_in | | ## Key specifications
package.json+2−2@@ -1,6 +1,6 @@ { "slug": "stm32f103ret6tr",- "version": "0.1.0",+ "version": "0.1.1", "type": "component", "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.", "tags": [@@ -439,4 +439,4 @@ "footprint": "viewers/footprint.html" } }-}+}
page.json+4−4@@ -4,7 +4,7 @@ "slug": "stm32f103ret6tr", "title": "STM32F103RET6TR", "brief": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.1.1", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -466,7 +466,7 @@ "viewers/symbol.html", "viewers/footprint.html" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "org": "adom" }
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stm32f103ret6tr.lbr+88−67@@ -50,7 +50,7 @@ <layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> </layers> <library>-<description></description>+<description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data</description> <packages> <package name="LQFP-64_10x10mm_P0.5mm"> <description>LQFP-64, 10 x 10 mm, 0.5 mm pitch</description>@@ -144,76 +144,82 @@ </packages> <symbols> <symbol name="STM32F103RET6TR">- <wire x1="-12.7" y1="38.1" x2="12.7" y2="38.1" width="0.254" layer="94"/>- <wire x1="12.7" y1="38.1" x2="12.7" y2="-40.64" width="0.254" layer="94"/>- <wire x1="12.7" y1="-40.64" x2="-12.7" y2="-40.64" width="0.254" layer="94"/>- <wire x1="-12.7" y1="-40.64" x2="-12.7" y2="38.1" width="0.254" layer="94"/>- <text x="0.0000" y="40.6400" size="1.27" layer="95" align="center">>NAME</text>- <text x="0.0000" y="-43.1800" size="1.27" layer="96" align="center">>VALUE</text>- <pin name="VBAT" x="-17.78" y="35.56" length="middle" direction="pwr"/>- <pin name="PC13-TAMPER-RTC" x="-17.78" y="33.02" length="middle" direction="io"/>- <pin name="PC14-OSC32_IN" x="-17.78" y="30.48" length="middle" direction="io"/>- <pin name="PC15-OSC32_OUT" x="-17.78" y="27.94" length="middle" direction="io"/>- <pin name="PD0" x="-17.78" y="25.4" length="middle" direction="in"/>- <pin name="PD1" x="-17.78" y="22.86" length="middle" direction="out"/>- <pin name="NRST" x="-17.78" y="20.32" length="middle" direction="io"/>- <pin name="PC0" x="-17.78" y="17.78" length="middle" direction="io"/>- <pin name="PC1" x="-17.78" y="15.24" length="middle" direction="io"/>- <pin name="PC2" x="-17.78" y="12.7" length="middle" direction="io"/>- <pin name="PC3" x="-17.78" y="10.16" length="middle" direction="io"/>- <pin name="VSSA" x="-17.78" y="7.62" length="middle" direction="pwr"/>- <pin name="VDDA" x="-17.78" y="5.08" length="middle" direction="pwr"/>- <pin name="PA0-WKUP" x="-17.78" y="2.54" length="middle" direction="io"/>- <pin name="PA1" x="-17.78" y="0" length="middle" direction="io"/>- <pin name="PA2" x="-17.78" y="-2.54" length="middle" direction="io"/>- <pin name="PA3" x="-17.78" y="-5.08" length="middle" direction="io"/>- <pin name="VSS_4" x="-17.78" y="-7.62" length="middle" direction="pwr"/>- <pin name="VDD_4" x="-17.78" y="-10.16" length="middle" direction="pwr"/>- <pin name="PA4" x="-17.78" y="-12.7" length="middle" direction="io"/>- <pin name="PA5" x="-17.78" y="-15.24" length="middle" direction="io"/>- <pin name="PA6" x="-17.78" y="-17.78" length="middle" direction="io"/>- <pin name="PA7" x="-17.78" y="-20.32" length="middle" direction="io"/>- <pin name="PC4" x="-17.78" y="-22.86" length="middle" direction="io"/>- <pin name="PC5" x="-17.78" y="-25.4" length="middle" direction="io"/>- <pin name="PB0" x="-17.78" y="-27.94" length="middle" direction="io"/>- <pin name="PB1" x="-17.78" y="-30.48" length="middle" direction="io"/>- <pin name="PB2" x="-17.78" y="-33.02" length="middle" direction="io"/>- <pin name="PB10" x="-17.78" y="-35.56" length="middle" direction="io"/>- <pin name="PB11" x="-17.78" y="-38.1" length="middle" direction="io"/>- <pin name="VDD_3" x="17.78" y="35.56" length="middle" direction="pwr" rot="R180"/>- <pin name="VSS_3" x="17.78" y="33.02" length="middle" direction="pwr" rot="R180"/>- <pin name="PB9" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/>- <pin name="PB8" x="17.78" y="27.94" length="middle" direction="io" rot="R180"/>- <pin name="BOOT0" x="17.78" y="25.4" length="middle" direction="in" rot="R180"/>- <pin name="PB7" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>- <pin name="PB6" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>- <pin name="PB5" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>- <pin name="PB4" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>- <pin name="PB3" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+ <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data</description>+ <wire x1="-12.7" y1="40.64" x2="12.7" y2="40.64" width="0.254" layer="94"/>+ <wire x1="12.7" y1="40.64" x2="12.7" y2="-43.18" width="0.254" layer="94"/>+ <wire x1="12.7" y1="-43.18" x2="-12.7" y2="-43.18" width="0.254" layer="94"/>+ <wire x1="-12.7" y1="-43.18" x2="-12.7" y2="40.64" width="0.254" layer="94"/>+ <text x="0.0000" y="43.1800" size="1.27" layer="95" align="center">>NAME</text>+ <text x="0.0000" y="-45.7200" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="VBAT" x="-17.78" y="38.1" length="middle" direction="pwr"/>+ <pin name="PC13-TAMPER-RTC" x="-17.78" y="35.56" length="middle" direction="io"/>+ <pin name="PC14-OSC32_IN" x="-17.78" y="33.02" length="middle" direction="io"/>+ <pin name="PC15-OSC32_OUT" x="-17.78" y="30.48" length="middle" direction="io"/>+ <pin name="PD0-OSC_IN" x="-17.78" y="27.94" length="middle" direction="io"/>+ <pin name="PD1-OSC_OUT" x="-17.78" y="25.4" length="middle" direction="io"/>+ <pin name="NRST" x="-17.78" y="22.86" length="middle" direction="in"/>+ <pin name="PC0" x="-17.78" y="20.32" length="middle" direction="io"/>+ <pin name="PC1" x="-17.78" y="17.78" length="middle" direction="io"/>+ <pin name="PC2" x="-17.78" y="15.24" length="middle" direction="io"/>+ <pin name="PC3" x="-17.78" y="12.7" length="middle" direction="io"/>+ <pin name="VSSA" x="-17.78" y="10.16" length="middle" direction="pwr"/>+ <pin name="VDDA" x="-17.78" y="7.62" length="middle" direction="pwr"/>+ <pin name="PA0-WKUP" x="-17.78" y="5.08" length="middle" direction="io"/>+ <pin name="PA1" x="-17.78" y="2.54" length="middle" direction="io"/>+ <pin name="PA2" x="-17.78" y="0" length="middle" direction="io"/>+ <pin name="PA3" x="-17.78" y="-2.54" length="middle" direction="io"/>+ <pin name="VSS" x="-17.78" y="-5.08" length="middle" direction="pwr"/>+ <pin name="VDD" x="-17.78" y="-7.62" length="middle" direction="pwr"/>+ <pin name="PA4" x="-17.78" y="-10.16" length="middle" direction="io"/>+ <pin name="PA5" x="-17.78" y="-12.7" length="middle" direction="io"/>+ <pin name="PA6" x="-17.78" y="-15.24" length="middle" direction="io"/>+ <pin name="PA7" x="-17.78" y="-17.78" length="middle" direction="io"/>+ <pin name="PC4" x="-17.78" y="-20.32" length="middle" direction="io"/>+ <pin name="PC5" x="-17.78" y="-22.86" length="middle" direction="io"/>+ <pin name="PB0" x="-17.78" y="-25.4" length="middle" direction="io"/>+ <pin name="PB1" x="-17.78" y="-27.94" length="middle" direction="io"/>+ <pin name="PB2" x="-17.78" y="-30.48" length="middle" direction="io"/>+ <pin name="PB10" x="-17.78" y="-33.02" length="middle" direction="io"/>+ <pin name="PB11" x="-17.78" y="-35.56" length="middle" direction="io"/>+ <pin name="VSS@2" x="-17.78" y="-38.1" length="middle" direction="pwr"/>+ <pin name="VDD@2" x="-17.78" y="-40.64" length="middle" direction="pwr"/>+ <pin name="VDD@3" x="17.78" y="38.1" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@3" x="17.78" y="35.56" length="middle" direction="pwr" rot="R180"/>+ <pin name="PB9" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PB8" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/>+ <pin name="BOOT0" x="17.78" y="27.94" length="middle" direction="in" rot="R180"/>+ <pin name="PB7" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PB6" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PB5" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PB4" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PB3" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PD2" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/> <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/> <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/> <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/> <pin name="PA15" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/> <pin name="PA14" x="17.78" y="0" length="middle" direction="io" rot="R180"/>- <pin name="VDD_2" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>- <pin name="VSS_2" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+ <pin name="VDD@4" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@4" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/> <pin name="PA13" x="17.78" y="-7.62" length="middle" direction="io" rot="R180"/> <pin name="PA12" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/> <pin name="PA11" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/> <pin name="PA10" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/> <pin name="PA9" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/> <pin name="PA8" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>- <pin name="PB15" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>- <pin name="PB14" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>- <pin name="PB13" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>- <pin name="PB12" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>- <pin name="VDD_1" x="17.78" y="-33.02" length="middle" direction="pwr" rot="R180"/>- <pin name="VSS_1" x="17.78" y="-35.56" length="middle" direction="pwr" rot="R180"/>+ <pin name="PC9" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PC8" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PC7" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PC6" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PB15" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PB14" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PB13" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PB12" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/> </symbol> </symbols> <devicesets> <deviceset name="STM32F103RET6TR" prefix="U">- <description></description>+ <description>STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data</description> <gates> <gate name="G$1" symbol="STM32F103RET6TR" x="0" y="0"/> </gates>@@ -224,8 +230,8 @@ <connect gate="G$1" pin="PC13-TAMPER-RTC" pad="2"/> <connect gate="G$1" pin="PC14-OSC32_IN" pad="3"/> <connect gate="G$1" pin="PC15-OSC32_OUT" pad="4"/>- <connect gate="G$1" pin="PD0" pad="5"/>- <connect gate="G$1" pin="PD1" pad="6"/>+ <connect gate="G$1" pin="PD0-OSC_IN" pad="5"/>+ <connect gate="G$1" pin="PD1-OSC_OUT" pad="6"/> <connect gate="G$1" pin="NRST" pad="7"/> <connect gate="G$1" pin="PC0" pad="8"/> <connect gate="G$1" pin="PC1" pad="9"/>@@ -237,8 +243,8 @@ <connect gate="G$1" pin="PA1" pad="15"/> <connect gate="G$1" pin="PA2" pad="16"/> <connect gate="G$1" pin="PA3" pad="17"/>- <connect gate="G$1" pin="VSS_4" pad="18"/>- <connect gate="G$1" pin="VDD_4" pad="19"/>+ <connect gate="G$1" pin="VSS" pad="18"/>+ <connect gate="G$1" pin="VDD" pad="19"/> <connect gate="G$1" pin="PA4" pad="20"/> <connect gate="G$1" pin="PA5" pad="21"/> <connect gate="G$1" pin="PA6" pad="22"/>@@ -250,8 +256,10 @@ <connect gate="G$1" pin="PB2" pad="28"/> <connect gate="G$1" pin="PB10" pad="29"/> <connect gate="G$1" pin="PB11" pad="30"/>- <connect gate="G$1" pin="VDD_3" pad="64"/>- <connect gate="G$1" pin="VSS_3" pad="63"/>+ <connect gate="G$1" pin="VSS@2" pad="31"/>+ <connect gate="G$1" pin="VDD@2" pad="32"/>+ <connect gate="G$1" pin="VDD@3" pad="64"/>+ <connect gate="G$1" pin="VSS@3" pad="63"/> <connect gate="G$1" pin="PB9" pad="62"/> <connect gate="G$1" pin="PB8" pad="61"/> <connect gate="G$1" pin="BOOT0" pad="60"/>@@ -260,27 +268,40 @@ <connect gate="G$1" pin="PB5" pad="57"/> <connect gate="G$1" pin="PB4" pad="56"/> <connect gate="G$1" pin="PB3" pad="55"/>+ <connect gate="G$1" pin="PD2" pad="54"/> <connect gate="G$1" pin="PC12" pad="53"/> <connect gate="G$1" pin="PC11" pad="52"/> <connect gate="G$1" pin="PC10" pad="51"/> <connect gate="G$1" pin="PA15" pad="50"/> <connect gate="G$1" pin="PA14" pad="49"/>- <connect gate="G$1" pin="VDD_2" pad="48"/>- <connect gate="G$1" pin="VSS_2" pad="47"/>+ <connect gate="G$1" pin="VDD@4" pad="48"/>+ <connect gate="G$1" pin="VSS@4" pad="47"/> <connect gate="G$1" pin="PA13" pad="46"/> <connect gate="G$1" pin="PA12" pad="45"/> <connect gate="G$1" pin="PA11" pad="44"/> <connect gate="G$1" pin="PA10" pad="43"/> <connect gate="G$1" pin="PA9" pad="42"/> <connect gate="G$1" pin="PA8" pad="41"/>+ <connect gate="G$1" pin="PC9" pad="40"/>+ <connect gate="G$1" pin="PC8" pad="39"/>+ <connect gate="G$1" pin="PC7" pad="38"/>+ <connect gate="G$1" pin="PC6" pad="37"/> <connect gate="G$1" pin="PB15" pad="36"/> <connect gate="G$1" pin="PB14" pad="35"/> <connect gate="G$1" pin="PB13" pad="34"/> <connect gate="G$1" pin="PB12" pad="33"/>- <connect gate="G$1" pin="VDD_1" pad="32"/>- <connect gate="G$1" pin="VSS_1" pad="31"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="STM32F103RET6TR" constant="no"/>+ <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+ <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884713767780352" constant="no"/>+ <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/stm32f103ret6tr" constant="no"/>+ <attribute name="MOUSER_PN" value="511-STM32F103RET6TR" constant="no"/>+ <attribute name="DIGIKEY_PN" value="497-17387-2-ND" constant="no"/>+ <attribute name="LCSC_PN" value="C427099" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>