STM32F103RET6

@@ -0,0 +1,129 @@+# STM32F103RET6++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)++STM32F103RET6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VBAT | power_in | Backup domain supply (1.8-3.6 V). Powers RTC, LSE oscillator and backup registers when VDD is absent. Tie to VDD if not battery-backed. |+| 2 | PC13-TAMPER-RTC | bidirectional | GPIO port C bit 13; alternate function TAMPER-RTC (RTC tamper detect / RTC alarm out). Supplied through the VBAT power switch, so use in output mode is limited to 2 MHz with ≤30 pF and cannot source significant current. |+| 3 | PC14-OSC32_IN | bidirectional | GPIO PC14 or 32.768 kHz LSE crystal input. Backup-domain pin driven through the VBAT power switch; when used as GPIO output the same 2 MHz / 30 pF / low-drive limits apply. |+| 4 | PC15-OSC32_OUT | bidirectional | GPIO PC15 or 32.768 kHz LSE crystal output. Backup-domain pin driven through the VBAT power switch; same low-drive restrictions as PC13/PC14. |+| 5 | PD0/OSC_IN | bidirectional | After reset this pin is OSC_IN (HSE 4-16 MHz crystal input). Software may remap it as GPIO PD0. FSMC function of PD0 is not available in LQFP64. |+| 6 | PD1/OSC_OUT | bidirectional | After reset this pin is OSC_OUT (HSE crystal output). Software may remap it as GPIO PD1. FSMC function is not available in LQFP64. |+| 7 | NRST | bidirectional | Active-low bidirectional device reset input/open-drain output with internal pull-up. Drive low for ≥20 µs to reset the MCU. |+| 8 | PC0 | bidirectional | GPIO PC0. Alternate: ADC123_IN10 (analog input to ADC1/2/3 channel 10). |+| 9 | PC1 | bidirectional | GPIO PC1. Alternate: ADC123_IN11. |+| 10 | PC2 | bidirectional | GPIO PC2. Alternate: ADC123_IN12. |+| 11 | PC3 | bidirectional | GPIO PC3. Alternate: ADC123_IN13. |+| 12 | VSSA | power_in | Analog ground reference for ADC/DAC and analog reference block. Connect to system ground with careful star/plane layout. |+| 13 | VDDA | power_in | Analog supply (2.0-3.6 V) for ADCs, DAC, reset block, PLL and internal reference. On LQFP64 the VREF+/VREF- pads are bonded internally to VDDA/VSSA. |+| 14 | PA0-WKUP | bidirectional | GPIO PA0 with Standby-mode WKUP input. Alternates: USART2_CTS, ADC123_IN0, TIM2_CH1_ETR, TIM5_CH1, TIM8_ETR. |+| 15 | PA1 | bidirectional | GPIO PA1. Alternates: USART2_RTS, ADC123_IN1, TIM5_CH2, TIM2_CH2. |+| 16 | PA2 | bidirectional | GPIO PA2. Alternates: USART2_TX, TIM5_CH3, ADC123_IN2, TIM2_CH3. |+| 17 | PA3 | bidirectional | GPIO PA3. Alternates: USART2_RX, TIM5_CH4, ADC123_IN3, TIM2_CH4. |+| 18 | VSS_4 | power_in | Digital ground. Tie to system ground. |+| 19 | VDD_4 | power_in | Digital supply (2.0-3.6 V). Decouple with a local 100 nF cap. |+| 20 | PA4 | bidirectional | GPIO PA4. Alternates: SPI1_NSS, USART2_CK, DAC_OUT1, ADC12_IN4. |+| 21 | PA5 | bidirectional | GPIO PA5. Alternates: SPI1_SCK, DAC_OUT2, ADC12_IN5. |+| 22 | PA6 | bidirectional | GPIO PA6. Alternates: SPI1_MISO, TIM8_BKIN, ADC12_IN6, TIM3_CH1, TIM1_BKIN (remap). |+| 23 | PA7 | bidirectional | GPIO PA7. Alternates: SPI1_MOSI, TIM8_CH1N, ADC12_IN7, TIM3_CH2, TIM1_CH1N (remap). |+| 24 | PC4 | bidirectional | GPIO PC4. Alternate: ADC12_IN14. |+| 25 | PC5 | bidirectional | GPIO PC5. Alternate: ADC12_IN15. |+| 26 | PB0 | bidirectional | GPIO PB0. Alternates: ADC12_IN8, TIM3_CH3, TIM8_CH2N, TIM1_CH2N (remap). |+| 27 | PB1 | bidirectional | GPIO PB1. Alternates: ADC12_IN9, TIM3_CH4, TIM8_CH3N, TIM1_CH3N (remap). |+| 28 | PB2/BOOT1 | bidirectional | GPIO PB2 and BOOT1 boot-mode select input; sampled together with BOOT0 at reset to choose boot memory (main Flash / system memory / SRAM). 5 V-tolerant. |+| 29 | PB10 | bidirectional | GPIO PB10. Alternates: I2C2_SCL, USART3_TX, TIM2_CH3 (remap). 5 V-tolerant. |+| 30 | PB11 | bidirectional | GPIO PB11. Alternates: I2C2_SDA, USART3_RX, TIM2_CH4 (remap). 5 V-tolerant. |+| 31 | VSS_1 | power_in | Digital ground. |+| 32 | VDD_1 | power_in | Digital supply (2.0-3.6 V). Decouple locally. |+| 33 | PB12 | bidirectional | GPIO PB12. Alternates: SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN. 5 V-tolerant. |+| 34 | PB13 | bidirectional | GPIO PB13. Alternates: SPI2_SCK, I2S2_CK, USART3_CTS, TIM1_CH1N. 5 V-tolerant. |+| 35 | PB14 | bidirectional | GPIO PB14. Alternates: SPI2_MISO, TIM1_CH2N, USART3_RTS. 5 V-tolerant. |+| 36 | PB15 | bidirectional | GPIO PB15. Alternates: SPI2_MOSI, I2S2_SD, TIM1_CH3N. 5 V-tolerant. |+| 37 | PC6 | bidirectional | GPIO PC6. Alternates: I2S2_MCK, TIM8_CH1, SDIO_D6, TIM3_CH1 (remap). 5 V-tolerant. |+| 38 | PC7 | bidirectional | GPIO PC7. Alternates: I2S3_MCK, TIM8_CH2, SDIO_D7, TIM3_CH2 (remap). 5 V-tolerant. |+| 39 | PC8 | bidirectional | GPIO PC8. Alternates: TIM8_CH3, SDIO_D0, TIM3_CH3 (remap). 5 V-tolerant. |+| 40 | PC9 | bidirectional | GPIO PC9. Alternates: TIM8_CH4, SDIO_D1, TIM3_CH4 (remap). 5 V-tolerant. |+| 41 | PA8 | bidirectional | GPIO PA8. Alternates: USART1_CK, TIM1_CH1, MCO clock output. 5 V-tolerant. |+| 42 | PA9 | bidirectional | GPIO PA9. Alternates: USART1_TX, TIM1_CH2. 5 V-tolerant. |+| 43 | PA10 | bidirectional | GPIO PA10. Alternates: USART1_RX, TIM1_CH3. 5 V-tolerant. |+| 44 | PA11 | bidirectional | GPIO PA11. Alternates: USART1_CTS, USBDM (USB D-), CAN_RX, TIM1_CH4. 5 V-tolerant. |+| 45 | PA12 | bidirectional | GPIO PA12. Alternates: USART1_RTS, USBDP (USB D+), CAN_TX, TIM1_ETR. 5 V-tolerant. |+| 46 | PA13 | bidirectional | After reset: JTMS/SWDIO (JTAG mode select / Serial Wire Data). Remappable to GPIO PA13. 5 V-tolerant. |+| 47 | VSS_2 | power_in | Digital ground. |+| 48 | VDD_2 | power_in | Digital supply (2.0-3.6 V). |+| 49 | PA14 | bidirectional | After reset: JTCK/SWCLK (JTAG clock / Serial Wire Clock). Remappable to GPIO PA14. 5 V-tolerant. |+| 50 | PA15 | bidirectional | After reset: JTDI. Remap functions: TIM2_CH1_ETR, PA15 GPIO, SPI3_NSS, I2S3_WS, SPI1_NSS. 5 V-tolerant. |+| 51 | PC10 | bidirectional | GPIO PC10. Alternates: UART4_TX, SDIO_D2, USART3_TX (remap). 5 V-tolerant. |+| 52 | PC11 | bidirectional | GPIO PC11. Alternates: UART4_RX, SDIO_D3, USART3_RX (remap). 5 V-tolerant. |+| 53 | PC12 | bidirectional | GPIO PC12. Alternates: UART5_TX, SDIO_CK, USART3_CK (remap). 5 V-tolerant. |+| 54 | PD2 | bidirectional | GPIO PD2. Alternates: TIM3_ETR, UART5_RX, SDIO_CMD. 5 V-tolerant. |+| 55 | PB3 | bidirectional | After reset: JTDO/TRACESWO. Remap: GPIO PB3, SPI3_SCK/I2S3_CK, TIM2_CH2, SPI1_SCK. 5 V-tolerant. |+| 56 | PB4 | bidirectional | After reset: NJTRST (JTAG reset, active-low). Remap: GPIO PB4, SPI3_MISO, TIM3_CH1, SPI1_MISO. 5 V-tolerant. |+| 57 | PB5 | bidirectional | GPIO PB5. Alternates: I2C1_SMBA, SPI3_MOSI, I2S3_SD, TIM3_CH2 (remap), SPI1_MOSI (remap). Not 5 V-tolerant. |+| 58 | PB6 | bidirectional | GPIO PB6. Alternates: I2C1_SCL, TIM4_CH1, USART1_TX (remap). 5 V-tolerant. |+| 59 | PB7 | bidirectional | GPIO PB7. Alternates: I2C1_SDA, FSMC_NADV (not usable in LQFP64), TIM4_CH2, USART1_RX (remap). 5 V-tolerant. |+| 60 | BOOT0 | input | Boot mode select input sampled at reset together with PB2/BOOT1 to choose boot from main Flash, system memory (bootloader) or embedded SRAM. Not 5 V-tolerant. |+| 61 | PB8 | bidirectional | GPIO PB8. Alternates: TIM4_CH3, SDIO_D4, I2C1_SCL (remap), CAN_RX (remap). 5 V-tolerant. |+| 62 | PB9 | bidirectional | GPIO PB9. Alternates: TIM4_CH4, SDIO_D5, I2C1_SDA (remap), CAN_TX (remap). 5 V-tolerant. |+| 63 | VSS_3 | power_in | Digital ground. |+| 64 | VDD_3 | power_in | Digital supply (2.0-3.6 V). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-64(10x10) |+| Category | MCU |+| Pins | 64 |++## Ordering variants++- `STM32F103RET6RCT6`+- `STM32F103RET6RCT7`+- `STM32F103RET6RDT6`+- `STM32F103RET6RDT7`+- `STM32F103RET6RET6`+- `STM32F103RET6RET7`+- `STM32F103RET6RCY6TR`+- `STM32F103RET6RDY6TR`+- `STM32F103RET6REY6TR`+- `STM32F103RET6VCT6`+- `STM32F103RET6VCT7`+- `STM32F103RET6VDT6`+- `STM32F103RET6VDT7`+- `STM32F103RET6VET6`+- `STM32F103RET6VET7`+- `STM32F103RET6VCH6`+- `STM32F103RET6VDH6`+- `STM32F103RET6VEH6`+- `STM32F103RET6ZCT6`+- `STM32F103RET6ZCT7`+- `STM32F103RET6ZDT6`+- `STM32F103RET6ZDT7`+- `STM32F103RET6ZET6`+- `STM32F103RET6ZET7`+- `STM32F103RET6ZCH6`+- `STM32F103RET6ZDH6`+- `STM32F103RET6ZEH6`++## CAD (KiCad official)++- Symbol: `STM32F103RET6`+- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`+- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/stm32f103ret6.pdf) (143 pp, sha256 `c61db5e362b62f2f`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32f103ret6-datasheet.pdf)