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Initial commit: component/stm32f101t6u6a

Ray ·0ae41d48a5 ·2d ago
2 files changed +447
README.mdadded+73
@@ -0,0 +1,73 @@+# STM32F101T6U6A++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · QFN-36-EP(6x6)++STM32F101T6U6A from STMicroelectronics, in a QFN-36-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD_3 | power_in | Digital supply pin for I/Os and internal logic, specified for the 2.0 to 3.6 V application supply range. |+| 2 | OSC_IN/PD0 | input | External 4-16 MHz high-speed oscillator input after reset; the pin can be remapped by software to GPIO PD0. |+| 3 | OSC_OUT/PD1 | output | External 4-16 MHz high-speed oscillator output after reset; the pin can be remapped by software to GPIO PD1. |+| 4 | NRST | bidirectional | Active reset pin for the device; its electrical limits are given in the NRST pin characteristics (Section 5.3.14). |+| 5 | VSSA | power_in | Analog ground reference for the ADC and analog blocks. |+| 6 | VDDA | power_in | Analog supply for the ADC and analog blocks; the ADC conversion range is 0 to 3.6 V and the temperature sensor requires 2 V to 3.6 V. |+| 7 | PA0-WKUP | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with WKUP, USART2_CTS, ADC_IN0 and TIM2_CH1_ETR alternate functions. |+| 8 | PA1 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with USART2_RTS, ADC_IN1 and TIM2_CH2 alternate functions. |+| 9 | PA2 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with USART2_TX, ADC_IN2 and TIM2_CH3 alternate functions. |+| 10 | PA3 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with USART2_RX, ADC_IN3 and TIM2_CH4 alternate functions. |+| 11 | PA4 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with SPI_NSS, ADC_IN4 and USART2_CK alternate functions. |+| 12 | PA5 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with SPI_SCK and ADC_IN5 alternate functions. |+| 13 | PA6 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with SPI_MISO, ADC_IN6 and TIM3_CH1 alternate functions. |+| 14 | PA7 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with SPI_MOSI, ADC_IN7 and TIM3_CH2 alternate functions. |+| 15 | PB0 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with ADC_IN8 and TIM3_CH3 alternate functions. |+| 16 | PB1 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with ADC_IN9 and TIM3_CH4 alternate functions. |+| 17 | PB2/BOOT1 | bidirectional | 5 V tolerant general-purpose I/O (FT) that also carries the BOOT1 boot-mode function. |+| 18 | VSS_1 | power_in | Digital ground pin for the I/Os and internal logic. |+| 19 | VDD_1 | power_in | Digital supply pin for I/Os and internal logic, specified for the 2.0 to 3.6 V application supply range. |+| 20 | PA8 | bidirectional | 5 V tolerant general-purpose I/O (FT) with USART1_CK and MCO alternate functions. |+| 21 | PA9 | bidirectional | 5 V tolerant general-purpose I/O (FT) with USART1_TX alternate function. |+| 22 | PA10 | bidirectional | 5 V tolerant general-purpose I/O (FT) with USART1_RX alternate function. |+| 23 | PA11 | bidirectional | 5 V tolerant general-purpose I/O (FT) with USART1_CTS alternate function. |+| 24 | PA12 | bidirectional | 5 V tolerant general-purpose I/O (FT) with USART1_RTS alternate function. |+| 25 | PA13 | bidirectional | 5 V tolerant I/O (FT) that carries the JTMS/SWDIO debug function after reset. |+| 26 | VSS_2 | power_in | Digital ground pin for the I/Os and internal logic. |+| 27 | VDD_2 | power_in | Digital supply pin for I/Os and internal logic, specified for the 2.0 to 3.6 V application supply range. |+| 28 | PA14 | bidirectional | 5 V tolerant I/O (FT) that carries the JTCK/SWCLK debug function after reset. |+| 29 | PA15 | bidirectional | 5 V tolerant general-purpose I/O (FT) with JTDI, TIM2_CH1_ETR and SPI_NSS alternate functions. |+| 30 | PB3 | bidirectional | 5 V tolerant general-purpose I/O (FT) with JTDO/TRACESWO, TIM2_CH2 and SPI_SCK alternate functions. |+| 31 | PB4 | bidirectional | 5 V tolerant general-purpose I/O (FT) with NJTRST, TIM3_CH1 and SPI_MISO alternate functions. |+| 32 | PB5 | bidirectional | General-purpose I/O (standard, not 5 V tolerant per Table 4) with I2C_SMBA, TIM3_CH2 and SPI_MOSI alternate functions. |+| 33 | PB6 | bidirectional | 5 V tolerant general-purpose I/O (FT) with I2C_SCL and USART1_TX alternate functions. |+| 34 | PB7 | bidirectional | 5 V tolerant general-purpose I/O (FT) with I2C_SDA and USART1_RX alternate functions. |+| 35 | BOOT0 | input | Boot mode selection input that sets the device boot source together with BOOT1. |+| 36 | VSS_3 | power_in | Digital ground pin for the I/Os and internal logic. |+| 37 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | QFN-36-EP(6x6) |+| Category | Embedded Processors & Controllers |+| Pins | 37 |++## CAD (KiCad official)++- Symbol: `STM32F101T6U6A`+- Footprint: `Package_DFN_QFN:QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm`+- 3D model: QFN-36-EP(6x6) (KiCad packages3D, STEP)+- 3D model files: `stm32f101t6u6a-etched.step` / `stm32f101t6u6a-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f101t6u6a.step` / `stm32f101t6u6a.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588923989997182976) (87 pp, sha256 `a0484b8e7d5434bf`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32f101t6u6a-datasheet.pdf)
page.jsonadded+374
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Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "embedded processors & controllers",+    "stm32f101t6u6a",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "stm32f101t6u6a.kicad_sym",+    "stm32f101t6u6a.kicad_mod",+    "stm32f101t6u6a.glb",+    "stm32f101t6u6a.step",+    "stm32f101t6u6a.lbr",+    "docs/hero.png",+    "docs/stm32f101t6u6a-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "stm32f101t6u6a-hero.glb",+    "stm32f101t6u6a-hero.overlay.json"+  ],+  "component": {+    "mpn": "STM32F101T6U6A",+    "manufacturer": "STMicroelectronics",+    "package": "QFN-36-EP(6x6)",+    "pin_count": 37,+    "category": "Embedded Processors & Controllers",+    "subcategory": "Microcontrollers (MCU/MPU/SOC)",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588923989997182976",+    "parts": {+      "symbol": "stm32f101t6u6a.kicad_sym",+      "footprint": "stm32f101t6u6a.kicad_mod",+      "model_3d": "stm32f101t6u6a-hero.glb",+      "model_3d_plain": "stm32f101t6u6a.glb",+      "model_3d_step": "stm32f101t6u6a-etched.step",+      "model_3d_step_plain": "stm32f101t6u6a.step",+      "lbr": "stm32f101t6u6a.lbr"+    },+    "distributor_links": {+      "lcsc": "C1339188",+      "digikey": "497-11510-ND",+      "mouser": "511-STM32F101T6U6A"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T04:47:00Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "497-11510-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "511-STM32F101T6U6A",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "VDD_3",+        "type": "power_in",+        "description": "Digital supply pin for I/Os and internal logic, specified for the 2.0 to 3.6 V application supply range."+      },+      {+        "number": "2",+        "name": "OSC_IN/PD0",+        "type": "input",+        "description": "External 4-16 MHz high-speed oscillator input after reset; the pin can be remapped by software to GPIO PD0."+      },+      {+        "number": "3",+        "name": "OSC_OUT/PD1",+        "type": "output",+        "description": "External 4-16 MHz high-speed oscillator output after reset; the pin can be remapped by software to GPIO PD1."+      },+      {+        "number": "4",+        "name": "NRST",+        "type": "bidirectional",+        "description": "Active reset pin for the device; its electrical limits are given in the NRST pin characteristics (Section 5.3.14)."+      },+      {+        "number": "5",+        "name": "VSSA",+        "type": "power_in",+        "description": "Analog ground reference for the ADC and analog blocks."+      },+      {+        "number": "6",+        "name": "VDDA",+        "type": "power_in",+        "description": "Analog supply for the ADC and analog blocks; the ADC conversion range is 0 to 3.6 V and the temperature sensor requires 2 V to 3.6 V."+      },+      {+        "number": "7",+        "name": "PA0-WKUP",+        "type": "bidirectional",+        "description": "General-purpose I/O (standard, not 5 V tolerant per Table 4) with WKUP, USART2_CTS, ADC_IN0 and TIM2_CH1_ETR alternate functions."+      },+      {+        "number": "8",+        "name": "PA1",+        "type": "bidirectional",+        "description": "General-purpose I/O (standard, not 5 V tolerant per Table 4) with USART2_RTS, ADC_IN1 and TIM2_CH2 alternate functions."+      },+      {+        "number": "9",+        "name": "PA2",+        "type": "bidirectional",+        "description": "General-purpose I/O (standard, not 5 V tolerant per Table 4) with USART2_TX, ADC_IN2 and TIM2_CH3 alternate functions."+      },+      {+        "number": "10",+        "name": "PA3",+        "type": "bidirectional",+        "description": "General-purpose I/O (standard, not 5 V tolerant per Table 4) with USART2_RX, ADC_IN3 and TIM2_CH4 alternate functions."+      },+      {+        "number": "11",+        "name": "PA4",+        "type": "bidirectional",+        "description": "General-purpose I/O (standard, not 5 V tolerant per Table 4) with SPI_NSS, ADC_IN4 and USART2_CK alternate functions."+      },+      {+        "number": "12",+        "name": "PA5",+        "type": "bidirectional",+        "description": "General-purpose I/O (standard, not 5 V tolerant per Table 4) with SPI_SCK and ADC_IN5 alternate functions."+      },+      {+        "number": "13",+        "name": "PA6",+        "type": "bidirectional",+        "description": "General-purpose I/O (standard, not 5 V tolerant per Table 4) with SPI_MISO, ADC_IN6 and TIM3_CH1 alternate functions."+      },+      {+        "number": "14",+        "name": "PA7",+        "type": "bidirectional",+        "description": "General-purpose I/O (standard, not 5 V tolerant per Table 4) with SPI_MOSI, ADC_IN7 and TIM3_CH2 alternate functions."+      },+      {+        "number": "15",+        "name": "PB0",+        "type": "bidirectional",+        "description": "General-purpose I/O (standard, not 5 V tolerant per Table 4) with ADC_IN8 and TIM3_CH3 alternate functions."+      },+      {+        "number": "16",+        "name": "PB1",+        "type": "bidirectional",+        "description": "General-purpose I/O (standard, not 5 V tolerant per Table 4) with ADC_IN9 and TIM3_CH4 alternate functions."+      },+      {+        "number": "17",+        "name": "PB2/BOOT1",+        "type": "bidirectional",+        "description": "5 V tolerant general-purpose I/O (FT) that also carries the BOOT1 boot-mode function."+      },+      {+        "number": "18",+        "name": "VSS_1",+        "type": "power_in",+        "description": "Digital ground pin for the I/Os and internal logic."+      },+      {+        "number": "19",+        "name": "VDD_1",+        "type": "power_in",+        "description": "Digital supply pin for I/Os and internal logic, specified for the 2.0 to 3.6 V application supply range."+      },+      {+        "number": "20",+        "name": "PA8",+        "type": "bidirectional",+        "description": "5 V tolerant general-purpose I/O (FT) with USART1_CK and MCO alternate functions."+      },+      {+        "number": "21",+        "name": "PA9",+        "type": "bidirectional",+        "description": "5 V tolerant general-purpose I/O (FT) with USART1_TX alternate function."+      },+      {+        "number": "22",+        "name": "PA10",+        "type": "bidirectional",+        "description": "5 V tolerant general-purpose I/O (FT) with USART1_RX alternate function."+      },+      {+        "number": "23",+        "name": "PA11",+        "type": "bidirectional",+        "description": "5 V tolerant general-purpose I/O (FT) with USART1_CTS alternate function."+      },+      {+        "number": "24",+        "name": "PA12",+        "type": "bidirectional",+        "description": "5 V tolerant general-purpose I/O (FT) with USART1_RTS alternate function."+      },+      {+        "number": "25",+        "name": "PA13",+        "type": "bidirectional",+        "description": "5 V tolerant I/O (FT) that carries the JTMS/SWDIO debug function after reset."+      },+      {+        "number": "26",+        "name": "VSS_2",+        "type": "power_in",+        "description": "Digital ground pin for the I/Os and internal logic."+      },+      {+        "number": "27",+        "name": "VDD_2",+        "type": "power_in",+        "description": "Digital supply pin for I/Os and internal logic, specified for the 2.0 to 3.6 V application supply range."+      },+      {+        "number": "28",+        "name": "PA14",+        "type": "bidirectional",+        "description": "5 V tolerant I/O (FT) that carries the JTCK/SWCLK debug function after reset."+      },+      {+        "number": "29",+        "name": "PA15",+        "type": "bidirectional",+        "description": "5 V tolerant general-purpose I/O (FT) with JTDI, TIM2_CH1_ETR and SPI_NSS alternate functions."+      },+      {+        "number": "30",+        "name": "PB3",+        "type": "bidirectional",+        "description": "5 V tolerant general-purpose I/O (FT) with JTDO/TRACESWO, TIM2_CH2 and SPI_SCK alternate functions."+      },+      {+        "number": "31",+        "name": "PB4",+        "type": "bidirectional",+        "description": "5 V tolerant general-purpose I/O (FT) with NJTRST, TIM3_CH1 and SPI_MISO alternate functions."+      },+      {+        "number": "32",+        "name": "PB5",+        "type": "bidirectional",+        "description": "General-purpose I/O (standard, not 5 V tolerant per Table 4) with I2C_SMBA, TIM3_CH2 and SPI_MOSI alternate functions."+      },+      {+        "number": "33",+        "name": "PB6",+        "type": "bidirectional",+        "description": "5 V tolerant general-purpose I/O (FT) with I2C_SCL and USART1_TX alternate functions."+      },+      {+        "number": "34",+        "name": "PB7",+        "type": "bidirectional",+        "description": "5 V tolerant general-purpose I/O (FT) with I2C_SDA and USART1_RX alternate functions."+      },+      {+        "number": "35",+        "name": "BOOT0",+        "type": "input",+        "description": "Boot mode selection input that sets the device boot source together with BOOT1."+      },+      {+        "number": "36",+        "name": "VSS_3",+        "type": "power_in",+        "description": "Digital ground pin for the I/Os and internal logic."+      },+      {+        "number": "37",+        "name": "EP",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Package naming: the hint 'QFN-36-EP(6x6)' maps to the datasheet's VFQFPN36 (36-pin, 6x6 mm, 0.5 mm p; Pins 2 and 3 are printed as OSC_IN/PD0 and OSC_OUT/PD1. Their post-reset function is the oscillator,; The 'not 5 V tolerant' description on the standard I/O pins (7-16 and 32) is inferred from the absen",+          "exposed pad 37 added from the footprint"+        ],+        "pages_sent": 36,+        "cost_usd": 0.1708,+        "at": "2026-10-08T04:46:41"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588923989997182976",+        "pages": 87,+        "sha256": "a0484b8e7d5434bf",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 37,+        "described": 37,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "stm32f101t6u6a.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          6,+          0.77+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "6212c4fd2463ccb7c6ae2c35f5e24c80884153fcaeaf8e86549c0e49087bc8bb",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "stm32f101t6u6a-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          6,+          0.77+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "c80945b3467e4f4a13dc39237da6e1565750ac428318efc47ea78f56173fd0de",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file