component
STM32F100C8T6BTR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+84@@ -0,0 +1,84 @@+# STM32F100C8T6BTR++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)++STM32F100C8T6BTR from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VBAT | power_in | Battery supply voltage and VDDA/VREF+ supply source, 1.8 to 3.6 V DC. |+| 2 | PC13-TAMPER-RTC | bidirectional | GPIO Port C bit 13, RTC tamper control and low-speed GPIO, max 2 MHz output with 30 pF load. |+| 3 | PC14-OSC32_IN | input | 32 kHz external oscillator input pin for real-time clock, 32.768 kHz crystal oscillator pin. |+| 4 | PC15-OSC32_OUT | output | 32 kHz external oscillator output pin for real-time clock, 32.768 kHz crystal oscillator pin. |+| 5 | OSC_IN | input | Main oscillator input pin, supports 4-24 MHz crystal oscillator or external clock source. |+| 6 | OSC_OUT | output | Main oscillator output pin, supports 4-24 MHz crystal oscillator or external clock source. |+| 7 | NRST | bidirectional | Active low reset pin, can be used as input reset or open-drain output with external pull-up. |+| 8 | VSSA | power_in | Analog supply ground, 0 V reference for ADC, DAC, and analog peripherals. |+| 9 | VDDA | power_in | Analog supply voltage, 2.4 to 3.6 V DC, powers ADC, DAC, and PLL. |+| 10 | PA0-WKUP | bidirectional | GPIO Port A bit 0, wake-up pin, USART2_CTS, ADC1_IN0, TIM2_CH1/ETR alternate functions. |+| 11 | PA1 | bidirectional | GPIO Port A bit 1, USART2_RTS, ADC1_IN1, TIM2_CH2 alternate functions. |+| 12 | PA2 | bidirectional | GPIO Port A bit 2, USART2_TX, ADC1_IN2, TIM2_CH3, TIM15_CH1 alternate functions. |+| 13 | PA3 | bidirectional | GPIO Port A bit 3, USART2_RX, ADC1_IN3, TIM2_CH4, TIM15_CH2 alternate functions. |+| 14 | PA4 | bidirectional | GPIO Port A bit 4, SPI1_NSS, ADC1_IN4, USART2_CK, DAC1_OUT alternate functions. |+| 15 | PA5 | bidirectional | GPIO Port A bit 5, SPI1_SCK, ADC1_IN5, DAC2_OUT alternate functions. |+| 16 | PA6 | bidirectional | GPIO Port A bit 6, 5V tolerant, SPI1_MISO, ADC1_IN6, TIM3_CH1 default, remappable to TIM1_BKIN/TIM16_CH1. |+| 17 | PA7 | bidirectional | GPIO Port A bit 7, 5V tolerant, SPI1_MOSI, ADC1_IN7, TIM3_CH2 default, remappable to TIM1_CH1N/TIM17_CH1. |+| 18 | PB0 | bidirectional | GPIO Port B bit 0, ADC1_IN8, TIM3_CH3 default, remappable to TIM1_CH2N. |+| 19 | PB1 | bidirectional | GPIO Port B bit 1, ADC1_IN9, TIM3_CH4 default, remappable to TIM1_CH3N. |+| 20 | PB2 | bidirectional | GPIO Port B bit 2 / BOOT1 pin, 5V tolerant, selects boot mode on device reset. |+| 21 | PB10 | bidirectional | GPIO Port B bit 10, 5V tolerant, I2C2_SCL, USART3_TX default, remappable to TIM2_CH3/HDMI_CEC. |+| 22 | PB11 | bidirectional | GPIO Port B bit 11, 5V tolerant, I2C2_SDA, USART3_RX default, remappable to TIM2_CH4. |+| 23 | VSS_1 | power_in | Digital supply ground, 0 V reference for digital logic. |+| 24 | VDD_1 | power_in | Digital supply voltage, 2.0 to 3.6 V DC, powers CPU core and digital logic. |+| 25 | PB12 | bidirectional | GPIO Port B bit 12, 5V tolerant, SPI2_NSS, I2C2_SMBA, TIM1_BKIN, USART3_CK alternate functions. |+| 26 | PB13 | bidirectional | GPIO Port B bit 13, 5V tolerant, SPI2_SCK, TIM1_CH1N default, remappable to USART3_CTS. |+| 27 | PB14 | bidirectional | GPIO Port B bit 14, 5V tolerant, SPI2_MISO, TIM1_CH2N, USART3_RTS default, remappable to TIM15_CH1. |+| 28 | PB15 | bidirectional | GPIO Port B bit 15, 5V tolerant, SPI2_MOSI, TIM1_CH3N, TIM15_CH1N default, remappable to TIM15_CH2. |+| 29 | PA8 | bidirectional | GPIO Port A bit 8, 5V tolerant, USART1_CK, MCO (master clock output), TIM1_CH1 alternate functions. |+| 30 | PA9 | bidirectional | GPIO Port A bit 9, 5V tolerant, USART1_TX, TIM1_CH2, TIM15_BKIN alternate functions. |+| 31 | PA10 | bidirectional | GPIO Port A bit 10, 5V tolerant, USART1_RX, TIM1_CH3, TIM17_BKIN alternate functions. |+| 32 | PA11 | bidirectional | GPIO Port A bit 11, 5V tolerant, USART1_CTS, TIM1_CH4 alternate functions. |+| 33 | PA12 | bidirectional | GPIO Port A bit 12, 5V tolerant, USART1_RTS, TIM1_ETR alternate functions. |+| 34 | PA13 | bidirectional | JTAG Test Mode Select / Serial Wire Debug I/O (JTMS-SWDIO), 5V tolerant, shared debug interface pin. |+| 35 | VSS_2 | power_in | Digital supply ground, 0 V reference for digital logic. |+| 36 | VDD_2 | power_in | Digital supply voltage, 2.0 to 3.6 V DC, powers CPU core and digital logic. |+| 37 | PA14 | bidirectional | JTAG Test Clock / Serial Wire Clock (JTCK-SWCLK), 5V tolerant, shared debug interface pin. |+| 38 | PA15 | bidirectional | JTAG Test Data In (JTDI), 5V tolerant, remappable to TIM2_CH1/ETR, SPI1_NSS, or GPIO PA15. |+| 39 | PB3 | bidirectional | JTAG Test Data Out / GPIO Port B bit 3, 5V tolerant, remappable to TIM2_CH2, trace output, or SPI1_SCK. |+| 40 | PB4 | bidirectional | JTAG Test Reset (NJTRST), 5V tolerant, remappable to GPIO PB4, TIM3_CH1, or SPI1_MISO. |+| 41 | PB5 | bidirectional | GPIO Port B bit 5, I2C1_SMBA, TIM16_BKIN default, remappable to TIM3_CH2 or SPI1_MOSI. |+| 42 | PB6 | bidirectional | GPIO Port B bit 6, 5V tolerant, I2C1_SCL, TIM4_CH1 default, remappable to TIM16_CH1N or USART1_TX. |+| 43 | PB7 | bidirectional | GPIO Port B bit 7, 5V tolerant, I2C1_SDA, TIM17_CH1N default, remappable to TIM4_CH2 or USART1_RX. |+| 44 | BOOT0 | input | Boot pin 0, selects boot source from flash memory (high) or SRAM/system memory (low) on device reset. |+| 45 | PB8 | bidirectional | GPIO Port B bit 8, 5V tolerant, TIM4_CH3, TIM16_CH1, CEC default, remappable to I2C1_SCL. |+| 46 | PB9 | bidirectional | GPIO Port B bit 9, 5V tolerant, TIM4_CH4, TIM17_CH1 default, remappable to I2C1_SDA. |+| 47 | VSS_3 | power_in | Digital supply ground, 0 V reference for digital logic. |+| 48 | VDD_3 | power_in | Digital supply voltage, 2.0 to 3.6 V DC, powers CPU core and digital logic. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-48(7x7) |+| Category | Embedded Processors & Controllers |+| Pins | 48 |++## CAD (KiCad official)++- Symbol: `STM32F100C8T6BTR`+- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`+- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)+- 3D model files: `stm32f100c8t6btr-etched.step` / `stm32f100c8t6btr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f100c8t6btr.step` / `stm32f100c8t6btr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589835979365384192) (96 pp, sha256 `360e3be010cabad4`, retrieved 2026-10-06, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32f100c8t6btr-datasheet.pdf)
page.jsonadded+399@@ -0,0 +1,399 @@+{+ "slug": "stm32f100c8t6btr",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32f100c8t6btr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32f100c8t6btr.kicad_sym",+ "stm32f100c8t6btr.kicad_mod",+ "stm32f100c8t6btr.glb",+ "stm32f100c8t6btr.step",+ "stm32f100c8t6btr.lbr",+ "docs/hero.png",+ "docs/stm32f100c8t6btr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm32f100c8t6btr-hero.glb",+ "stm32f100c8t6btr-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM32F100C8T6BTR",+ "manufacturer": "STMicroelectronics",+ "package": "LQFP-48(7x7)",+ "pin_count": 48,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589835979365384192",+ "parts": {+ "symbol": "stm32f100c8t6btr.kicad_sym",+ "footprint": "stm32f100c8t6btr.kicad_mod",+ "model_3d": "stm32f100c8t6btr-hero.glb",+ "model_3d_plain": "stm32f100c8t6btr.glb",+ "model_3d_step": "stm32f100c8t6btr-etched.step",+ "model_3d_step_plain": "stm32f100c8t6btr.step",+ "lbr": "stm32f100c8t6btr.lbr"+ },+ "distributor_links": {+ "lcsc": 2970082,+ "digikey": "497-17369-2-ND",+ "mouser": "511-STM32F100C8T6BTR"+ },+ "distributor_check": {+ "checked_at": "2026-10-06T04:25:38Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-17369-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32F100C8T6BTR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VBAT",+ "type": "power_in",+ "description": "Battery supply voltage and VDDA/VREF+ supply source, 1.8 to 3.6 V DC."+ },+ {+ "number": "2",+ "name": "PC13-TAMPER-RTC",+ "type": "bidirectional",+ "description": "GPIO Port C bit 13, RTC tamper control and low-speed GPIO, max 2 MHz output with 30 pF load."+ },+ {+ "number": "3",+ "name": "PC14-OSC32_IN",+ "type": "input",+ "description": "32 kHz external oscillator input pin for real-time clock, 32.768 kHz crystal oscillator pin."+ },+ {+ "number": "4",+ "name": "PC15-OSC32_OUT",+ "type": "output",+ "description": "32 kHz external oscillator output pin for real-time clock, 32.768 kHz crystal oscillator pin."+ },+ {+ "number": "5",+ "name": "OSC_IN",+ "type": "input",+ "description": "Main oscillator input pin, supports 4-24 MHz crystal oscillator or external clock source."+ },+ {+ "number": "6",+ "name": "OSC_OUT",+ "type": "output",+ "description": "Main oscillator output pin, supports 4-24 MHz crystal oscillator or external clock source."+ },+ {+ "number": "7",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Active low reset pin, can be used as input reset or open-drain output with external pull-up."+ },+ {+ "number": "8",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog supply ground, 0 V reference for ADC, DAC, and analog peripherals."+ },+ {+ "number": "9",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog supply voltage, 2.4 to 3.6 V DC, powers ADC, DAC, and PLL."+ },+ {+ "number": "10",+ "name": "PA0-WKUP",+ "type": "bidirectional",+ "description": "GPIO Port A bit 0, wake-up pin, USART2_CTS, ADC1_IN0, TIM2_CH1/ETR alternate functions."+ },+ {+ "number": "11",+ "name": "PA1",+ "type": "bidirectional",+ "description": "GPIO Port A bit 1, USART2_RTS, ADC1_IN1, TIM2_CH2 alternate functions."+ },+ {+ "number": "12",+ "name": "PA2",+ "type": "bidirectional",+ "description": "GPIO Port A bit 2, USART2_TX, ADC1_IN2, TIM2_CH3, TIM15_CH1 alternate functions."+ },+ {+ "number": "13",+ "name": "PA3",+ "type": "bidirectional",+ "description": "GPIO Port A bit 3, USART2_RX, ADC1_IN3, TIM2_CH4, TIM15_CH2 alternate functions."+ },+ {+ "number": "14",+ "name": "PA4",+ "type": "bidirectional",+ "description": "GPIO Port A bit 4, SPI1_NSS, ADC1_IN4, USART2_CK, DAC1_OUT alternate functions."+ },+ {+ "number": "15",+ "name": "PA5",+ "type": "bidirectional",+ "description": "GPIO Port A bit 5, SPI1_SCK, ADC1_IN5, DAC2_OUT alternate functions."+ },+ {+ "number": "16",+ "name": "PA6",+ "type": "bidirectional",+ "description": "GPIO Port A bit 6, 5V tolerant, SPI1_MISO, ADC1_IN6, TIM3_CH1 default, remappable to TIM1_BKIN/TIM16_CH1."+ },+ {+ "number": "17",+ "name": "PA7",+ "type": "bidirectional",+ "description": "GPIO Port A bit 7, 5V tolerant, SPI1_MOSI, ADC1_IN7, TIM3_CH2 default, remappable to TIM1_CH1N/TIM17_CH1."+ },+ {+ "number": "18",+ "name": "PB0",+ "type": "bidirectional",+ "description": "GPIO Port B bit 0, ADC1_IN8, TIM3_CH3 default, remappable to TIM1_CH2N."+ },+ {+ "number": "19",+ "name": "PB1",+ "type": "bidirectional",+ "description": "GPIO Port B bit 1, ADC1_IN9, TIM3_CH4 default, remappable to TIM1_CH3N."+ },+ {+ "number": "20",+ "name": "PB2",+ "type": "bidirectional",+ "description": "GPIO Port B bit 2 / BOOT1 pin, 5V tolerant, selects boot mode on device reset."+ },+ {+ "number": "21",+ "name": "PB10",+ "type": "bidirectional",+ "description": "GPIO Port B bit 10, 5V tolerant, I2C2_SCL, USART3_TX default, remappable to TIM2_CH3/HDMI_CEC."+ },+ {+ "number": "22",+ "name": "PB11",+ "type": "bidirectional",+ "description": "GPIO Port B bit 11, 5V tolerant, I2C2_SDA, USART3_RX default, remappable to TIM2_CH4."+ },+ {+ "number": "23",+ "name": "VSS_1",+ "type": "power_in",+ "description": "Digital supply ground, 0 V reference for digital logic."+ },+ {+ "number": "24",+ "name": "VDD_1",+ "type": "power_in",+ "description": "Digital supply voltage, 2.0 to 3.6 V DC, powers CPU core and digital logic."+ },+ {+ "number": "25",+ "name": "PB12",+ "type": "bidirectional",+ "description": "GPIO Port B bit 12, 5V tolerant, SPI2_NSS, I2C2_SMBA, TIM1_BKIN, USART3_CK alternate functions."+ },+ {+ "number": "26",+ "name": "PB13",+ "type": "bidirectional",+ "description": "GPIO Port B bit 13, 5V tolerant, SPI2_SCK, TIM1_CH1N default, remappable to USART3_CTS."+ },+ {+ "number": "27",+ "name": "PB14",+ "type": "bidirectional",+ "description": "GPIO Port B bit 14, 5V tolerant, SPI2_MISO, TIM1_CH2N, USART3_RTS default, remappable to TIM15_CH1."+ },+ {+ "number": "28",+ "name": "PB15",+ "type": "bidirectional",+ "description": "GPIO Port B bit 15, 5V tolerant, SPI2_MOSI, TIM1_CH3N, TIM15_CH1N default, remappable to TIM15_CH2."+ },+ {+ "number": "29",+ "name": "PA8",+ "type": "bidirectional",+ "description": "GPIO Port A bit 8, 5V tolerant, USART1_CK, MCO (master clock output), TIM1_CH1 alternate functions."+ },+ {+ "number": "30",+ "name": "PA9",+ "type": "bidirectional",+ "description": "GPIO Port A bit 9, 5V tolerant, USART1_TX, TIM1_CH2, TIM15_BKIN alternate functions."+ },+ {+ "number": "31",+ "name": "PA10",+ "type": "bidirectional",+ "description": "GPIO Port A bit 10, 5V tolerant, USART1_RX, TIM1_CH3, TIM17_BKIN alternate functions."+ },+ {+ "number": "32",+ "name": "PA11",+ "type": "bidirectional",+ "description": "GPIO Port A bit 11, 5V tolerant, USART1_CTS, TIM1_CH4 alternate functions."+ },+ {+ "number": "33",+ "name": "PA12",+ "type": "bidirectional",+ "description": "GPIO Port A bit 12, 5V tolerant, USART1_RTS, TIM1_ETR alternate functions."+ },+ {+ "number": "34",+ "name": "PA13",+ "type": "bidirectional",+ "description": "JTAG Test Mode Select / Serial Wire Debug I/O (JTMS-SWDIO), 5V tolerant, shared debug interface pin."+ },+ {+ "number": "35",+ "name": "VSS_2",+ "type": "power_in",+ "description": "Digital supply ground, 0 V reference for digital logic."+ },+ {+ "number": "36",+ "name": "VDD_2",+ "type": "power_in",+ "description": "Digital supply voltage, 2.0 to 3.6 V DC, powers CPU core and digital logic."+ },+ {+ "number": "37",+ "name": "PA14",+ "type": "bidirectional",+ "description": "JTAG Test Clock / Serial Wire Clock (JTCK-SWCLK), 5V tolerant, shared debug interface pin."+ },+ {+ "number": "38",+ "name": "PA15",+ "type": "bidirectional",+ "description": "JTAG Test Data In (JTDI), 5V tolerant, remappable to TIM2_CH1/ETR, SPI1_NSS, or GPIO PA15."+ },+ {+ "number": "39",+ "name": "PB3",+ "type": "bidirectional",+ "description": "JTAG Test Data Out / GPIO Port B bit 3, 5V tolerant, remappable to TIM2_CH2, trace output, or SPI1_SCK."+ },+ {+ "number": "40",+ "name": "PB4",+ "type": "bidirectional",+ "description": "JTAG Test Reset (NJTRST), 5V tolerant, remappable to GPIO PB4, TIM3_CH1, or SPI1_MISO."+ },+ {+ "number": "41",+ "name": "PB5",+ "type": "bidirectional",+ "description": "GPIO Port B bit 5, I2C1_SMBA, TIM16_BKIN default, remappable to TIM3_CH2 or SPI1_MOSI."+ },+ {+ "number": "42",+ "name": "PB6",+ "type": "bidirectional",+ "description": "GPIO Port B bit 6, 5V tolerant, I2C1_SCL, TIM4_CH1 default, remappable to TIM16_CH1N or USART1_TX."+ },+ {+ "number": "43",+ "name": "PB7",+ "type": "bidirectional",+ "description": "GPIO Port B bit 7, 5V tolerant, I2C1_SDA, TIM17_CH1N default, remappable to TIM4_CH2 or USART1_RX."+ },+ {+ "number": "44",+ "name": "BOOT0",+ "type": "input",+ "description": "Boot pin 0, selects boot source from flash memory (high) or SRAM/system memory (low) on device reset."+ },+ {+ "number": "45",+ "name": "PB8",+ "type": "bidirectional",+ "description": "GPIO Port B bit 8, 5V tolerant, TIM4_CH3, TIM16_CH1, CEC default, remappable to I2C1_SCL."+ },+ {+ "number": "46",+ "name": "PB9",+ "type": "bidirectional",+ "description": "GPIO Port B bit 9, 5V tolerant, TIM4_CH4, TIM17_CH1 default, remappable to I2C1_SDA."+ },+ {+ "number": "47",+ "name": "VSS_3",+ "type": "power_in",+ "description": "Digital supply ground, 0 V reference for digital logic."+ },+ {+ "number": "48",+ "name": "VDD_3",+ "type": "power_in",+ "description": "Digital supply voltage, 2.0 to 3.6 V DC, powers CPU core and digital logic."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: PC13, PC14, PC15 pins have restricted output drive capability: max 2 MHz with 30 pF load, must not b; OSC_IN and OSC_OUT pins can be remapped to PD0 and PD1 respectively through software configuration; ; PA13, PA14, PA15, PB3, PB4 share JTAG debug interface functions and must be carefully configured to "+ ],+ "pages_sent": 46,+ "cost_usd": 0.343,+ "at": "2026-10-06T04:25:14"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589835979365384192",+ "pages": 96,+ "sha256": "360e3be010cabad4",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 48,+ "described": 48,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}