component
STM32F051K6T7
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+68@@ -0,0 +1,68 @@+# STM32F051K6T7++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)++STM32F051K6T7 from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD | power_in | Digital power supply (VDD = 2.0 V to 3.6 V) |+| 2 | PF0-OSC_IN | input | Port F bit 0, oscillator input pin for external crystal oscillator (4 to 32 MHz) |+| 3 | PF1-OSC_OUT | output | Port F bit 1, oscillator output pin for external crystal oscillator |+| 4 | NRST | bidirectional | Device reset input / internal reset output (active low) with embedded weak pull-up resistor |+| 5 | VDDA | power_in | Analog power supply for ADC, DAC, and comparators (from VDD to 3.6 V, minimum 2.4 V) |+| 6 | PA0 | bidirectional | GPIO Port A bit 0, 3.3V tolerant I/O connectable to ADC_IN0, supporting USART2_CTS, TIM2_CH1_ETR, COMP1_OUT, TSC_G1_IO1, RTC_TAMP2, WKUP1 |+| 7 | PA1 | bidirectional | GPIO Port A bit 1, 3.3V tolerant I/O connectable to ADC_IN1, supporting USART2_RTS, TIM2_CH2, TSC_G1_IO2, EVENTOUT, COMP1_INP |+| 8 | PA2 | bidirectional | GPIO Port A bit 2, 3.3V tolerant I/O connectable to ADC_IN2, supporting USART2_TX, TIM2_CH3, TIM15_CH1, COMP2_OUT, TSC_G1_IO3, COMP2_INM6 |+| 9 | PA3 | bidirectional | GPIO Port A bit 3, 3.3V tolerant I/O connectable to ADC_IN3, supporting USART2_RX, TIM2_CH4, TIM15_CH2, TSC_G1_IO4, COMP2_INP |+| 10 | PA4 | bidirectional | GPIO Port A bit 4, 3.3V tolerant I/O connectable to ADC_IN4 and DAC_OUT1, supporting SPI1_NSS, I2S1_WS, USART2_CK, TIM14_CH1, TSC_G2_IO1, COMP1_INM4, COMP2_INM4 |+| 11 | PA5 | bidirectional | GPIO Port A bit 5, 3.3V tolerant I/O connectable to ADC_IN5, supporting SPI1_SCK, I2S1_CK, CEC, TIM2_CH1_ETR, TSC_G2_IO2, COMP1_INM5, COMP2_INM5 |+| 12 | PA6 | bidirectional | GPIO Port A bit 6, 3.3V tolerant I/O connectable to ADC_IN6, supporting SPI1_MISO, I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, COMP1_OUT, TSC_G2_IO3, EVENTOUT |+| 13 | PA7 | bidirectional | GPIO Port A bit 7, 3.3V tolerant I/O connectable to ADC_IN7, supporting SPI1_MOSI, I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, COMP2_OUT, TSC_G2_IO4, EVENTOUT |+| 14 | PB0 | bidirectional | GPIO Port B bit 0, 3.3V tolerant I/O connectable to ADC_IN8, supporting TIM3_CH3, TIM1_CH2N, TSC_G3_IO2, EVENTOUT |+| 15 | PB1 | bidirectional | GPIO Port B bit 1, 3.3V tolerant I/O connectable to ADC_IN9, supporting TIM3_CH4, TIM14_CH1, TIM1_CH3N, TSC_G3_IO3 |+| 16 | VSS | power_in | Digital ground (0 V) |+| 17 | VDD | power_in | Digital power supply (VDD = 2.0 V to 3.6 V) |+| 18 | PA8 | bidirectional | GPIO Port A bit 8, 5V tolerant I/O supporting USART1_CK, TIM1_CH1, EVENTOUT, MCO (master clock output) |+| 19 | PA9 | bidirectional | GPIO Port A bit 9, 5V tolerant I/O supporting USART1_TX, TIM1_CH2, TIM15_BKIN, TSC_G4_IO1 |+| 20 | PA10 | bidirectional | GPIO Port A bit 10, 5V tolerant I/O supporting USART1_RX, TIM1_CH3, TIM17_BKIN, TSC_G4_IO2 |+| 21 | PA11 | bidirectional | GPIO Port A bit 11, 5V tolerant I/O supporting USART1_CTS, TIM1_CH4, COMP1_OUT, TSC_G4_IO3, EVENTOUT |+| 22 | PA12 | bidirectional | GPIO Port A bit 12, 5V tolerant I/O supporting USART1_RTS, TIM1_ETR, COMP2_OUT, TSC_G4_IO4, EVENTOUT |+| 23 | PA13 (SWDIO) | bidirectional | GPIO Port A bit 13, 5V tolerant I/O for Serial Wire Debug I/O with internal pull-up; after reset configured as SWDIO with internal pull-up activated, supporting IR_OUT |+| 24 | PA14 (SWCLK) | bidirectional | GPIO Port A bit 14, 5V tolerant I/O for Serial Wire Debug Clock with internal pull-down; after reset configured as SWCLK with internal pull-down activated, supporting USART2_TX |+| 25 | PA15 | bidirectional | GPIO Port A bit 15, 5V tolerant I/O supporting SPI1_NSS, I2S1_WS, USART2_RX, TIM2_CH1_ETR, EVENTOUT |+| 26 | PB3 | bidirectional | GPIO Port B bit 3, 5V tolerant I/O supporting SPI1_SCK, I2S1_CK, TIM2_CH2, TSC_G5_IO1, EVENTOUT |+| 27 | PB4 | bidirectional | GPIO Port B bit 4, 5V tolerant I/O supporting SPI1_MISO, I2S1_MCK, TIM3_CH1, TSC_G5_IO2, EVENTOUT |+| 28 | PB5 | bidirectional | GPIO Port B bit 5, 5V tolerant I/O supporting SPI1_MOSI, I2S1_SD, I2C1_SMBA, TIM16_BKIN, TIM3_CH2 |+| 29 | PB6 | bidirectional | GPIO Port B bit 6, 5V tolerant FM+ I/O for I2C1_SCL supporting USART1_TX, TIM16_CH1N, TSC_G5_IO3 with 20 mA sink current capability |+| 30 | PB7 | bidirectional | GPIO Port B bit 7, 5V tolerant FM+ I/O for I2C1_SDA supporting USART1_RX, TIM17_CH1N, TSC_G5_IO4 with 20 mA sink current capability |+| 31 | BOOT0 | input | Dedicated boot memory selection input pin determining whether code executes from Flash memory or system memory at startup |+| 32 | VSS | power_in | Digital ground (0 V) |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-32(7x7) |+| Category | Embedded Processors & Controllers |+| Pins | 32 |++## CAD (KiCad official)++- Symbol: `STM32F051K6T7`+- Footprint: `Package_QFP:LQFP-32_7x7mm_P0.8mm`+- 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)+- 3D model files: `stm32f051k6t7-etched.step` / `stm32f051k6t7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f051k6t7.step` / `stm32f051k6t7.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922100291264512) (122 pp, sha256 `80848a22804e56d8`, retrieved 2026-10-01, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32f051k6t7-datasheet.pdf)
page.jsonadded+301@@ -0,0 +1,301 @@+{+ "slug": "stm32f051k6t7",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32f051k6t7",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32f051k6t7.kicad_sym",+ "stm32f051k6t7.kicad_mod",+ "stm32f051k6t7.glb",+ "stm32f051k6t7.step",+ "stm32f051k6t7.lbr",+ "docs/hero.png",+ "docs/stm32f051k6t7-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "STM32F051K6T7",+ "manufacturer": "STMicroelectronics",+ "package": "LQFP-32(7x7)",+ "pin_count": 32,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922100291264512",+ "parts": {+ "symbol": "stm32f051k6t7.kicad_sym",+ "footprint": "stm32f051k6t7.kicad_mod",+ "model_3d": "stm32f051k6t7-etched.glb",+ "model_3d_plain": "stm32f051k6t7.glb",+ "model_3d_step": "stm32f051k6t7-etched.step",+ "model_3d_step_plain": "stm32f051k6t7.step",+ "lbr": "stm32f051k6t7.lbr"+ },+ "distributor_links": {+ "lcsc": "C1338923",+ "digikey": "497-16727-ND",+ "mouser": "511-STM32F051K6T7"+ },+ "distributor_check": {+ "checked_at": "2026-10-01T05:56:09Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-16727-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32F051K6T7",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital power supply (VDD = 2.0 V to 3.6 V)"+ },+ {+ "number": "2",+ "name": "PF0-OSC_IN",+ "type": "input",+ "description": "Port F bit 0, oscillator input pin for external crystal oscillator (4 to 32 MHz)"+ },+ {+ "number": "3",+ "name": "PF1-OSC_OUT",+ "type": "output",+ "description": "Port F bit 1, oscillator output pin for external crystal oscillator"+ },+ {+ "number": "4",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Device reset input / internal reset output (active low) with embedded weak pull-up resistor"+ },+ {+ "number": "5",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog power supply for ADC, DAC, and comparators (from VDD to 3.6 V, minimum 2.4 V)"+ },+ {+ "number": "6",+ "name": "PA0",+ "type": "bidirectional",+ "description": "GPIO Port A bit 0, 3.3V tolerant I/O connectable to ADC_IN0, supporting USART2_CTS, TIM2_CH1_ETR, COMP1_OUT, TSC_G1_IO1, RTC_TAMP2, WKUP1"+ },+ {+ "number": "7",+ "name": "PA1",+ "type": "bidirectional",+ "description": "GPIO Port A bit 1, 3.3V tolerant I/O connectable to ADC_IN1, supporting USART2_RTS, TIM2_CH2, TSC_G1_IO2, EVENTOUT, COMP1_INP"+ },+ {+ "number": "8",+ "name": "PA2",+ "type": "bidirectional",+ "description": "GPIO Port A bit 2, 3.3V tolerant I/O connectable to ADC_IN2, supporting USART2_TX, TIM2_CH3, TIM15_CH1, COMP2_OUT, TSC_G1_IO3, COMP2_INM6"+ },+ {+ "number": "9",+ "name": "PA3",+ "type": "bidirectional",+ "description": "GPIO Port A bit 3, 3.3V tolerant I/O connectable to ADC_IN3, supporting USART2_RX, TIM2_CH4, TIM15_CH2, TSC_G1_IO4, COMP2_INP"+ },+ {+ "number": "10",+ "name": "PA4",+ "type": "bidirectional",+ "description": "GPIO Port A bit 4, 3.3V tolerant I/O connectable to ADC_IN4 and DAC_OUT1, supporting SPI1_NSS, I2S1_WS, USART2_CK, TIM14_CH1, TSC_G2_IO1, COMP1_INM4, COMP2_INM4"+ },+ {+ "number": "11",+ "name": "PA5",+ "type": "bidirectional",+ "description": "GPIO Port A bit 5, 3.3V tolerant I/O connectable to ADC_IN5, supporting SPI1_SCK, I2S1_CK, CEC, TIM2_CH1_ETR, TSC_G2_IO2, COMP1_INM5, COMP2_INM5"+ },+ {+ "number": "12",+ "name": "PA6",+ "type": "bidirectional",+ "description": "GPIO Port A bit 6, 3.3V tolerant I/O connectable to ADC_IN6, supporting SPI1_MISO, I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, COMP1_OUT, TSC_G2_IO3, EVENTOUT"+ },+ {+ "number": "13",+ "name": "PA7",+ "type": "bidirectional",+ "description": "GPIO Port A bit 7, 3.3V tolerant I/O connectable to ADC_IN7, supporting SPI1_MOSI, I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, COMP2_OUT, TSC_G2_IO4, EVENTOUT"+ },+ {+ "number": "14",+ "name": "PB0",+ "type": "bidirectional",+ "description": "GPIO Port B bit 0, 3.3V tolerant I/O connectable to ADC_IN8, supporting TIM3_CH3, TIM1_CH2N, TSC_G3_IO2, EVENTOUT"+ },+ {+ "number": "15",+ "name": "PB1",+ "type": "bidirectional",+ "description": "GPIO Port B bit 1, 3.3V tolerant I/O connectable to ADC_IN9, supporting TIM3_CH4, TIM14_CH1, TIM1_CH3N, TSC_G3_IO3"+ },+ {+ "number": "16",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground (0 V)"+ },+ {+ "number": "17",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital power supply (VDD = 2.0 V to 3.6 V)"+ },+ {+ "number": "18",+ "name": "PA8",+ "type": "bidirectional",+ "description": "GPIO Port A bit 8, 5V tolerant I/O supporting USART1_CK, TIM1_CH1, EVENTOUT, MCO (master clock output)"+ },+ {+ "number": "19",+ "name": "PA9",+ "type": "bidirectional",+ "description": "GPIO Port A bit 9, 5V tolerant I/O supporting USART1_TX, TIM1_CH2, TIM15_BKIN, TSC_G4_IO1"+ },+ {+ "number": "20",+ "name": "PA10",+ "type": "bidirectional",+ "description": "GPIO Port A bit 10, 5V tolerant I/O supporting USART1_RX, TIM1_CH3, TIM17_BKIN, TSC_G4_IO2"+ },+ {+ "number": "21",+ "name": "PA11",+ "type": "bidirectional",+ "description": "GPIO Port A bit 11, 5V tolerant I/O supporting USART1_CTS, TIM1_CH4, COMP1_OUT, TSC_G4_IO3, EVENTOUT"+ },+ {+ "number": "22",+ "name": "PA12",+ "type": "bidirectional",+ "description": "GPIO Port A bit 12, 5V tolerant I/O supporting USART1_RTS, TIM1_ETR, COMP2_OUT, TSC_G4_IO4, EVENTOUT"+ },+ {+ "number": "23",+ "name": "PA13 (SWDIO)",+ "type": "bidirectional",+ "description": "GPIO Port A bit 13, 5V tolerant I/O for Serial Wire Debug I/O with internal pull-up; after reset configured as SWDIO with internal pull-up activated, supporting IR_OUT"+ },+ {+ "number": "24",+ "name": "PA14 (SWCLK)",+ "type": "bidirectional",+ "description": "GPIO Port A bit 14, 5V tolerant I/O for Serial Wire Debug Clock with internal pull-down; after reset configured as SWCLK with internal pull-down activated, supporting USART2_TX"+ },+ {+ "number": "25",+ "name": "PA15",+ "type": "bidirectional",+ "description": "GPIO Port A bit 15, 5V tolerant I/O supporting SPI1_NSS, I2S1_WS, USART2_RX, TIM2_CH1_ETR, EVENTOUT"+ },+ {+ "number": "26",+ "name": "PB3",+ "type": "bidirectional",+ "description": "GPIO Port B bit 3, 5V tolerant I/O supporting SPI1_SCK, I2S1_CK, TIM2_CH2, TSC_G5_IO1, EVENTOUT"+ },+ {+ "number": "27",+ "name": "PB4",+ "type": "bidirectional",+ "description": "GPIO Port B bit 4, 5V tolerant I/O supporting SPI1_MISO, I2S1_MCK, TIM3_CH1, TSC_G5_IO2, EVENTOUT"+ },+ {+ "number": "28",+ "name": "PB5",+ "type": "bidirectional",+ "description": "GPIO Port B bit 5, 5V tolerant I/O supporting SPI1_MOSI, I2S1_SD, I2C1_SMBA, TIM16_BKIN, TIM3_CH2"+ },+ {+ "number": "29",+ "name": "PB6",+ "type": "bidirectional",+ "description": "GPIO Port B bit 6, 5V tolerant FM+ I/O for I2C1_SCL supporting USART1_TX, TIM16_CH1N, TSC_G5_IO3 with 20 mA sink current capability"+ },+ {+ "number": "30",+ "name": "PB7",+ "type": "bidirectional",+ "description": "GPIO Port B bit 7, 5V tolerant FM+ I/O for I2C1_SDA supporting USART1_RX, TIM17_CH1N, TSC_G5_IO4 with 20 mA sink current capability"+ },+ {+ "number": "31",+ "name": "BOOT0",+ "type": "input",+ "description": "Dedicated boot memory selection input pin determining whether code executes from Flash memory or system memory at startup"+ },+ {+ "number": "32",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground (0 V)"+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin 1 identified as VDD from row 64 (LQFP64 pin 64) in Table 13; verification against LQFP32 package; VBAT pin is listed in the datasheet (row 1, Table 13) but does not appear in LQFP32 package - only p"+ ],+ "pages_sent": 57,+ "cost_usd": 0.4055,+ "at": "2026-10-01T05:55:49"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922100291264512",+ "pages": 122,+ "sha256": "80848a22804e56d8",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 32,+ "described": 32,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}