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STM32F051C8U7
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+85@@ -0,0 +1,85 @@+# STM32F051C8U7++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · UFQFPN-48(7x7)++STM32F051C8U7 from STMicroelectronics, in a UFQFPN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VBAT | power_in | Backup power supply for the RTC and backup registers when VDD is not present. |+| 2 | PC13 | bidirectional | Standard 3.3 V I/O supplied through the power switch, limited to a 3 mA sink, so output speed must not exceed 2 MHz at 30 pF and it must not source current such as driving an LED; additional functions RTC_TAMP1, RTC_TS, RTC_OUT, WKUP2. |+| 3 | PC14-OSC32_IN | bidirectional | Standard 3.3 V I/O on the power-switch supply with the same 3 mA, 2 MHz and 30 pF output limits, also used as OSC32_IN for the 32 kHz oscillator. |+| 4 | PC15-OSC32_OUT | bidirectional | Standard 3.3 V I/O on the power-switch supply with the same 3 mA, 2 MHz and 30 pF output limits, also used as OSC32_OUT for the 32 kHz oscillator. |+| 5 | PF0-OSC_IN | bidirectional | 5 V-tolerant I/O, also used as OSC_IN for the 4 to 32 MHz crystal oscillator. |+| 6 | PF1-OSC_OUT | bidirectional | 5 V-tolerant I/O, also used as OSC_OUT for the 4 to 32 MHz crystal oscillator. |+| 7 | NRST | bidirectional | Active-low bidirectional device reset input and internal reset output with an embedded weak pull-up resistor. |+| 8 | VSSA | power_in | Analog ground; a distinct VSSA pin is provided on packages with 48 or more pins. |+| 9 | VDDA | power_in | Analog power supply, from VDD up to 3.6 V. |+| 10 | PA0 | bidirectional | 3.3 V-tolerant I/O directly connected to the ADC; alternate functions USART2_CTS, TIM2_CH1_ETR, COMP1_OUT, TSC_G1_IO1; additional functions ADC_IN0, COMP1_INM6, RTC_TAMP2, WKUP1. |+| 11 | PA1 | bidirectional | 3.3 V-tolerant I/O directly connected to the ADC; alternate functions USART2_RTS, TIM2_CH2, TSC_G1_IO2, EVENTOUT; additional functions ADC_IN1, COMP1_INP. |+| 12 | PA2 | bidirectional | 3.3 V-tolerant I/O directly connected to the ADC; alternate functions USART2_TX, TIM2_CH3, TIM15_CH1, COMP2_OUT, TSC_G1_IO3; additional functions ADC_IN2, COMP2_INM6. |+| 13 | PA3 | bidirectional | 3.3 V-tolerant I/O directly connected to the ADC; alternate functions USART2_RX, TIM2_CH4, TIM15_CH2, TSC_G1_IO4; additional functions ADC_IN3, COMP2_INP. |+| 14 | PA4 | bidirectional | 3.3 V-tolerant I/O directly connected to the ADC; alternate functions SPI1_NSS, I2S1_WS, USART2_CK, TIM14_CH1, TSC_G2_IO1; additional functions ADC_IN4, COMP1_INM4, COMP2_INM4, DAC_OUT1. |+| 15 | PA5 | bidirectional | 3.3 V-tolerant I/O directly connected to the ADC; alternate functions SPI1_SCK, I2S1_CK, CEC, TIM2_CH1_ETR, TSC_G2_IO2; additional functions ADC_IN5, COMP1_INM5, COMP2_INM5. |+| 16 | PA6 | bidirectional | 3.3 V-tolerant I/O directly connected to the ADC; alternate functions SPI1_MISO, I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, COMP1_OUT, TSC_G2_IO3, EVENTOUT; additional function ADC_IN6. |+| 17 | PA7 | bidirectional | 3.3 V-tolerant I/O directly connected to the ADC; alternate functions SPI1_MOSI, I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, COMP2_OUT, TSC_G2_IO4, EVENTOUT; additional function ADC_IN7. |+| 18 | PB0 | bidirectional | 3.3 V-tolerant I/O directly connected to the ADC; alternate functions TIM3_CH3, TIM1_CH2N, TSC_G3_IO2, EVENTOUT; additional function ADC_IN8. |+| 19 | PB1 | bidirectional | 3.3 V-tolerant I/O directly connected to the ADC; alternate functions TIM3_CH4, TIM14_CH1, TIM1_CH3N, TSC_G3_IO3; additional function ADC_IN9. |+| 20 | PB2 | bidirectional | 5 V-tolerant I/O; alternate function TSC_G3_IO4. |+| 21 | PB10 | bidirectional | 5 V-tolerant I/O; alternate functions I2C2_SCL, CEC, TIM2_CH3, TSC_SYNC. |+| 22 | PB11 | bidirectional | 5 V-tolerant I/O; alternate functions I2C2_SDA, TIM2_CH4, TSC_G6_IO1, EVENTOUT. |+| 23 | VSS | power_in | Digital ground. |+| 24 | VDD | power_in | Digital power supply, 2.0 V to 3.6 V. |+| 25 | PB12 | bidirectional | 5 V-tolerant I/O; alternate functions SPI2_NSS, TIM1_BKIN, TSC_G6_IO2, EVENTOUT. |+| 26 | PB13 | bidirectional | 5 V-tolerant I/O; alternate functions SPI2_SCK, TIM1_CH1N, TSC_G6_IO3. |+| 27 | PB14 | bidirectional | 5 V-tolerant I/O; alternate functions SPI2_MISO, TIM15_CH1, TIM1_CH2N, TSC_G6_IO4. |+| 28 | PB15 | bidirectional | 5 V-tolerant I/O; alternate functions SPI2_MOSI, TIM15_CH2, TIM1_CH3N, TIM15_CH1N; additional function RTC_REFIN. |+| 29 | PA8 | bidirectional | 5 V-tolerant I/O; alternate functions MCO, USART1_CK, TIM1_CH1, EVENTOUT. |+| 30 | PA9 | bidirectional | 5 V-tolerant I/O; alternate functions TIM15_BKIN, USART1_TX, TIM1_CH2, TSC_G4_IO1. |+| 31 | PA10 | bidirectional | 5 V-tolerant I/O; alternate functions TIM17_BKIN, USART1_RX, TIM1_CH3, TSC_G4_IO2. |+| 32 | PA11 | bidirectional | 5 V-tolerant I/O; alternate functions EVENTOUT, USART1_CTS, TIM1_CH4, TSC_G4_IO3, COMP1_OUT. |+| 33 | PA12 | bidirectional | 5 V-tolerant I/O; alternate functions USART1_RTS, TIM1_ETR, COMP2_OUT, TSC_G4_IO4, EVENTOUT. |+| 34 | PA13 | bidirectional | 5 V-tolerant I/O configured as SWDIO after reset with the internal pull-up enabled; alternate function IR_OUT. |+| 35 | PF6 | bidirectional | 5 V-tolerant I/O; alternate function I2C2_SCL. |+| 36 | PF7 | bidirectional | 5 V-tolerant I/O; alternate function I2C2_SDA. |+| 37 | PA14 | bidirectional | 5 V-tolerant I/O configured as SWCLK after reset with the internal pull-down enabled; alternate function USART2_TX. |+| 38 | PA15 | bidirectional | 5 V-tolerant I/O; alternate functions SPI1_NSS, I2S1_WS, USART2_RX, TIM2_CH1_ETR, EVENTOUT. |+| 39 | PB3 | bidirectional | 5 V-tolerant I/O; alternate functions SPI1_SCK, I2S1_CK, TIM2_CH2, TSC_G5_IO1, EVENTOUT. |+| 40 | PB4 | bidirectional | 5 V-tolerant I/O; alternate functions SPI1_MISO, I2S1_MCK, TIM3_CH1, TSC_G5_IO2, EVENTOUT. |+| 41 | PB5 | bidirectional | 5 V-tolerant I/O; alternate functions SPI1_MOSI, I2S1_SD, I2C1_SMBA, TIM16_BKIN, TIM3_CH2. |+| 42 | PB6 | bidirectional | 5 V-tolerant I/O with FM+ capability; alternate functions I2C1_SCL, USART1_TX, TIM16_CH1N, TSC_G5_IO3. |+| 43 | PB7 | bidirectional | 5 V-tolerant I/O with FM+ capability; alternate functions I2C1_SDA, USART1_RX, TIM17_CH1N, TSC_G5_IO4. |+| 44 | BOOT0 | input | Dedicated boot memory selection pin. |+| 45 | PB8 | bidirectional | 5 V-tolerant I/O with FM+ capability; alternate functions I2C1_SCL, CEC, TIM16_CH1, TSC_SYNC. |+| 46 | PB9 | bidirectional | 5 V-tolerant I/O with FM+ capability; alternate functions I2C1_SDA, IR_OUT, TIM17_CH1, EVENTOUT. |+| 47 | VSS | power_in | Digital ground. |+| 48 | VDD | power_in | Digital power supply, 2.0 V to 3.6 V. |+| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | UFQFPN-48(7x7) |+| Category | Embedded Processors & Controllers |+| Pins | 49 |++## CAD (KiCad official)++- Symbol: `STM32F051C8U7`+- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`+- 3D model: UFQFPN-48(7x7) (KiCad packages3D, STEP)+- 3D model files: `stm32f051c8u7-etched.step` / `stm32f051c8u7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f051c8u7.step` / `stm32f051c8u7.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922285353291776) (122 pp, sha256 `80848a22804e56d8`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32f051c8u7-datasheet.pdf)
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additional functions RTC_TAMP1, RTC_TS, RTC_OUT, WKUP2."+ },+ {+ "number": "3",+ "name": "PC14-OSC32_IN",+ "type": "bidirectional",+ "description": "Standard 3.3 V I/O on the power-switch supply with the same 3 mA, 2 MHz and 30 pF output limits, also used as OSC32_IN for the 32 kHz oscillator."+ },+ {+ "number": "4",+ "name": "PC15-OSC32_OUT",+ "type": "bidirectional",+ "description": "Standard 3.3 V I/O on the power-switch supply with the same 3 mA, 2 MHz and 30 pF output limits, also used as OSC32_OUT for the 32 kHz oscillator."+ },+ {+ "number": "5",+ "name": "PF0-OSC_IN",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O, also used as OSC_IN for the 4 to 32 MHz crystal oscillator."+ },+ {+ "number": "6",+ "name": "PF1-OSC_OUT",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O, also used as OSC_OUT for the 4 to 32 MHz crystal oscillator."+ },+ {+ "number": "7",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Active-low bidirectional device reset input and internal reset output with an embedded weak pull-up resistor."+ },+ {+ "number": "8",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground; a distinct VSSA pin is provided on packages with 48 or more pins."+ },+ {+ "number": "9",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog power supply, from VDD up to 3.6 V."+ },+ {+ "number": "10",+ "name": "PA0",+ "type": "bidirectional",+ "description": "3.3 V-tolerant I/O directly connected to the ADC; alternate functions USART2_CTS, TIM2_CH1_ETR, COMP1_OUT, TSC_G1_IO1; additional functions ADC_IN0, COMP1_INM6, RTC_TAMP2, WKUP1."+ },+ {+ "number": "11",+ "name": "PA1",+ "type": "bidirectional",+ "description": "3.3 V-tolerant I/O directly connected to the ADC; alternate functions USART2_RTS, TIM2_CH2, TSC_G1_IO2, EVENTOUT; additional functions ADC_IN1, COMP1_INP."+ },+ {+ "number": "12",+ "name": "PA2",+ "type": "bidirectional",+ "description": "3.3 V-tolerant I/O directly connected to the ADC; alternate functions USART2_TX, TIM2_CH3, TIM15_CH1, COMP2_OUT, TSC_G1_IO3; additional functions ADC_IN2, COMP2_INM6."+ },+ {+ "number": "13",+ "name": "PA3",+ "type": "bidirectional",+ "description": "3.3 V-tolerant I/O directly connected to the ADC; alternate functions USART2_RX, TIM2_CH4, TIM15_CH2, TSC_G1_IO4; additional functions ADC_IN3, COMP2_INP."+ },+ {+ "number": "14",+ "name": "PA4",+ "type": "bidirectional",+ "description": "3.3 V-tolerant I/O directly connected to the ADC; alternate functions SPI1_NSS, I2S1_WS, USART2_CK, TIM14_CH1, TSC_G2_IO1; additional functions ADC_IN4, COMP1_INM4, COMP2_INM4, DAC_OUT1."+ },+ {+ "number": "15",+ "name": "PA5",+ "type": "bidirectional",+ "description": "3.3 V-tolerant I/O directly connected to the ADC; alternate functions SPI1_SCK, I2S1_CK, CEC, TIM2_CH1_ETR, TSC_G2_IO2; additional functions ADC_IN5, COMP1_INM5, COMP2_INM5."+ },+ {+ "number": "16",+ "name": "PA6",+ "type": "bidirectional",+ "description": "3.3 V-tolerant I/O directly connected to the ADC; alternate functions SPI1_MISO, I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, COMP1_OUT, TSC_G2_IO3, EVENTOUT; additional function ADC_IN6."+ },+ {+ "number": "17",+ "name": "PA7",+ "type": "bidirectional",+ "description": "3.3 V-tolerant I/O directly connected to the ADC; alternate functions SPI1_MOSI, I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, COMP2_OUT, TSC_G2_IO4, EVENTOUT; additional function ADC_IN7."+ },+ {+ "number": "18",+ "name": "PB0",+ "type": "bidirectional",+ "description": "3.3 V-tolerant I/O directly connected to the ADC; alternate functions TIM3_CH3, TIM1_CH2N, TSC_G3_IO2, EVENTOUT; additional function ADC_IN8."+ },+ {+ "number": "19",+ "name": "PB1",+ "type": "bidirectional",+ "description": "3.3 V-tolerant I/O directly connected to the ADC; alternate functions TIM3_CH4, TIM14_CH1, TIM1_CH3N, TSC_G3_IO3; additional function ADC_IN9."+ },+ {+ "number": "20",+ "name": "PB2",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate function TSC_G3_IO4."+ },+ {+ "number": "21",+ "name": "PB10",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate functions I2C2_SCL, CEC, TIM2_CH3, TSC_SYNC."+ },+ {+ "number": "22",+ "name": "PB11",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate functions I2C2_SDA, TIM2_CH4, TSC_G6_IO1, EVENTOUT."+ },+ {+ "number": "23",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground."+ },+ {+ "number": "24",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital power supply, 2.0 V to 3.6 V."+ },+ {+ "number": "25",+ "name": "PB12",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate functions SPI2_NSS, TIM1_BKIN, TSC_G6_IO2, EVENTOUT."+ },+ {+ "number": "26",+ "name": "PB13",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate functions SPI2_SCK, TIM1_CH1N, TSC_G6_IO3."+ },+ {+ "number": "27",+ "name": "PB14",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate functions SPI2_MISO, TIM15_CH1, TIM1_CH2N, TSC_G6_IO4."+ },+ {+ "number": "28",+ "name": "PB15",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate functions SPI2_MOSI, TIM15_CH2, TIM1_CH3N, TIM15_CH1N; additional function RTC_REFIN."+ },+ {+ "number": "29",+ "name": "PA8",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate functions MCO, USART1_CK, TIM1_CH1, EVENTOUT."+ },+ {+ "number": "30",+ "name": "PA9",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate functions TIM15_BKIN, USART1_TX, TIM1_CH2, TSC_G4_IO1."+ },+ {+ "number": "31",+ "name": "PA10",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate functions TIM17_BKIN, USART1_RX, TIM1_CH3, TSC_G4_IO2."+ },+ {+ "number": "32",+ "name": "PA11",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate functions EVENTOUT, USART1_CTS, TIM1_CH4, TSC_G4_IO3, COMP1_OUT."+ },+ {+ "number": "33",+ "name": "PA12",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate functions USART1_RTS, TIM1_ETR, COMP2_OUT, TSC_G4_IO4, EVENTOUT."+ },+ {+ "number": "34",+ "name": "PA13",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O configured as SWDIO after reset with the internal pull-up enabled; alternate function IR_OUT."+ },+ {+ "number": "35",+ "name": "PF6",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate function I2C2_SCL."+ },+ {+ "number": "36",+ "name": "PF7",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate function I2C2_SDA."+ },+ {+ "number": "37",+ "name": "PA14",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O configured as SWCLK after reset with the internal pull-down enabled; alternate function USART2_TX."+ },+ {+ "number": "38",+ "name": "PA15",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate functions SPI1_NSS, I2S1_WS, USART2_RX, TIM2_CH1_ETR, EVENTOUT."+ },+ {+ "number": "39",+ "name": "PB3",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate functions SPI1_SCK, I2S1_CK, TIM2_CH2, TSC_G5_IO1, EVENTOUT."+ },+ {+ "number": "40",+ "name": "PB4",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate functions SPI1_MISO, I2S1_MCK, TIM3_CH1, TSC_G5_IO2, EVENTOUT."+ },+ {+ "number": "41",+ "name": "PB5",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O; alternate functions SPI1_MOSI, I2S1_SD, I2C1_SMBA, TIM16_BKIN, TIM3_CH2."+ },+ {+ "number": "42",+ "name": "PB6",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with FM+ capability; alternate functions I2C1_SCL, USART1_TX, TIM16_CH1N, TSC_G5_IO3."+ },+ {+ "number": "43",+ "name": "PB7",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with FM+ capability; alternate functions I2C1_SDA, USART1_RX, TIM17_CH1N, TSC_G5_IO4."+ },+ {+ "number": "44",+ "name": "BOOT0",+ "type": "input",+ "description": "Dedicated boot memory selection pin."+ },+ {+ "number": "45",+ "name": "PB8",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with FM+ capability; alternate functions I2C1_SCL, CEC, TIM16_CH1, TSC_SYNC."+ },+ {+ "number": "46",+ "name": "PB9",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with FM+ capability; alternate functions I2C1_SDA, IR_OUT, TIM17_CH1, EVENTOUT."+ },+ {+ "number": "47",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground."+ },+ {+ "number": "48",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital power supply, 2.0 V to 3.6 V."+ },+ {+ "number": "49",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The UFQFPN48 has an exposed die pad on the underside (Figure 6 and Figure 43 note 3). The datasheet ; Pin numbers and names come from the LQFP48/UFQFPN48 column of Table 13 (pin definitions), not from t; Pins that are not bonded out in the 48-pin package (shown as '-' in the LQFP48/UFQFPN48 column of Ta",+ "exposed pad 49 added from the footprint"+ ],+ "pages_sent": 57,+ "cost_usd": 0.2524,+ "at": "2026-10-08T04:29:29"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922285353291776",+ "pages": 122,+ "sha256": "80848a22804e56d8",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 49,+ "described": 49,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm32f051c8u7.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7,+ 7,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm32f051c8u7-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7,+ 7,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "bd31346efe18cb1155a97560be1e7b67980cd5d65aed5850611722918c2d33ea",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}